Abstract: In a telecommunications switching system, a CPU utilizes memory mapped access to a number of duplex external devices and other memories. A validity checking arrangement provides for detecting invalid external device unit numbers for memory mapped accesses by the CPU. In addition, this validity checking arrangement will determine that the CPU's operating software has attempted a memory mapped access with an invalid unit number or that a true hardware fault exists.

Abstract: In a telecommunications switching system, which has a switching network connected to a number of asynchronous digital spans, a digital span reframing circuit continuously reframes and resynchronizes each of the digital spans that are detected as lacking proper framing. The digital span reframing circuit realigns both framing and super framing, TS bits and FS bits, for proper digital span reception.

Abstract: The present invention is a power zoning arrangement for a common channel interoffice signaling system. For small switching offices a minimal hardware configuration is provided for CCIS data transfer while maintaining a single fault tolerant system.

Abstract: An interface arrangement is shown compensating for timing delays during transmission of communication information between a transmitting and receiving stage of a T-S-T digital switching system. The arrangement includes a buffer at the receiving stage having first and second storage files. During a first time slot communication information is written in the first file using control signals transmitted along with the communication information while simultaneously the second file is read using a local control signal. In the subsequent time slot the second file is written to and the first file is read, providing a one time slot slip between the transmitting and receiving stages.

Abstract: A space stage for a T-S-T digital switching system is shown arranged into four identical space stage units (SSU). Each SSU is arranged into modular functional elements. The elements are combined in each SSU to allow the space stage to grow modularly, interconnecting from thirty-two to sixty-four originating time and terminating time stages.

Abstract: A space stage for a T-S-T digital switching system is shown arranged into modular functional elements. The elements are combined allowing the space stage to grow modularly to interconnect from one to thirty-two originating time stages and terminating time stages.

Abstract: A space stage for a T-S-T digital switching system is shown arranged to interconnect the originating time stages (OTS) and terminating time stages (TTS) of a first time group and the OTS's and TTS's of a second time group. The space stage includes four identical space stage units (SSU). The first SSU interconnects the OTS's and TTS's of the first time group and the second SSU the OTS's and TTS's of the second time group. The third SSU interconnects the OTS's of the first time group to the TTS's of the second time group and the fourth SSU interconnects the OTS's of the second time group to the TTS's of the first time group.

Abstract: A device is disclosed for mounting, interconnecting and terminating printed circuits. The invention comprises a frame of insulating material including a fixed printed circuit substrate and an area for supporting and confining a removable printed circuit substrate. A connector molded on one end of the frame extends input/output signals to both substrates. A handle molded on a second end of the frame includes slots through which clips are inserted electrically interconnecting the two substrates. The clips also aid in retaining the removable circuit substrate to the frame.

Abstract: A remote data link controller is disclosed for formatting, transmitting and receiving control data over high speed digital data links between the peripheral processors of a plurality of telecommunications switching systems. The remote data link controller includes a microprocessor controlled data link processing circuit which is time shared among all of the digital data links. The remote data link controller processes one transmit and one receive message byte during a reformatting cycle for each digital data link. It stores any intermediate results in a temporary memory than proceeds to service the next digital data link. The remote data link controller fetches intermediate results from the temporary memory, processes the data and stores the next intermediate results in the temporary memory until it has completely serviced all of the digital data links.

Abstract: In a telecommunications switching system, a thick film digital span transmission circuit is connected between a digital span and a switching network of the switching system. The circuit converts unipolar switching network data to bipolar data for digital span use. The present circuit is relatively small in size and has minimal power consumption. This circuit also provides for attenuating and shaping the pulses transmitted to the digital span.

Abstract: A time-space-time-space-time switching network is composed of a subscriber connected to a remote unit network having a time and space switching stage. The subscriber is then connected to a central office switching system having a time-space-time switching network. Alternatively, the switching network may comprise a subscriber locally connected through the time-space-time switching network of the central office switching system to the space and time stages of the remote switching unit. The remote unit network and the central office network are interconnected by a number of digital spans. In addition, the remote unit and the central office each provide for local to local traffic. That is, traffic which is transmitted only within its own switching network.

Abstract: In a telecommunications switching system, a thick film digital span circuit arrangement is connected between a digital span and a switching network of the switching system. The transmission circuit arrangement converts unipolar switching network data to bipolar data for use by the digital span. The telecommunications switching system provides for duplicated data transmission to the digital span. Duplicated transmission circuits are arranged in an active/standby configuration under CPU control without affecting the overall impedance seen by the digital span.

Abstract: A time-space-time switching network (for local to local traffic), a time-space or a space-time switching network portion (for local to remote traffic) is shown for a small remotely located switching system. There are multiple crossovers of PCM data from one information rail to another information rail in this switching system. These two information rails provide for crossover in both the originating and terminating time switching stages for local calls and in only the originating or terminating time switching stages for calls originating or terminating at remotely located switching systems. The information rails remain segregated through the space switching stage of this switching system. The small remotely located switching system is connected to a large host digital switching system via digital spans.

Abstract: A device is disclosed for mounting, interconnecting and terminating printed circuits. The invention comprises a frame of insulating material arranged to support, position and confine two printed circuit substrates. A connector molded on one end of the frame extends input/output signals to both substrates. A handle molded on a second end of the frame includes slots through which clips are inserted electrically interconnecting the two substrates. The clips also aid in retaining both substrates to the frame.

Abstract: The method of forming fine line circuit patterns on an insulating coating comprising the steps of applying an insulating coating to a substrate, forming a circuit pattern on the insulating coating surface, filling the circuit pattern with conductive or resistive circuit paste, removing the excess and heating at a temperature for sintering the paste to the coating.

Abstract: A remote switching unit which serves a large digital switching system is shown. The remote switching unit is CPU controlled and interconnects local subscribers to the large switching system. Digital spans connect the remote switching unit to the large switching system. A space switching stage provides for switching local traffic (traffic with the remote switching unit) and remote traffic (traffic from or to the large switching system). In addition, the remote switching unit provides an extended switching capacity with connections to smaller switching units.

Abstract: A method of adding fine line circuits to a thick film microcircuit comprising the steps of: cutting a circuit pattern on a substrate; filling the circuit pattern with a conductive or resistive paste and removing the excess; adding screen printing thick film circuit elements on the substrate surface and over selected portions of the fine line pattern; and heating thereby sintering the paste and thick film elements to the substrate.

Abstract: In a telecommunications switching system, which has a switching network connected to a number of asynchronous digital spans, a digital span frame detection circuit continuously monitors the framing of each of the digital spans. The digital span frame detection circuit checks for both proper framing and super framing, TS bits and FS bits. An ordered examination of each of the number of digital spans will occur. Any digital span which lacks proper framing or super framing will be marked for subsequent processing. These markings will be scanned and submitted for reframing in an ordered fashion.

Abstract: In a PCM switching system having a CPU controlled switching network, a reformatting circuit is connected between the switching network and a number of digital spans. The reformatting circuit converts supervisory data which is serially received to parallel data words which may be readily accessed by the CPU. The supervisory data is logically ordered and stored in a memory for CPU access.

Abstract: This circuit provides a minimally sized data transfer buffer interface between two central processing units for transferring data blocks of variable size. The circuit provides an indication to one CPU that the other CPU has received all the data words transmitted.