Abstract: An information reproduction apparatus for performing special reproducing operations including fast forward and fast reverse operations on an audio-video material. The information reproducing apparatus is capable of reading and reproducing information having a plurality of clips wherein the size of the recording medium access unit or cluster is set at a common multiple of the size of the recording medium minimum accessible unit or sector and the size of the minimum process unit or decoding packet size in the information material reproducing apparatus.

Abstract: Reverse channel circuitry for CDMA based mobile stations which allows carrier phase offsets to be implemented at baseband, thereby eliminating the need for multiple quadrature modulators and excessive D/A converters. In addition, just four baseband filters, two using scaled coefficients and the other two unscaled coefficients, are time multiplexed to produce in-phase and quadrature terms. The invention can lead to a significant savings in hardware and be a valuable tool in implementing multiple code channels with different carrier phase offsets.

Abstract: A holder for roll-type print media and a roll-type print media cassette, for easing replacement of a roll, including a printing apparatus capable of detecting the presence of a roll-type print media. The holder and cassette include supporting means for supporting the roll-type print media rotatively and regulating means for regulating the unwinding of the print media. The printing apparatus includes print media supporting means for supporting the roll-type print media rotatively such that the position of the axis of rotation is fixed. A contact sensor for detecting the presence of roll-type print media is also provided.

Abstract: An image converting apparatus for converting an image of an input video signal into an image with a metallic luster and representing the metallic luster with parameters designated corresponding to the input image. The apparatus is based on the concept that a model of reflected light can represented with a model of reflected light of diffusion reflection and mirror-surface reflection and that even though the resultant model of reflected light is three-dimensional data, assuming that the brightness of an input video signal linearly varies, the model can be represented with brightness data. A color correction circuit 5 has a look-up table with which calculations for generating an image with a metallic luster are performed with the brightness data and the designated parameters. A matrix calculating circuit extracts a luminous signal component from the input video signal. A pre-modifying circuit adjusts the amplitude.

Abstract: An image processing apparatus comprises an error diffusion processing section 10 for performing error diffusion processing with quantization levels of three or above on image data x(i, j) for producing an output; and a second error diffusion processing section 20 for performing error diffusion processing with quantization levels of three or above on the data outputted from the first error diffusion section 10 for outputting image data y(i, j). Quantization levels of three or above of the quantizer 22 in the error diffusion processing section 20 are determined to be desired value. Quantization levels of three or above of the quantizer 12 in the error diffusion processing section 10 are determined to be levels each between each neighboring two of the quantization levels of the quantizer 22, the minimum level of the image input data x(i, j) and the maximum level of the image input data x(i, j).

Abstract: A distributed memory switching hub interconnecting heterogeneous local area networks operating at different transmission speeds for receiving, storing and forwarding frames of data. The distributed memory switching hub employs a distributed memory architecture in which memory storage for frames of data received and to be transmitted is located at each low speed LAN port of the distributed memory switching hub. A distributed memory architecture renders unnecessary the need for a central programmable processor or shared common memory to store and forward frames received by the distributed memory switching hub.

Abstract: A method and system for translating abstract structural or behavioral circuit descriptions to physically implementable files, preferably suitable for use in a Field Programmable Gate Array (FPGA) or other programmable device. A selection of layouts are generated for a cell definition (a function), allowing optimization and acceleration of circuit placement and routing without compromising design hierarchy or altering design function. Layout transformation functions may be manually initiated or automatically selected and applied during implementation of a placement algorithm.

Abstract: The invention provides a programmable delay element and a programmable slew rate element to allow post-fabrication adjustment and programming of input delay and output slew rate to iteratively alter input delay and output slew rate without redesign and refabrication of the circuit. The invention provides programmable memory cells coupled to a capacitive load via a plurality of switches. The capacitive load is coupled to a signal path and comprises a plurality of capacitors. The programmable memory cells selectively turn on the switches coupled to the capacitive load. In one FPGA implementation, the programmable memory cells are implemented in IOBs and are loaded with appropriate data during a device configuration stage. Delay equalization can be achieved by programming the memory cells such that the delays seen by device I/O pins are equal between IOBs and pads. The invention also provides a slew rate control circuit for an inverter or a buffer to provide an optimal slew rate.

Abstract: An improved method for concurrently programming in-system programmable logic devices (PLDs). More specifically, where within a plurality of serially connected PLDs, there are devices having different numbers of programmable memory cells, and devices whose memory cells require different wait periods to carry out programming, the method herein provides more optimum time efficiency and uses significantly less time overall for programming, erasing or reading back the PLDs. Also, the invention accommodates the implementation of retries to assure complete programming or erasing even when the initial attempt is not entirely successful. The method provides steps for accommodating PLDs with different wait times by bypassing fully programmed devices and speeding up programming times after smaller and slower devices are programmed and larger and faster devices are still not fully programmed.

Abstract: The notion of global signals (e.g., global set/reset and global tristate) is of significance to programmable logic user throughout the design process. Regardless of whether the HDL designer explicitly describes the use of a global signal, they are present in the implemented device since they are an integral part of the initialization and start-up process. This may lead to mismatches between the Register Transfer Level (RTL) simulation and the timing simulation. While a methodology for verifying the functionality of global signals is available for schematic design entry, none exists for HDL design tools. A verification method for HDL designers is disclosed providing access to all the functionality relating to global networks currently available to the schematic designers and allowing reuse of the testbench without losing HDL code portability.

Abstract: A method of communicating encrypted configuration data between a programmable logic device (PLD) and a storage device is included in one part of the invention. The method includes the following steps. Transmit encrypted configuration data stored in a storage device to the PLD. Decrypt the encrypted configuration data to generate a copy of the configuration data in the PLD. Configure the PLD using the copy of the configuration data. In one embodiment, the PLD transmits a key to the storage device. In another embodiment the key is separately entered into the storage device and the PLD and never transmitted between the PLD and the storage device. In another embodiment, the key is entered only into the PLD. The key is used to encrypt the configuration data.

Abstract: The invention provides a programmable delay element and a programmable slew rate element to allow post-fabrication adjustment and programming of input delay and output slew rate to iteratively alter input delay and output slew rate without redesign and refabrication of the circuit. The invention provides programmable memory cells coupled to a capacitive load via a plurality of switches. The capacitive load is coupled to a signal path and comprises a plurality of capacitors. The programmable memory cells selectively turn on the switches coupled to the capacitive load. In one FPGA implementation, the programmable memory cells are implemented in IOBs and are loaded with appropriate data during a device configuration stage. Delay equalization can be achieved by programming the memory cells such that the delays seen by device I/O pins are equal between IOBs and pads. The invention also provides a slew rate control circuit for an inverter or a buffer to provide an optimal slew rate.

Abstract: A recording and/or reproducing apparatus is disclosed in which informational signals are recorded and/or reproduced by irradiating an optical disc 202 with a light beam from an optical pick-up device 1 through an recording and/or reproducing opening 205 which is formed in a disc cartridge 202 which rotatably houses an optical disc 203. The optical pick-up device 1 which is used for the recording and/or reproducing apparatus comprises a light source and an objective lens 5 for converging the light beam from the light source upon the signal recording area of the optical disc 203. When recording and/or reproducing of informational signal on and/or from the optical disc 203 is performed by the optical pick-up device 1, only the objective lens 5 is moved into the disc cartridge 202 via the recording and/or reproducing opening 205 formed on the disc cartridge 202 to shorten the distance between the objective lens 5 of the optical pick-up device 1 and the disc 203.

Abstract: The present invention is directed to a writable optical disk recording apparatus in which an output power of a laser beam is controlled even during a recording period. During a calibration mode, a reproduced (reflected) signal from a matrix circuit (12) is supplied to level hold circuits (37), (38). The level hold circuits (37), (38) are controlled at predetermined timings relative to recording EFM (eight-to-fourteen modulated) signals of bit lengths (3T) and (11T) under the control of a microcomputer (CPU) (31). Signals from the level hold circuits (37), (38) are supplied to a calculating circuit (39) which calculates, for example, a difference or ratio between the two signals. A calculated value is stored in a memory (40). The value stored in the memory (40) and a value newly calculated by the calculating circuit (39) during EFM data recording are compared with each other by a subtracting circuit (41).

Abstract: An optical disc having a plurality of recording zones, each having 2.sup.n tracks, with the recording capacity of each track in a given zone being equal and the recording capacity being different for each recording zone, and with a line recording density of each recording zone being approximately equal.

Abstract: A radio telephone comprising a main body enclosing a transmitting circuit and a receiving circuit; a handset removably mounted to the main body, the handset including a microphone electrically connected to the transmitting circuit and a speaker electrically connected to the receiving circuit; a voice recognition circuit for recognizing a voice input to the microphone and for performing a dialing operation based on the voice. An extension module is removably mounted on the main body. A mute switch, which also enables the voice recognition circuit, is removably connected to the main body, or to an extension module removably mounted on the main body, thus adding to the portability of the radio telephone.

Abstract: A clamping mechanism clamps the free end of a leader tape onto a hub, a moving mechanism moves the hub together with the clamped leader tape end to a winding position, a cutting device cuts the leader tape a predetermined distance from the hub clamped onto the free end of the leader tape, a splicing mechanism splices the cut end of the leader tape to a free end of a magnetic tape, and a revolving mechanism then winds the spliced together leader tape and magnetic tape onto the hub. When the winding of the spliced together leader tape and magnetic tape is completed, the cutting device cuts the magnetic tape, and the splicing mechanism splices the cut end of the magnetic tape with the cut end of a leader tape. The clamping mechanism then cuts the leader tape having the magnetic tape spliced therewith, and clamps another hub to the free end of the leader tape.

Abstract: A disc player reproduces information recorded on a disc which has a disc type. Type identification circuitry determines the disc type of the disc. Reproduction circuitry reproduces the information stored on the disc. Disc ejection circuitry generates a disc ejecting signal when an externally-generated command is received. Control circuitry stops the reproduction circuitry in response to the disc ejecting signal. Reset circuitry initializes the disc reproduction circuitry when the disc ejecting signal is asserted and the type identification circuitry determines that the disc type is a first predetermined type, and inhibits the initialization of the disc reproduction circuitry when the disc ejecting signal is asserted and the type identification circuitry determines that the disc type is a second predetermined type. The disc type determined by the type identification circuitry can be stored in a memory.

Abstract: In an apparatus for position transformation of input image data according to a transformation function to thereby generate image data at the position of each pixel of an output image, it is detected whether or not each position is located inside the boundary of the input image and, if so, the input image data for that position is transformed according to the transformation function, but if not, stored background image data is transformed according to the transformation function instead.

Abstract: A metal mold device for molding a substrate includes a fixed metal mold, a movable metal mold mounted facing the fixed metal mold for being moved towards and away from the fixed metal mold and for defining a mold cavity between it and the fixed metal mold, a stamper mounted on at least one of the fixed metal mold or the movable metal mold and arranged within the mold cavity, a positioning unit provided on the metal mold on which the stamper is mounted for positioning the loading position of the stamper, and a stamper supporting unit provided on the metal mold on which the stamper is mounted for supporting the stamper by suction. The stamper is positioned by the positioning member and held under suction by the stamper suction unit so that it may be mounted in position on the fixed metal mold or the movable metal mold to permit a disc substrate to be molded highly accurately.