Patents Represented by Law Firm Poms, Smith, Lande & Rose
  • Patent number: 5826731
    Abstract: A wine rack having four wire panels of bottle holders and a wire base assembly, each being a separate component and packaged together in a small carton. The two lower panels are fitted into the base assembly, the two upper panels are fitted into the tops of respective lower panels, and the panels are all clipped together. The two lower panels are also cradled in a cross bar of the base assembly. All of the bottles, when held in storage positions in the rack, are sloped downwardly at an angle towards their cork ends. The bottles on one panel-column side face one direction and those on the other face the other direction. The entire unit with its snap-fit and clipped connections and its balanced bottle arrangement can be safely lifted at its top when fully loaded with bottles.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: October 27, 1998
    Inventor: Shahriar Dardashti
  • Patent number: 5749999
    Abstract: A method of making a surface-mount technology plastic-package ball-grid array integrated circuit assembly. According to the method, a surface-mount ball-grid array package is provided for an integrated circuit assembly. The array package has a circuit chip recess through which vias extend, opening on a bottom surface of the array package. A peripheral portion of the array package is defined around the vias formed in the recess. The array package is held on a vacuum chuck by applying vacuum to the peripheral portion of package. An adhesive material is then placed in the recess to extend partially through the vias. A circuit chip is finally disposed in the recess on the adhesive material to complete the fabrication process. Substantially ambient pressure is communicated to the vias on the bottom surface of the array package to prevent the adhesive from being pulled through the vias by the applied vacuum.
    Type: Grant
    Filed: February 4, 1994
    Date of Patent: May 12, 1998
    Assignee: LSI Logic Corporation
    Inventor: Sanjay Dandia
  • Patent number: 5723843
    Abstract: The present invention concerns a novel method for balancing an illuminated display panel to achieve a predetermined level of illumination uniformity from indicia formed on the panel. One embodiment of the present invention includes the steps of first fabricating an unbalanced display panel having light translucent and absorptive layers deposited on a panel substrate with indicia formed in the light absorptive layers. The unbalanced panel is illuminated and the amount of light from the indicia formed in the panel are measured to identify illumination deficient indicia. A carbon dioxide laser beam is then focused onto the illumination deficient indicia so as to etch portions of the light translucent layer underlying these indicia and increase the amount of illumination from these indicia. In an alternative embodiment, an illuminated display panel is partially fabricated by applying a light translucent layer to a display panel substrate.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: March 3, 1998
    Assignee: Illuminated Display Division of Bell Industries, Inc.
    Inventor: Dale Muggli
  • Patent number: 5710627
    Abstract: A wavelength-scanning mechanism for a spectrometer utilizes an eccentric disc cam driven by a pulse motor to pivot a diffraction grating with a contact bar fixed thereto. A light source supplies light to the mechanism with a first concave spherical mirror reflecting light to the diffraction grating and reflecting light reflected by the diffraction grating to a zero-order light detector. A second concave spherical mirror reflects light diffracted by the diffraction grating to a diffracted light detector. A controller receives information from the light detectors and controls the pulse motor. At least one cam follower is mounted on the cam at a position eccentric from the rotational axis thereof and slidably contacts the contact bar. Alternatively, the diffraction grating has two contact bars fixed thereto, and the cam follower is pivoted between the contact bars.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: January 20, 1998
    Assignee: Horiba Ltd.
    Inventors: Masaru Inoue, Juichiro Ukon
  • Patent number: 5694332
    Abstract: A Motion Picture Experts Group (MPEG) video/audio data bitstream comprises frames of encoded audio data, each of which includes a plurality of integrally encoded subframes, which are decoded by an audio decoder for presentation. An input buffer arrangement includes first and second buffer memories which each have a capacity to store one subframe. The first and second buffer memories are used alternatingly, with one storing a subframe of input data while another subframe is being read out of the other. A third buffer memory, which has a capacity to store at least one subframe, is provided upstream of the first and second buffer memories to prevent the first and second buffer memories from overflowing or underflowing.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: December 2, 1997
    Assignee: LSI Logic Corporation
    Inventor: Greg Maturi
  • Patent number: 5682047
    Abstract: An input/output structure includes a microelectronic device connected in circuit between a contact pad and a reference potential, and a thyristor device for protecting the microelectronic device from electrostatic discharge. The thyristor device includes first and second terminals connected to the contact pad and to the reference potential respectively, a PNPN thyristor structure including a first P-region, a first N-region, a second P-region and a second N-region disposed in series between the first and second terminals, and an electrode for inducing an electric field into the second P-region. The induced electric field increases the number of charge carriers in the second P-region, and enables the device to be triggered at a lower voltage applied between the first and second terminals. The electrode includes an insulated gate, and can be connected to either the first or second terminal. The gate can include a thick field oxide layer, or a thin oxide layer to further reduce the triggering voltage.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 28, 1997
    Assignee: LSI Logic Corporation
    Inventors: Rosario Consiglio, Yen-Hui Ku
  • Patent number: 5682235
    Abstract: A dry particle-size distribution measuring apparatus capable of conducting a measurement using a small quantity of sample. An optical system, a sample detector, a controller, an operating portion, and a sample-supplying portion which intermittently supplies a sample are provided. The optical system has a laser beam source emitting a laser beam, a collecting lens, and a detector which detects scattered or transmitted light. The sample supply-detecting means has a light transmitter and a light receiver provided between the sample-supplying portion and the optical system. The controlling and operating portion has a CPU which receives a detected signal from the detector and measures the particle-size distribution on the basis of the scattered or transmitted light data from the sample.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: October 28, 1997
    Assignee: Horiba, Ltd.
    Inventor: Tatsuo Igushi
  • Patent number: 5671602
    Abstract: By applying balance between atmospheric pressure and gravity, Torricelli's vacuum is formed and by utilizing the vacuum, power is generated. When the operating tube directs to nearly the right above, because of weight of the liquid in the inside of the operating tube, Torricelli's vacuum is formed under the piston, and by this vacuum, the piston is lowered to rotate the operating crank shaft. Then, linking to the rotation of the operating crank shaft, the operating tube inclines, then the piston is pushedly returned to the original position by the liquid, and in this state the operating tube is returned to the afore-described position. A plurality of operating tubes which are balanced in gravity by the balance weighing mechanism repeat the afore-described operation in different phases.
    Type: Grant
    Filed: April 12, 1995
    Date of Patent: September 30, 1997
    Assignee: Kabushiki Kaisha Nihon Pipe Conveyor Kenkyusho
    Inventor: Kunio Hashimoto
  • Patent number: 5668809
    Abstract: A single chip hub for an electronic communication network comprises a packet memory for storing data packets, a Reduced Instruction Set Computer (RISC) processor for processing the packets, and a plurality of media access interfaces. A Direct Memory Access (DMA) controller transfers packets transferring packets between the packet memory and the interfaces. A packet attribute memory stores attributes of the data packets, and an attribute processor performs a non-linear hashing algorithm on an address of a packet being processed for accessing a corresponding attribute of said packet in the packet attribute memory. An address window filter identifies the address of a packet being processed by examining only a predetermined portion of said address, and can comprise a dynamic window filter or a static window filter.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: September 16, 1997
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, D. Tony Stelliga
  • Patent number: 5663017
    Abstract: Method and apparatus for forming large scale fields suitable for use in the fabrication of integrated circuit structures having submicron dimensions. The method includes subdividing the large scale field into a plurality of subfields along the boundaries of functional components forming a very large scale integrated circuit. Stitching the subfields into the large scale field is then substantially simplified since the number and dimensions of conductive interconnects between the functional components can be more easily accommodated. The large scale field further includes a custom portion and a standard portion of functional components. Reticle formation of the standard portion involves optical correction techniques. Reticle formation of the custom portion may involve standard reticle formation techniques.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 2, 1997
    Assignee: LSI Logic Corporation
    Inventors: Richard Schinella, Keith Chao
  • Patent number: 5658739
    Abstract: The binding sites of binding proteins and their binding partners are characterized, at the individual amino acid level, by a combination of tritium exchange labeling and sequential degradation and analysis of tritiated fragments under slowed exchange conditions.
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: August 19, 1997
    Assignee: The Regents of the University of California
    Inventor: Virgil L. Woods, Jr.
  • Patent number: 5654962
    Abstract: An adaptive error detection and correction apparatus for an Asynchronous Transfer Mode (ATM) network device comprises a sensing unit for sensing a congestion condition in the ATM network and a global pacing rate unit for adaptively reducing a maximum allowable transmission ratio of ATM cells containing information to idle ATM cells in response to a sensed congestion condition. A processor stores a number corresponding to a relatively high maximum allowable transmission ratio in the global pacing rate register in the absence of a sensed congestion condition, and stores a number corresponding to a relatively low maximum allowable transmission ratio in the global pacing rate register in response to a sensed congestion condition. A controller adjusts the maximum allowable transmission ratio in accordance with the number stored in the global pacing rate register.
    Type: Grant
    Filed: August 25, 1995
    Date of Patent: August 5, 1997
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, D. Tony Stelliga
  • Patent number: 5653173
    Abstract: A magnetic levitated vehicle, including a linear rotor connected thereto, runs on a tubular track having a circular cross-section and a tubular linear induction motor stator mounted therein. The rotor is movably mounted within the stator and the vehicle is positioned above the track. The rotor is connected to the vehicle by a riser extending through longitudinal slots of the track and stator, and by an actuator mechanism, which includes a transversely curved saddle movably connected to drive members, for enabling the vehicle to be banked at curve sections of the tubular track. Further, vehicle banking is also accomplished by constructing the track and stator with the slots laterally offset at the curved sections of the track.
    Type: Grant
    Filed: February 10, 1995
    Date of Patent: August 5, 1997
    Inventor: Phillip A. Fischer
  • Patent number: 5652163
    Abstract: A method and apparatus for forming large scale fields suitable for use in the fabrication of integrated circuit structures having submicron dimensions. The method includes subdividing the large scale field into a plurality of subfields along the boundaries of functional components forming a very large scale integrated circuit. Stitching the subfields into the large scale field is then substantially simplified since the number and dimensions of conductive interconnects between the functional components can be more easily accommodated.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: July 29, 1997
    Assignee: LSI Logic Corporation
    Inventors: Richard D. Schinella, Keith Chao
  • Patent number: 5650653
    Abstract: A microelectronic integrated circuit includes a semiconductor substrate, and a plurality of CMOS microelectronic devices formed on the substrate. Each device includes a triangular ANY element of a first conductivity type (PMOS or NMOS), and a triangular ALL element of a second conductivity type (NMOS or PMOS), the ANY and ALL elements each having a plurality of inputs and an output that are electrically interconnected respectively. The ANY element is basically an OR element, and the ALL element is basically an AND element. However, the power supply connections and the selection of conductivity type (NMOS or PMOS) for the ANY and ALL elements can be varied to provide the device as having a desired NAND, AND, NOR or OR configuration, in which the ANY element acts as a pull-up and the ALL element acts as a pull-down, or vice-versa.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: July 22, 1997
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben, Ashok K. Kapoor, Valeriy B. Kudryavtsev, Alexander E. Andreev, Stanislav V. Aleshin, Alexander S. Podkolzin
  • Patent number: D381224
    Type: Grant
    Filed: December 7, 1995
    Date of Patent: July 22, 1997
    Assignee: Cal-Marble Furniture Manufacturing Co.
    Inventors: Phylliss Mann, Lawrence Platt
  • Patent number: D381523
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: July 29, 1997
    Inventor: Keith Beverly
  • Patent number: D382078
    Type: Grant
    Filed: June 16, 1995
    Date of Patent: August 5, 1997
    Assignee: Jimway, Inc.
    Inventor: Pedro M. Solis
  • Patent number: D382460
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: August 19, 1997
    Assignee: Pacific Handy Cutter, Inc.
    Inventor: Gerry Schmidt
  • Patent number: D384235
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: September 30, 1997
    Inventor: Shahriar Dardashti