Patents Represented by Attorney, Agent or Law Firm Pro-Techtor International
  • Patent number: 6747328
    Abstract: A scaled MOSFET device of the present invention comprises a shallow-trench-isolation structure being formed on a semiconductor substrate; a conductive-gate structure having a pair of second conductive sidewall spacers formed over each inner sidewall of a gate region and on a first conductive layer and first raised field-oxide layers for forming an implant region in a central portion of a channel and a planarized third conductive layer for forming a salicide-gate structure or a polycide-gate structure; a buffer-dielectric layer being formed over each sidewall of the conductive-gate structure for forming lightly-doped source/drain diffusion regions; a first sidewall dielectric spacer being formed over each sidewall of the buffer-dielectric layers for forming heavily-doped source/drain diffusion regions; and a second sidewall dielectric spacer being formed over each sidewall of the first sidewall dielectric spacers for forming a self-aligned silicidation contact over each of the heavily-doped source/drain diffus
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: June 8, 2004
    Assignee: Intelligent Sources Development, Corp.
    Inventor: Ching-Yuan Wu
  • Patent number: 6746915
    Abstract: The stack-type DRAM memory structure of the present invention comprises a plurality of self-aligned thin third conductive islands over shallow heavily-doped source diffusion regions without dummy transistors to obtain a cell size of 6F2 or smaller; a rectangular tube-shaped cavity having a conductive island formed above a nearby transistor-stack being formed over each of the self-aligned thin third conductive islands to offer a larger surface area for forming a high-capacity DRAM capacitor of the present invention; a planarized third conductive island being formed between a pair of first sidewall dielectric spacers and on each of shallow heavily-doped common-drain diffusion regions to offer a larger contact area and a higher contact integrity; and a plurality of planarized conductive contact-islands being formed over the planarized third conductive islands to eliminate the aspect-ratio effect and being patterned and etched simultaneously with a plurality of bit lines.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: June 8, 2004
    Assignee: Intelligent Sources Development Corp.
    Inventor: Ching-Yuan Wu
  • Patent number: 6744089
    Abstract: A self-aligned lateral-transistor DRAM cell structure is disclosed by the present invention, in which a trench structure comprises a trench region and a trench-isolation region being formed in a side portion of the trench region and a self-aligned lateral-transistor structure comprises a merged common-source diffusion region, a self-aligned gate-stack region, and a self-aligned common-drain diffusion region being formed in another side portion of the trench region by using spacer-formation techniques. The unit cell size of the self-aligned lateral-transistor DRAM cell structure can be fabricated to be equal to 6 F2 or smaller. The self-aligned lateral-transistor DRAM cell structure is used to implement two contactless DRAM arrays for high-speed read and write operations.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: June 1, 2004
    Assignee: Intelligent Sources Development Corp.
    Inventor: Ching-Yuan Wu
  • Patent number: 6744664
    Abstract: A dual-bit floating-gate flash cell structure comprises a gate region being formed between a common-source region and a common-drain region. The gate region comprises a pair of floating-gates being defined by a pair of second sidewall dielectric spacers and a select-gate dielectric layer being formed between the pair of floating-gates. The common-source/drain region comprises a common-source/drain diffusion region or a pair of isolated source/drain diffusion regions being divided by a shallow trench isolation formed between a pair of first sidewall dielectric spacers. A word line being formed over an intergate dielectric layer is at least formed over the pair of floating-gates and the select-gate dielectric layer. Based on common-source/drain diffusion regions and isolated source/drain diffusion regions of the dual-bit floating-gate cell structure, two different contactless flash memory arrays are formed.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: June 1, 2004
    Assignee: Silicon-Based Technology Corp.
    Inventor: Ching-Yuan Wu
  • Patent number: 6742911
    Abstract: A rear pushbutton type switch arrangement for flashlight formed of an aluminum alloy barrel holding a battery set and a lamp assembly, an electrically conducting rotary rear cap provided at a rear side of said barrel and a switch structure is disclosed. The switch structure has an externally threaded, electrically conducting, hollow, cylindrical metal casing connected between the barrel and the rotary cap to hold the other parts of the switch structure firmly in the rotary rear cap so that the other parts of the switch structure do not fall from the rotary rear cap when disconnected from the barrel for a replacement of the battery set.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: June 1, 2004
    Inventor: Chin Hsiang Chen
  • Patent number: 6739431
    Abstract: An escape device of elevator. The device includes an activation assembly comprising sheaves, rope, links, flexible board, roller, guide, limit member, bar, and catch; and an operation assembly comprising sheaves, ropes, links rotating disk, weight, cylinder having a wall aperture, and spring depressible shaft. In case of emergency a manual rotation of the sheave will cause the shaft to remove a support to the weight in the cylinder by retracting from the aperture. Hence, the weight begins to fall to pull the rope. Eventually, an elevator door is opened automatically. The invention can also be configured to facilitate an operation by the handicapped.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: May 25, 2004
    Inventor: Jiun Jyh Wang
  • Patent number: 6740967
    Abstract: An image sensor includes a substrate, a coating layer, a frame layer, a photosensitive chip, multiple wires, and a transparent layer. The substrate has an upper surface formed with first terminals projecting over the upper surface, and a lower surface formed with second terminals. The coating layer is applied to the upper surface to fill between any two adjacent first terminals and to flatten the first terminals. The frame layer is adhered to the coating layer so as to form a cavity together with the substrate. The photosensitive chip has bonding pads and is mounted to the upper surface and within the cavity. The wires electrically connect the bonding pads to the first terminals, respectively. The transparent layer is arranged on the frame layer to cover the photosensitive chip so that the photosensitive chip may receive optical signals passing through the transparent layer.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: May 25, 2004
    Assignee: Kingpak Technology Inc.
    Inventor: Dennis Pai
  • Patent number: 6739249
    Abstract: An offset and screen combination printing method for IMD (In-Mold Decoration) hot press and injection molding application includes the steps of (1) primary offset printing; (2) color pattern offset printing; (3) third offset printing; (4) screen printing; (5) baking; (6) shape rolling; and (7) injection-molding.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: May 25, 2004
    Assignee: Taiyi Precision Tech Corp.
    Inventor: Jui Peng Huang
  • Patent number: 6740973
    Abstract: An image sensor, which is electrically connected to a printed circuit board. The image sensor includes a transparent glass layer on which signal input terminals and signal output terminals are formed, a photosensitive chip on which bonding pads are formed, a substrate, and an integrated circuit. Each bonding pad is formed with a projection, and the photosensitive chip is electrically connected to the signal input terminals through the projections. The substrate has a first surface, a second surface, and a first through hole penetrating through the substrate from the first surface to the second surface. The signal output terminals are electrically connected to the first surface of the substrate with the photosensitive chip positioned within the first through hole. The second surface is electrically connected to the printed circuit board. The integrated circuit is electrically connected to the second surface of the substrate.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: May 25, 2004
    Assignee: Kingpak Technology Inc.
    Inventor: Chung Hsien Hsin
  • Patent number: 6738046
    Abstract: The present invention is to provide a computer mouse having a windable output wire including a housing, a windable wire receiving device retractably mounted in the housing, and an output wire having a first end connected to the wire receiving device and a second end connected to an output plug that is inserted into a main frame of a computer. The output wire is wound around the fixing shaft center, thereby forming an inner circle structure of the output wire, and is wound around a mobile shaft center, thereby forming an outer circle structure of the output wire. The inner circle structure of the output wire and the outer circle structure of the output wire are along two opposite directions, thereby previously leaving a wire winding space, reducing the volume of the housing, and saving the cost of fabrication.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: May 18, 2004
    Inventor: Yu-Lin Chung
  • Patent number: 6737720
    Abstract: A packaging structure of an image sensor includes a substrate, an image sensing chip, a plurality of wirings, and a transparent layer. The substrate includes a plurality of metal sheets, glue for sealing the metal sheets, a first surface, and a second surface. The metal sheets are exposed to the outside via the first surface and the second surface to form first contacts and second contacts, respectively. The image sensing chip is mounted on the substrate. The plurality of bonding pads are formed on the image sensing chip. The plurality of wirings electrically connect the bonding pads on the image sensing chip to the first contacts of the first surface of the substrate, in order to electrically connect the image sensing chip to the substrate. The transparent layer is arranged above the image sensing chip. Therefore, a packaging structure of an image sensor made of plastic materials can be formed, thereby simplifying the packaging processes and lowering the manufacturing costs.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: May 18, 2004
    Inventors: Mon Nan Ho, Hsiu Wen Tu, Ching Shui Cheng, Li Huan Chen, Joe Liu, Jichen Wu, Wen Chuan Chen
  • Patent number: 6736672
    Abstract: A stacked card connector includes a base, a row of first terminals, a row of second rear terminals, and a row of second front terminals. The base is formed with a first slot and a second slot for receiving a first card and a second card which are inserted into the slots along the same direction. The first and second terminals are located in the first and second slots to contact the first and second cards, respectively. The second terminals have arced contacts flush with each other, pins extending out of a bottom surface of the base from a side opposite to an insert port of the second slot, and extensions connecting the contacts to the pins, respectively.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: May 18, 2004
    Inventor: Chou Hsuan Tsai
  • Patent number: 6734485
    Abstract: A vertical DRAM cell structure is disclosed by the present invention, in which a trench structure comprises a deep-trench region having a vertical transistor and a second-type STI region being formed in a side portion of the deep-trench region and a common-drain structure comprises different implant regions under a common-drain diffusion region being formed in another side portion of the deep-trench region. The vertical DRAM cell structure is used to implement two contactless DRAM arrays. A first-type contactless DRAM array comprises a plurality of metal bit-lines integrated with planarized common-drain conductive islands and a plurality of highly conductive word-lines. A second-type contactless DRAM array comprises a plurality of metal word-lines integrated with planarized common-gate conductive islands and a plurality of common-drain conductive bit-lines.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: May 11, 2004
    Inventor: Ching-Yuan Wu
  • Patent number: 6734775
    Abstract: An improved transformer structure mainly has a lower iron core disposed with a plastic securing seat having a central insert tube provided for the insertion of circular posts disposed respectively on an upper and the lower iron cores; a plurality of pins on the lateral sides of the plastic securing seat respectively provided for the fixing insertion of through holes on a circuit board thereby fastening a flat coil and the circuit board on the plastic securing seat so as to increase the pressure resistance value of the iron cores and the coil as well as obtain a precise positioning point of the transformer and level the pins meet the standards of Storage Module Device (SMD).
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: May 11, 2004
    Inventor: Yu-Lin Chung
  • Patent number: 6732642
    Abstract: An auto screen-printing method for use in IMR and injection molding is disclosed to include the steps of: (a) printing a layer of transparent hardening agent on a roll of PET material by means of an auto screen printing press and then drying the printing, (b) printing four different color mixtures of ink and hardening agent one after another on the dried transparent hardening agent and drying the four color mixtures respectively after each color printing, (c) screen-printing a layer of backing ink on the color mixtures of ink and hardening agent and then drying the layer of backing ink, and (d) setting the printed roll of PET material thus obtained in an injection-molding machine for injection-molding with a plastic material into the desired finished product.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: May 11, 2004
    Assignee: Taiyi Precision Tech Corp.
    Inventor: Jui Peng Huang
  • Patent number: 6734484
    Abstract: A vertical transistor DRAM structure is disclosed by the present invention, in which a trench structure comprises a deep-trench region having a vertical transistor and a second-type shallow-trench-isolation region being formed in a side portion of the deep-trench region and a common-drain structure comprises different implant regions being formed under a common-drain diffusion region in another side portion of the deep-trench region. The vertical transistor DRAM structure is, used to implement two contactless DRAM arrays. A first-type contactless DRAM array comprises a plurality of metal bit-lines integrated. with planarized common-drain conductive islands and a plurality of highly conductive word-lines. A second-type contactless DRAM array comprises a plurality of metal word-lines integrated with planarized common-gate conductive islands and a plurality of common-drain conductive bit-lines.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: May 11, 2004
    Assignee: Intellignet Sources Development Corp.
    Inventor: Ching-Yuan Wu
  • Patent number: 6722240
    Abstract: A device for destroying signals stored on compact disk includes a base, a punching pin, and a push lever. The base has a top stub for engaging with a central hole of a compact disk positioned on the base, a through hole corresponding to a Start Lead In (SLD) area on the compact disk, and an L-shaped arm portion holding a spring mechanism. The punching pin is vertically movably mounted in the spring mechanism and aligned with the SLD area, and the push lever is pivotally connected at an end to one side of the arm portion for pushing against an upper end of the punching pin. When the push lever is pivotally pushed downward, the punching pin is driven downward to punch a hole on the SLD area and ruin lead-in signals recorded thereon, preventing data stored on the compact disk from being read and disclosed.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: April 20, 2004
    Assignee: Taiwan Bor Ying Corporation
    Inventor: Jin-Sheng Weng
  • Patent number: 6719525
    Abstract: A submerged motor vane wheel rotation direction control structure includes a blade pivoted to a locating block inside of the water guide chamber of a submerged motor, a vane wheel, the vane wheel having sloping teeth radially extended from the motor shaft of the submerged motor, which push the blade outwards toward to an open position for the passing of flow of water upon clockwise rotation of the vane wheel, and is forced into engagement with the blade to hold the blade in a close position upon counter-clockwise rotation of the vane wheel, causing the submerged motor to reverse the vane wheel.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: April 13, 2004
    Inventor: Chi-Der Chen
  • Patent number: D488549
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: April 13, 2004
    Inventor: Wen Jye Chen
  • Patent number: D489706
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: May 11, 2004
    Inventor: Johnson Chen