Abstract: A production process for protecting the surface of compound semiconductor wafers includes providing a multi-wafer epitaxial production system with a transfer and load module, a III-V growth chamber and an insulator chamber. The wafer is placed in the transfer and load module and the pressure is reduced to .ltoreq.10.sup.-10 Torr, after which the wafer is moved to the III-V growth chamber and layers of compound semiconductor material are epitaxially grown on the surface of the wafer.

Abstract: A method of passivating interface states of oxide-compound semiconductor interfaces using molecular, atomic, or isotopic species wherein said species are applied before oxide deposition in ultra-high vacuum, or during interruption of oxide deposition in ultra-high vacuum (preferentially after oxide surface coverage of a submonolayer, a monolayer, or a few monolayers), or during oxide deposition in ultra-high vacuum, or after completion of oxide deposition, or before or after any processing steps of the as deposited interface structure. In a preferred embodiment, hydrogen or deuterium atoms are applied to a Ga.sub.2 O.sub.3 --GaAs interface at some point before, during, or after oxide deposition in ultra-high vacuum, or before or after any processing steps of the as deposited interface structure, at any given and useful substrate temperature wherein the atomic species can be provided by any one of RF discharge, microwave plasma discharge, or thermal dissociation.

Abstract: An electronic device comprises a semiconductor substrate (2) having a cavity (32) extending into the substrate (2), a membrane (8) formed over the semiconductor substrate so as to extend across the cavity (32) in the semiconductor substrate and an active region (14, 30) supported by the membrane (8) and positioned adjacent the cavity (32). The membrane (8) comprises a single dielectric layer formed of an oxy-nitride material.

Abstract: A circuit and method for producing a train of pulse width modulated pulses (FIG. 2), the circuit comprising: pulse producing means (11-16) for receiving sample values at an update rate and for producing therefrom pulses whose widths are representative of the sample values, and repeater means (15) for causing the pulse producing means to produce a predetermined plurality of pulses, at an output rate which is an integral multiple of the update rate, for each said sample value, whereby the pulse train output frequency is greater than the sample value update frequency.

Abstract: An LCD Driver System (10) includes a row decoder (38) for providing command signals to row drivers (50) and a RAM row decoder (64) for controlling a RAM (76) which supplies data to a column driver (88). The row and column drivers (50 and 88) are supplied with power by a power source (58) which can supply either high or low voltages. In normal mode, the power source (58) supplies high voltage and the row driver (50) drives both a dot matrix portion (14) and an icon portion (16) of an LCD display. In an icon mode, a disable signal disables the row decoder (38) and the RAM row decoder (64), enables only the icon row driver (54) of the row drivers (50) and the icon row of the RAM (76) and switches the power source (58) to supply low voltage so as to save power.

Abstract: A parabolic signal generator (100) for use in a cathode ray tube (CRT) display circuit, comprising: programmable delay means (110) for receiving a CRT horizontal flyback signal and for producing a trigger signal which is delayed relative to the horizontal flyback signal by a programmable predetermined time; ramp generating means (130, 140) coupled to receive the trigger signal from the programmable delay means for producing a symmetric ramp signal in response to the trigger signal; and parabola generating means (150) coupled to receive the ramp signal from the ramp generating means for producing the parabolic signal. Since the trigger signal delay is programmable, it can be adjusted to match the delay of a range of external components. Since the ramp signal is symmetric it does not require the use of complex blanking circuitry to suppress spuriae.

Abstract: A low voltage submicron CMOS circuit (10) for providing an output bandgap voltage (V.sub.BG) that is substantially independent of temperature and power supply variations has been provided. The CMOS circuit utilizes parasitic transistors (28-30) to create a delta voltage that has a positive temperature coefficient across a differential pair of NMOS transistors (14, 16). This delta voltage is then converted into differential currents which are amplified and mirrored and summed together to provide an output current (I.sub.O) that has a positive temperature coefficient. This output current is then passed through a series network including a resistor element (52) and a parasitic PNP junction transistor (31) to provide a bandgap voltage of 1.2 volts wherein the voltage across the resistor element has a positive temperature coefficient and the voltage across the parasitic PNP junction transistor has an inherent negative temperature coefficient.

Abstract: An integrated temperature sensor circuit (9) comprises two different current sources (14 and 15) multiplexed using switches (12 and 13) controlled by Clocks 1 and 2 having opposite phases into a bipolar transistor 11. V.sub.be is developed on capacitor (23) during the first clock phase and .DELTA.V.sub.be is developed on capacitor (23) during the second clock phase. A second capacitor (27) is coupled between the input and output of an operational amplifier (25). The second capacitor (27) is discharged during the first clock phase and is charged during the second clock phase. Since .DELTA.V.sub.be is dependent on temperature, the voltage at the output of the operational amplifier (25) is dependent on the temperature and the ratio of the two capacitors.

Abstract: A low voltage field effect transistor structure (20) is provided with a threshold voltage that is tolerant of process variations that alter the location of a source implant region (41). A first halo region (33) and a second halo region (36) are formed adjacent to source region (41) such that after subsequent thermal processing, a constant doping profile of opposite conductivity as source region (41) is formed in the channel region (23) adjacent the source region (41). The embodiments can be formed either adjacent to only the source region (41) to create a unilateral device, or the doping profile can be formed adjacent to both source region (41) and a drain region (40) to produce a bilateral device. An additional embodiment forms a second implant region in source region (41) to reduce junction leakage and capacitance.

Abstract: A system (200) comprises a regulator (250), a battery unit (220), a voltage sensitive circuit (210, e.g., memory circuit) and a switchable sensor (280). The battery unit (220), the memory circuit (210) and the switchable sensor (280) are parallel coupled to terminals (266 and 264) of the regulator (250). The switchable sensor (280) itself has a serially coupled voltage sensor (230) and switch (240). In a first operating mode, the regulator (250) provides a voltage V.sub.2 to the memory circuit (210) and to the switchable sensor (280). The switch (240) is closed. The voltage sensor (230) measures the voltage V.sub.2 and communicates the result to the regulator (250) via a signal input (267). In a second operating mode, the regulator (250) does not provide the voltage V.sub.2. The switch (240) is open. The battery unit (220) provides a voltage V.sub.4 to the memory circuit (210), but not to the voltage sensor (230).

Abstract: A process for forming a sensor (10) such as an accelerometer includes the steps of forming an epitaxial layer (14) on a semiconductor substrate (12), patterning a portion of the epitaxial layer to provide a monocrystalline finger (20,22), wherein the finger has a height (43) at least twice its width (44), and forming a cavity (40) under at least a portion of the finger to expose a bottom surface (38) of the finger using an etchant with an etch selectivity for the semiconductor substrate relative to the epitaxial layer of greater than about 10:1. The distance (42) from the bottom of the cavity to the bottom surface of the member is greater than about 5 microns. The accelerometer is useful for lateral acceleration sensing and is built in bulk silicon at the surface of the substrate.

Abstract: A gain control signal (VCTRL) is provided to a temperature compensating circuit (12) which produces a differential temperature compensating gain control signal (VDT). A gain compensating circuit (14) receives the differential temperature compensating gain control signal (VDT) and provides a differential gain and temperature compensating gain control signal (VDTG) to an amplifier (16). The differential gain and temperature compensating gain control signal (VDTG) varies the gain of the amplifier (16) to be substantially linear with respect to variation of the gain control signal (VCTRL) and to compensate for variation in temperature.

Abstract: A heatsink having isolated bonding pads formed on the heatsink eliminates breaking of the wire bond, lifting of the wire bond to the heatsink, and die attach material contamination of the bond. In one embodiment, the isolated bonding pad has an elevated pedestal configuration. In a second embodiment, the isolated bonding pad has an elevated pedestal configuration, so that the pedestal is also configured to lock a mold compound around the pedestal. In a third embodiment, the isolated bonding pad has an island configuration. In a fourth embodiment, the island configuration is configured to lock the mold compound formed around the island. The locking mechanism of the elevated pedestal or island prevents delamination of the mold compound to heatsink interface, preventing lifting or breaking of a wire bonded to the isolated bonding pad.

Abstract: An amplifier circuit having a programmable configuration which is selectable by a user. The amplifier circuit includes a pair of two-input differential input circuits. Each two-input differential input circuit has first and second input terminals, wherein the first input terminal of the first two-input differential circuit is connected to a first circuit input and the first input terminal of the second two-input differential circuit is connected to a second circuit input. The amplifier also includes programmable circuitry for selectively connecting the second input terminals of the first and second two-input differential circuits to either second or third circuit inputs, respectively, or to the fourth and first input terminals, respectively.

Abstract: Portable communication equipment having a virtual image display including display electronics and optics for providing a virtual image in the display, cursor electronics connected to the display electronics for producing a manually controllable cursor virtual image in the display, and manual controls mounted on the portable communication equipment and externally accessible by an operator. The manual controls are connected to the cursor electronics for controlling the position and function of the cursor virtual image to provide functions such as pull-down menus and image selection.

Abstract: An embodiment of the present invention is a switching power supply that includes a power switching device and a control circuit to control the power switching device. Under normal operational conditions the power required by the power switching device is provided by an auxiliary secondary winding of the transformer of the power supply. When the temperature sensitive device gets into an unallowed operational condition this is no longer possible and as a consequence the device is disabled for a period of time which is determined by the amount of overheating of the device.

Abstract: An object oriented test provides a hierarchy of classes under test, each of the classes under test having a predefined inheritance structure. The test provides a test class for each corresponding class under test. Each class under test has a test member function, a set state member function, a verify state member function, and a test vector which includes an initial complete state, an expected complete state, a set of function inputs for a member function being tested, and a set of expected results. The test sets an initial complete state of the test class by implicitly calling the set state member functions through the inheritance structure of the test classes. Next a member function of a desired class under test is executed. The final complete state of the class under test as well as the outputs and returned values of all member functions which were executed are compared with the set of expected results.

Abstract: A semiconductor device (10) coupled to ball grid array substrate (11) and encapsulated by an optically transmissive material (29, 31). The ball grid array substrate (11) has conductive interconnects (14) and a semiconductor receiving area (17) on a top surface and solder pads (13) on a bottom surface. An optoelectronic component (24) is mounted on the semiconductor receiving area (17) and encapsulated with the optically transmissive material (29, 31). Solder balls (18) are formed on the solder pads (13).

Abstract: In order to package an electronic component, a leadframe is provided having at least one flag portion (2) and at least one lead portion (7) extending towards the flag portion (2). The lead portion (7) includes an end portion (10) of reduced thickness adjacent the flag portion (2) and a channel (9) between the end portion (10) and the rest of the lead portion. The leadframe is etched to form the channel (9) and the end portion(10), which together form a locking step. The electronic component (3) is then mounted on the flag portion (2) and electrically connected to the end of the lead portion (7). The electronic component (3), the electrical connection (5), at least the end portion (10) and the intermediate portion (9) of the lead portion (7) and at least part of the flag portion (2) are encapsulated in a plastics molding compound, which enters and fills the locking step, and is then cured.

Abstract: An automated machine program generator (10) and a method for optimizing the manufacture of articles. The automated machine program generator (10) includes a data repository editor (11), a table parameter editor (13), and an optimizer editor (14). The data repository editor (11) collects data from various sources. The data is transformed and placed in a table (12). If necessary, the data in the table (12) is modified by the table parameter editor (13). The modified data is optimized by the optimizer editor (14) and transferred to a piece of equipment (15) for manufacturing the article.