Patents Represented by Attorney Rennie William Dover
  • Patent number: 8339758
    Abstract: A transient voltage suppressor and a method for protecting against surge and electrostatic discharge events. A semiconductor substrate of a first conductivity type has gate and anode regions of a second conductivity type formed therein. A PN junction diode is formed from a portion of the gate region and the semiconductor substrate. A cathode is formed adjacent to another portion of the gate region. A thyristor is formed from the cathode, the gate region, the substrate, and the anode region. Zener diodes are formed from other portions of the gate region and the semiconductor substrate. A second Zener diode has a breakdown voltage that is greater than a breakdown voltage of a first Zener diode and that is greater than a breakover voltage of the thyristor. The first Zener diode protects against a surge event and the second Zener diode protects against an electrostatic discharge event.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Mingjiao Liu, Ali Salih, Emmanuel Saucedo-Flores, Suem Ping Loo
  • Patent number: 8339092
    Abstract: An integrated circuit has drive circuitry to drive the windings of an electrical motor, means to make a measurement from the drive circuitry during rotation of the motor, suitable for use as motor control feedback, and has an output contact through which the motor control feedback measurement is available as an analog output signal. It can be used with an external motor control circuit coupled to receive the analog output signal to generate motor control signals, to control the drive circuitry. The analog feedback output gives more flexibility to the design of a motor control loop in terms of bit resolution, bandwidth and choice of discrete time or continuous time control.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Peter Cox, Bart Decock
  • Patent number: 8324026
    Abstract: A semiconductor component having wetable leadframe lead surfaces and a method of manufacture. A leadframe having leadframe leads is embedded in a mold compound. A portion of at least one leadframe lead is exposed and an electrically conductive material is formed on the exposed portion. The mold compound is separated to form singulated semiconductor components.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: December 4, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Phillip Celaya, James P. Letterman, Jr., Robert L. Marquis
  • Patent number: 8300374
    Abstract: A semiconductor component that includes a current limit circuit and a method for limiting current in the semiconductor component. An input/output pin is connected to the gate of a transistor and a control resistor is connected between the gate of the transistor and its source. One terminal of the control resistor is connected to the input/output pin and the other terminal is connected to another input/output pin. A current source is connected to the input/output pin. A reference voltage is generated between the two input/output pins and compared with a drain-source voltage that is between one of the two input/output pins and another input/output pin. A control voltage is set in accordance with the comparison. The control voltage then controls the voltage on another of the pins that is not common to the reference voltage and to the drain-source voltage.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: October 30, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Thomas William Ciccone, Thomas Duffy, Bryan McCoy, Timothy Kaske, John Ciccone
  • Patent number: 8292690
    Abstract: A thinned semiconductor wafer and a method for thinning the semiconductor wafer. A semiconductor wafer is thinned from its backside to form a cavity in a central region of the backside of the semiconductor wafer. Forming the cavity also forms a ring support structure in a peripheral region of the semiconductor wafer. The ring support structure has an inner edge and an outer edge. The inner edge may be beveled or have a stepped shape.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: October 23, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Michael J. Seddon
  • Patent number: 8278897
    Abstract: A power supply converter and a method for adjusting a threshold voltage in the power supply converter. The circuit includes first and second switches having current conducting terminals commonly connected together to form a node. An energy storage element may be connected to the node and a zero current detection comparator may be connected to the node. A first voltage may be provided at the control terminal of the first switch that turns it off. After the first switch is off, determining whether the first switch turned off before or after the current in the energy storage element has reached zero. This may be accomplished by determining whether the voltage at the first node is positive or negative. If the voltage at the first node is negative, the threshold voltage is increased and if the voltage at the first node is positive the threshold voltage is decreased.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 2, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tod Schiff, Brian P. Johnson
  • Patent number: 8258792
    Abstract: A method and system for monitoring a voltage of a battery cell or a battery stack. A first monitoring unit has a first plurality of battery monitoring nodes, first and second data ports, a first supply port switchably coupled to the first plurality of battery monitoring nodes, a second supply port switchably coupled to the first plurality of battery monitoring nodes, and a third supply port. A controller is connected to the first monitoring unit. Alternatively, a reference voltage may be connected to the controller or it may be connected to the first monitoring unit.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Components Industries, LLC.
    Inventor: Geert Vandensande
  • Patent number: 8248114
    Abstract: A drive circuit and a method for maintaining an operating state of the drive circuit. The drive circuit includes a capacitor connected to an inverting input terminal of an operational amplifier and to a terminal of a current sensitive load through a switch. The output of the operational amplifier is connected to a switching regulator which has an output terminal connected to another terminal of the current sensitive load. An energy storage element is connected to the inverting input terminal of the operational amplifier. Energy is stored in the energy storage element during a first portion of a PWM pulse which is used during a second portion of the PWM pulse to generate the error signal. A drive signal is generated from the error signal where the drive signal is used to generate a voltage that biases the current source during the second portion of the PWM pulse.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Anthony Gerard Russell, Christopher Ben Bartholomeusz
  • Patent number: 8248286
    Abstract: A potentiometer and a method for adjusting an impedance. In accordance with an embodiment, the potentiometer may be a programmable multistage digital potentiometer that has a first stage comprising a non-shunted impedance, a second stage coupled between a reference terminal and the first stage, and a third stage coupled between the first stage and another reference terminal. In accordance with another embodiment, the potentiometer receives a wiper address and parses it into sections such that one section controls the first stage, a second portion controls portions of the second and third stages, and a third portion controls the other portions of the second and third stages to produce a desired impedance between a common wiper terminal and the reference terminals.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Otilia Neagoe, Radu H. Iacob
  • Patent number: 8217706
    Abstract: A method and circuit for managing thermal performance of an integrated circuit. Temperature sensing circuits and a plurality of power FETs that are coupled together in parallel are manufactured from a semiconductor substrate. Each temperature sensing circuit monitors the temperature of the portion of the semiconductor substrate near or including a corresponding power FET. When the temperature of the semiconductor substrate near one or more of the power FETs reaches a predetermined value, the corresponding temperature sensing circuit reduces a voltage appearing on the gate of the power FET. The reduced voltage increases the on-resistance of the power FET and channels a portion of its current to others of the plurality of power FETs. The power FET continues operating but with a reduced current flow. When the temperature of the semiconductor substrate falls below the predetermined value, the gate voltage of the power FET is increased to its nominal value.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: July 10, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Alan R. Ball, Stephen P. Robb
  • Patent number: 8207485
    Abstract: A pixel structure having a shielded storage node. A pixel comprises a sample transistor coupled to a light detecting stage. The sample transistor comprises an inner junction region surrounding and coupled to a storage node and a gate disposed around at least three sides of the inner junction region that operates as a charge barrier to shield the storage node. A memory capacitor is coupled to the storage node.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: June 26, 2012
    Assignee: On Semiconductor Image Sensor
    Inventor: Gerald LePage
  • Patent number: 8203630
    Abstract: Described herein are methods that may improve yield of an image sensor. In one embodiment, a method that may improve yield of an image sensor includes generating output values of control logic associated with an array of light sensitive elements. The method further may include determining if the control logic has one or more faulty output values. The method further may include automatically correcting the one or more faulty output values. In another embodiment, a method that may improve yield of an image sensor includes providing light to an array of light sensitive elements. The method further may include generating an image based on the light sensitive elements and associated control logic. The method further may include disconnecting control lines from control logic that has one or more faulty output values based on viewing the image. The method further may include generating another image based on the control logic having no faulty output values.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: June 19, 2012
    Assignee: ON Semiconductor Trading, Ltd
    Inventor: Danny Scheffer
  • Patent number: 8179463
    Abstract: In accordance with an embodiment of the present invention, an image sensor comprises a plurality of pixel sensing circuits. Each pixel sensing circuit includes a photodiode and a storage node. Each pixel sensing circuit further includes a first transistor coupled between the photodiode and the storage node and a second transistor coupled between the photodiode and a shared node. The shared node is coupled to the plurality of pixel sensing circuits. The image sensor may include a reset transistor and/or a read-out circuit coupled to the shared node.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: May 15, 2012
    Assignee: On Semiconductor Trading Ltd.
    Inventor: Tomas Geurts
  • Patent number: 8159284
    Abstract: A method and circuit for managing thermal performance of an integrated circuit. In accordance with an embodiment, a thermal limit circuit and a semiconductor device are manufactured from a semiconductor material, wherein the thermal limit circuit is configured to operate at a temperature level that is different from a threshold temperature in response to the thermal sensing element sensing a temperature at least equal to the threshold temperature.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: April 17, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Alan R. Ball
  • Patent number: 8148928
    Abstract: A method for starting a brushless DC motor. A rotor is aligned with a stator in accordance with a predetermined phase. After alignment, the rotor is positioned in accordance with another phase, two phases are skipped, a timer is set to a first count time, and the rotor is aligned with the stator in accordance with a third phase. Then the timer is restarted and the rotor is aligned with the stator in accordance with a fourth phase. After a first delay, first back electromotive force value is stored. The timer is stopped when the first back electromotive force value substantially equals a peak amplitude of opposite polarity. The timer is updated to a second count time that is substantially equal to a time at which the second timer was stopped. The process is repeated until the rotor has a position and a velocity that are suitable for normal operation.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: April 3, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Fran├žois Laulanet, Hendrik Paul Judith De Vloed
  • Patent number: 8143923
    Abstract: A power supply circuit having a converter circuit and method for determining a current flowing into the converter circuit. A converter circuit includes an amplifier and a current-to-current converter module. The amplifier has a current sensing element coupled between its inverting and noninverting input terminals. The amplifier generates a sensing signal from a charging current flowing through the current sensing element. The sensing signal is input into the current-to-current converter module, which scales the charging current and modulates the scaled charging current. The current-to-current converter module converts the modulated current to a charging voltage that is representative of the charging current. The charging current is converted to a current that is representative of the input current to converter circuit. The input current to the converter circuit is added to an auxiliary load current to yield the current of the power supply circuit.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: March 27, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Alan R. Ball
  • Patent number: 8144444
    Abstract: A protection circuit for protecting an electronic circuit against EMC disturbances and/or negative transient overvoltage pulses comprises a switch in series between a power supply and the electronic circuit to be protected; a comparator for comparing a first operating parameter with a second operating parameter and producing a comparison signal, the comparison signal being used as a control signal for controlling opening and closing of the switch; and a delay circuit adapted for delaying closing of the switch. A corresponding method is also provided.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: March 27, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Pavel Horsky, Petr Kamenicky
  • Patent number: 8138535
    Abstract: Systems and methods of pixel sensing circuits. In accordance with a first embodiment of the present invention, a pixel sensing circuit includes a floating diffusion functionally coupled to and surrounded by a ring transfer transistor. The ring transfer transistor is functionally coupled to and surrounded by a photo diode. The photo diode may be surrounded by a region of poly silicon. The disclosed structure provides radiation hardening and low light performance.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: March 20, 2012
    Assignee: On Semiconductor Trading Ltd.
    Inventor: Manuel Innocent
  • Patent number: 8138033
    Abstract: A semiconductor component that includes a Schottky device, an edge termination structure, a non-Schottky semiconductor device, combinations thereof and a method of manufacturing the semiconductor component. A semiconductor material includes a first epitaxial layer disposed on a semiconductor substrate and a second epitaxial layer disposed on the first epitaxial layer. The second epitaxial layer has a higher resistivity than the semiconductor substrate. A Schottky device and a non-Schottky semiconductor device are manufactured from the second epitaxial layer. In accordance with another embodiment, a semiconductor material includes an epitaxial layer disposed over a semiconductor substrate. The epitaxial layer has a higher resistivity than the semiconductor substrate. A doped region is formed in the epitaxial layer. A Schottky device and a non-Schottky semiconductor device are manufactured from the epitaxial layer.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Zia Hossain, Francine Y. Robb, Prasad Venkatraman
  • Patent number: 8093924
    Abstract: An output driver circuit has an input, an output node, and first and second transistors coupled in series between the output node and a first source of operating potential. Parasitic diodes of the first and second transistors are anti-serially coupled. The output driver circuit has first and second control circuits coupled to control the first and second transistors respectively. The first transistor is controlled as a controlled current source depending on a signal at the input during normal conditions when the current that flows through the output is in a first direction, and the second control circuit controls the second transistor to prevent unwanted DC current at the output from flowing through the output in a second direction. The first and second transistors are also controlled to limit unwanted transient currents during an EMC disturbance substantially symmetrically.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: January 10, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Petr Kamenicky, Pavel Horsky