Abstract: A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in a first level above a substrate, a capacitor is manufactured in a second level that is vertically above the first level, and a copper inductor is manufactured in a third level that is vertically above the second level. The capacitor has aluminum plates. In accordance with another embodiment, a resistor is manufactured in a first level above a substrate, a copper inductor is manufactured in a second level that is vertically above the first level, and a capacitor is manufactured in a third level that is vertically above the second level. The capacitor may have aluminum plates or a portion of the copper inductor may serve as one of its plates.

Abstract: A Schottky diode capable of sustaining a voltage of greater than about 250 volts and a method for its manufacture. An epitaxial layer of N-type conductivity is disposed on a semiconductor substrate of N-type conductivity. A guard ring of P-type conductivity extends into the epitaxial layer from its surface. A stacked structure is formed on a portion of the guard ring and a portion of the epitaxial layer. The stacked structure includes a layer of semi-insulating semiconductor material disposed on a layer of dielectric material. A first metal layer is formed on the portion of the epitaxial layer adjacent a first side of the stacked structure and on a first portion of the stacked structure. A second metal layer is formed on the portion of the epitaxial layer adjacent a second side of the stacked structure and on a second portion of the stacked structure.

Abstract: A regulator circuit and a method for regulating an output voltage. The regulator circuit includes an undervoltage protection stage capable of operating in a plurality of operating modes. In one mode, the undervoltage protection stage compensates for a low undervoltage appearing in the output voltage and in another mode it compensates for a large undervoltage appearing in the output voltage. When the output voltage has a low undervoltage, a portion of the current from a current source is routed to a feedback network to balance the input voltages of the undervoltage protection stage and to place the voltage regulator in a steady state operating mode. When the output voltage has a large undervoltage, the undervoltage protection stage turns on a current sourcing transistor that cooperates with the current from the current source to quickly charge a compensation capacitor and increase the power appearing at the output of the voltage regulator.

Abstract: A monolithically integrated multiplexer-translator-demultiplexer and a method for multiplexing and translating an electrical signal or demultiplexing and translating an electrical signal. A multiplexer and a demultiplexer are monolithically integrated with a translator. Circuits that operate at different voltage supply levels from each other may be coupled to the multiplexer and a circuit that operates at a different voltage supply level from the circuits coupled to the multiplexer or that operates at the same voltage supply level as at least one of the circuits coupled to the multiplexer is coupled to the demultiplexer. The monolithically integrated multiplexer-translator-demultiplexer selects a signal from one of the circuits coupled to the multiplexer, translates its voltage level and provides the translated signal level as an output signal.

Abstract: A voltage regulator having an overload protection circuit and a method for protecting against an output voltage being less than a predetermined level. The voltage regulator has an overload protection circuit coupled between a feedback network and a regulation section. A power factor correction circuit is connected to the regulation section. An output voltage from the power factor correction circuit is fed back to the feedback network, which transmits a portion of the output voltage to the overload protection circuit. If the output voltage is less than the predetermined voltage level, a transconductance amplifier generates a current that sets an overload flag. Setting the overload flag initiates a delay timer. If the delay exceeds a predetermined amount of time, the overload protection circuit shuts down the voltage regulator.

Abstract: A semiconductor component resistant to the formation of a parasitic bipolar transistor and a method for manufacturing the semiconductor component using a reduced number of masking steps. A semiconductor material of N-type conductivity having a region of P-type conductivity is provided. A doped region of N-type conductivity is formed in the region of P-type conductivity. Trenches are formed in a semiconductor material and extend through the regions of N-type and P-type conductivities. A field oxide is formed from the semiconductor material such that portions of the trenches extend under the field oxide. The field oxide serves as an implant mask in the formation of source regions. Body contact regions are formed from the semiconductor material and an electrical conductor is formed in contact with the source and body regions. An electrical conductor is formed in contact with the backside of the semiconductor material.

Abstract: An inductor, a semiconductor component including the inductor, and a method of manufacture. A leadframe has a plurality of conductive strips and a flag. A ferrite core is mounted on a die attach material disposed on the conductive strips and a semiconductor die is mounted on a die attach material disposed on the flag. Wire bonds are formed from the conductive strips on one side of the ferrite core to corresponding conductive strips on an opposing side of the ferrite core. The wire bonds and the conductive strips cooperate to form the coil of the inductor. Wire bonds electrically couple one end of the inductor to leadframe leads adjacent the semiconductor die. Wire bonds couple bond pads on the semiconductor die to the leadframe leads coupled to the inductor. An encapsulant is formed around the inductor and the semiconductor die. Alternatively, a stand-alone inductor is manufactured.

Abstract: A semiconductor component comprising two stacked semiconductor dice and a method of manufacture. A leadframe having an active area that includes leadframe leads and a cavity is mounted to a support material such as an adhesive tape. A packaged semiconductor die that includes a first semiconductor die mounted to a support structure and encapsulated within a mold compound is mounted on the adhesive tape. A second semiconductor die is mounted to the packaged semiconductor die. Bond pads on the second semiconductor die are electrically connected to the leadframe, the support structure on which the first semiconductor die is mounted, or both. A mold compound is formed around the second semiconductor die, portions of the leadframe, and the packaged semiconductor die. The adhesive tape is removed and the leadframe is singulated to form multi-chip packages.

Abstract: A regulator circuit and a method for compensating for sag in the output signal of the regulator circuit. A first comparator is coupled to an input of an oscillator, which oscillator outputs a clock signal and a ramp signal. In accordance with a feedback signal from the output of the regulator circuit, the clock and ramp signals of the oscillator are reset if the output signal sags to an undesirable level. The clock and ramp signals can be reset between active edges of the clock. The reset clock and ramp signals cause the regulator circuit to increase its output voltage to reduce the sag.

Abstract: A spread spectrum system having a self-oscillating delay-line digital pulse width modulator and a method for mitigating electromagnetic interference. The spread spectrum system has a pseudo-random pattern generator connected to a digital-to-analog converter, which in turn is connected to a linear regulator. The linear regulator receives a reference voltage from the digital-to-analog converter and creates a frequency varying voltage that serves as an input voltage for delay elements of a delay-line based digital pulse width modulator. In response to frequency varying input signal, the delay-line based digital pulse width modulator generates a frequency varying voltage that is input to a switching network to vary its switching frequency.

Abstract: A semiconductor component having a feature suitable for inhibiting stress induced void formation and a method for manufacturing the semiconductor component. A semiconductor substrate is provided having a major surface. A layer of dielectric material is formed over the major surface. A metallization system is formed over the layer of dielectric material, wherein the metallization system includes a portion having gaps or apertures which inhibit stress induced void formation.

Abstract: A semiconductor component having a monitoring structure suitable for monitoring metal migration of a metallization system and a method for manufacturing the semiconductor component. A semiconductor substrate is provided having a major surface. A first extrusion monitoring element is formed over the major surface. A notched test element is formed over the first extrusion monitoring element. A second extrusion monitoring element is formed over the notched test element. A current is conducted through the notched test element. The resistance between the notched test element and at least one of the first and second extrusion monitoring elements is monitored to determine if a short has been created.

Abstract: A metallization system (10) suitable for use in a semiconductor component and a method for fabricating the metallization system (10). The metallization system (10) includes a dielectric material (20) disposed on a major surface (14) of a substrate (12). The dielectric material (20) contains a dielectric filled plug (26) over a conductor (19). A metal filled plug (38) extends through the dielectric filled plug (26). The metal of the metal filled plug (38) electrically contacts the conductor (19). The metallization system (10) may be fabricated by etching a via (24) in the dielectric material (20) and filling the via (24) with a dielectric material (26) having a dielectric constant that is greater than the dielectric constant of the dielectric material (20) disposed on the major surface. A via (34) is formed in the dielectric material (26) that fills the via (24) and the via (34) is filled with a metal.

Abstract: A method for manufacturing a modular starting gate. The modules making up the starting gate include a truss module, a door releasing module, a stall divider module, a front door module, a rear door module, a towing module, and a wheel assembly module. Each module is manufactured to precise tolerances using fixtures or jigs to achieve the desired tolerances. The door releasing module is coupled to the truss module. The truss module is raised mounted to the towing module and the wheel assembly module. A first stall divider module is attached to the truss module and a positioning fixture is used to properly align a second stall divider module relative to the first stall divider module. The second stall divider module is attached to the truss module. The positioning fixture is removed and the front and back gate modules are fastened to the stall divider modules.

Abstract: A process for manufacturing a semiconductor device (70) using selective plating and etching to form the packaging for such device. A flat sheet (20) of conductive material is selectively plated with a conductive etch resistant material to form a plurality of die attach areas (22) on one side (23) of the sheet (20) and to define die contact (24) and lead contact (26) areas on the opposite side (27) of the sheet. Mold locks (34) which also serve as interconnect bonding areas are selectively plated on the side (23) of the sheet in association with each of the die attach areas (22). Semiconductor die (40) are attached to each of the die attach areas (22) and bonded (42) to the tops of the mold locks (34). A unitary molded resin housing (50) is formed overlying all of the semiconductor device die (40). The underside (27) of the conductive sheet (20) is selectively etched using the plated etch resistant material (24), (26) as an etch mask to form isolated die contact areas (60) and lead contact areas (62).

Abstract: An ultrasonic driver (105) is used to vibrate a filter disk (103) at ultrasonic frequencies. Vibrations are used to break up agglomerates into smaller pieces that pass through filter disk (103). The energy is controlled to minimize the translational energy given to the particles as they are broken up to prevent reagglomeration. The frequency and amplitude of the vibration is controlled to operate out of or in low energy cavitation.

Abstract: A front illumination device for illuminating a reflective liquid crystal display cell (42) having a light source (12), a light guide (20), and a light coupling element (22). The light guide (20) has a thin plate element configured to receive light along an edge surface (28) thereof at an angle such that a majority of the light is totally internally reflected from the front surface (24) of the light guide (20). The light coupling element (22) has a thin plate element having a front surface (30) that is in contact with the back surface (26) of planar light guide (20). The front surface (30) of the light coupling element (22) has a plurality of cavities (40) disposed therein. Light impinging the interfaces (27) between cavities (40) and the back surface (26) is totally internally reflected within light guide 20.

Abstract: An impedance matching circuit (10) matches the impedance of a load (19) coupled to an RF amplifier (12) to that of the RF amplifier (12). The impedance matching circuit (10) samples a transmitted signal from the RF amplifier (12) and a reflected signal from the load (19). The amplitude and the phase of the sampled reflected signal are compared with those of the sampled transmitted signal to calculate the impedance mismatch. A control logic circuit (80) adjusts the capacitance and inductance values of variable capacitance (23; 27) and inductance (35) elements in the impedance matching circuit (10), thereby matching the impedance of the load (19) to that of the RF amplifier (12).

Abstract: Selective encapsulation of a micro electro-mechanical pressure sensor provides for protection of the wire bands (140) through encapsulation while permitting the pressure sensor diaphragm (121) to be exposed to ambient pressure without encumbrance or obstruction. Selective encapsulation is made possible by the construction of a protective dam (150) around the outer perimeter of a pressure sensor diaphragm (121) to form a wire bond cavity region between the protective dam (150) and the device housing (105). The wire bond cavity may be encapsulated with an encapsulation gel (160) or by a vent cap (170). Alternatively, the protective dam (150) may be formed by a glass frit pattern (152) bonding a cap wafer (151) to a device wafer (125) and then dicing the two-wafer combination into individual dies with protective dams attached.

Abstract: A micro electro-mechanical systems device having variable capacitance is controllable over the full dynamic range and not subject to the “snap effect” common in the prior art. The device features an electrostatic driver (120) having a driver capacitor of fixed capacitance (121) in series with a second driver capacitor of variable capacitance (126). A MEMS variable capacitor (130) is controlled by applying an actuation voltage potential to the electrostatic driver (120). The electrostatic driver (120) and MEMS variable capacitor (130) are integrated in a single, monolithic device.