Abstract: An efficient method and system within a data processing system for storing address tags are disclosed, which include a tag directory having a plurality of congruence classes, wherein each congruence class is arranged as a tree-like data structure. A portion of an address tag common to a plurality of address tags is stored in an entry within a node at a first level of a tree-like data structure corresponding to a congruence class of the directory. Portions of the plurality of address tags are stored in a node at a subsequent level of the tree-like data structure, such that all of the plurality of address tags share in common the portion stored in the entry within the node at the first level. Since a portion common to a plurality of address tags is stored only once, the memory space required to store the plurality of address tags is reduced.

Abstract: A method and system for processing multiple requests for data residing at the same memory address. The multiple requests are associated with an individual duplicate bit flag that indicates whether the request can be processed. Thus, manipulation of the duplicate bit flag controls the order of processing for each of the received requests, thereby maintaining data coherency and integrity.

Abstract: A computer-implemented method, apparatus, memory embodying computer-readable code for installing software stored on a second machine to a first machine in a distributed computing network is provided. The first machine includes at least a display, processor, and user controls. The method includes the steps of displaying available, installable source objects of a second machine embodying software that is installable on a first machine, displaying software bundle objects having software items, wherein at least one software item is in common with one of the software items in the selected source object in response to a selection by user controls of at least one source object, and installing on the first machine an intersection of the first software items and the second software items.

Abstract: A method and system for using a single lock data structure for executing either development or non-development lock primitives contained within a kernel. The kernel includes a mode indication flag, which can be set by the user, for indicating whether the kernel is to operate in a development or a non-development mode. During the execution of the kernel, the mode indication flag is examined and the appropriate set of lock primitives is overlayed. During execution of the kernel in development mode, the single lock data structure is received in the kernel, and a development lock data structure is allocated. The data from the single lock data structure is copied to the development lock data structure, and the lock data structure is overloaded (redefined) as a pointer to the physical address of the development lock data structure. Finally, the lock data structure is initialized to point to the physical address of the development lock data structure.

Abstract: In a data processing system, a tag memory is divided into a first tag memory portion and a second tag memory portion. Next, an address for recalling requested data is generated by a central processing unit. Thereafter, a first and second tag memory addresses are concurrently computed, where the first and second tag memory addresses have bits which differ in value in a selected corresponding bit location. In response to the value of the bit in the selected bit location, the first tag memory address is coupled to either the first or second tag memory portion, and, concurrently, the second tag memory address is coupled to the other tag memory portion. Next, tag data is concurrently recalled from both the first and second tag memory portions utilizing the first and second tag memory addresses. A search tag is generated in response to the memory address from the CPU. Thereafter, the search tag and the recalled tag data from the first and second tag memory portions are concurrently compared.

Abstract: A demountable, and thus re-usable, conductive heat sink for dissipation of excess heat of an electronic component. The heat sink uses a T-bolt and T-slot for attachment to the electronic component and the printed circuit board, respectively. This attachment eliminates the typical concerns associated with the placement of traces on the PCB to accommodate the holes placed therein for the attachment of conventional heat sinks. The improved designed also facilitates demounting of the heat sink from the printed circuit board and the electronic component without damage thereto.

Abstract: A method and apparatus for reducing the number of cycles required to implement load instructions in a data processing system having a Central Processing Unit (CPU). The CPU includes a rename register file that can be used in whole or in part for retaining cache lines from previously executed load instructions. The rename register file is then used by subsequent instructions (e.g. load instructions) requiring the data previously loaded therein. Thus, reducing the cycles normally associated with retrieving the data from the cache for the subsequent instructions.

Abstract: The present invention is a computer-implemented method, memory, and computer system for directing a computer system to incrementally archive primary storage to archive storage based on partitions. The primary storage is divided into a plurality of partitions, where at least one the partitions contains information. The method includes the steps of receiving an incremental archive request from user controls and, in response, storing in the archive storage a copy of the information in each partition that has been modified since the last archive, if any.

Abstract: A method and system of displaying system operation trace information are provided which include displaying a window within the display device of a computer and displaying an axis within the window having points along it which correspond to time. Graphical objects, corresponding to event-pairs selected from the trace of system operation, are then displayed in relation to the axis such that the position of a graphical object in relation to the axis is indicative of the starting and ending time of the corresponding event-pair.

Abstract: A method and system within a data processing system are disclosed which enable a number of object files to be linked together to construct a compact executable program. First, the number of object files to be linked together are identified. Each of the object files to be linked includes one or more debugging strings that define a variable type or associate a variable name with a variable type, where a selected variable type is uniquely specified within a particular object file utilizing a type identifier. Each type identifier within each of the number of object files is mapped to a corresponding universal type identifier that uniquely specifies a selected variable type within all of the number of object files. Debugging strings which are not repeated in any two of the number of object files are written to the compact executable program, thereby minimizing a number of debugging strings written to the compact executable program.

Abstract: Simultaneous use of multiple expanded memory cards and their associated Expanded Memory Manager (EMM) device drivers in a computer system is provided. First, an expanded memory card is added and its EMM device driver will check to verify if another EMM driver is currently installed. If so, the new EMM device driver will take control of the existing EMM device driver in a master-slave relationship. The new EMM device driver (master) controls the existing EMM device driver (slave) by use of the slave's interrupt vector. That is, the master controls the slave by having an interrupt vector for the slave readdressed to be input to the master. Thereby, providing the master with the which expanded memory interrupts the slave was required to service. The master also takes control of all the slave's handles and pages by appearing as a requesting program application to the slave.

Abstract: A method of verifying the baud rate for communication of data by an Asynchronous serial device residing within a data processing system. The data processing system having a first Asynchronous serial device and a second Asynchronous serial device. The first and second serial devices are connected one to another for communication of data therebetween. The first and second serial devices are initialized with a common baud rate for transmission and reception of data, respectively. A test sequence pattern is created, and transmitted at the common baud rate from the first serial device to the second serial device. The second serial device transmits the received test sequence pattern back to the first serial device. The test sequence pattern is then verified as either valid or invalid.

Abstract: A programming environment is provided in which an end user of one or more existing applications, e.g. integrated environment applications, can customize the applications with a unique user interface appearance. The environment consists of one application or a group of applications, a customization facility and a graphical editor. The customization facility records event streams from the user to the applications when they are run, and enables the user to compose a plurality of event streams into a story. The user generates a unique user interface appearance with graphical parts, e.g., boxes, arrows, icons, etc., using the graphical editor. The user then links the graphical parts, or objects of the user interface appearance to event streams or stories, and completes a programming mode. After programming, the user can make the customized application run by interaction with the new user interface appearance, for example picking the graphical objects on the appearance.

Abstract: Data sets of sequential data strings at a particular point in time are assigned to processing elements of a multiprocessor system at high speed and processing is executed efficiently in parallel. A mechanism for preventing allocation due to all-read to a cache block which has not yet been referred from another cache is added by providing a reference bit with respect to cache blocks. The reference bit becomes 0 when new data is read to the cache block and becomes 1 when the cache block is referenced by a CPU. In the case of reading data from another cache, if a block corresponding thereto can be replaced without the need to be written back to the other cache and the reference bit is 1, data is fetched to the shared cache memory.

Abstract: A system and method are provided wherein a user of an interconnected computer system can identify a specific piece of data and then access this data from another computer in the network. This is extremely useful since it is often desirable for data to be capable of being displayed and manipulated from another system during meetings, discussions and the like. The user who wishes to transfer a file to another system simply points an untethered stylus to a representation of a file, such as a filename, icon, or the like and then selects the file to be transferred. The user then carries the stylus to a remote interconnected computer and points the stylus at the remote computer which verifies the identity of the stylus and obtains a path to the selected file. The data file is then transferred from the user's computer to the remote computer through the network.