Abstract: Disclosed is a lead-free, high solidus temperature, high Sn alloy. The solder alloys contain in excess of 90 weight percent Sn, and an effective amount of Ag and Bi, optionally with Sb or with Sb and Cu. Another form of the alloy contains Ag and Sb, optionally with Bi.
Type:
Grant
Filed:
June 16, 1993
Date of Patent:
February 28, 1995
Assignee:
International Business Machines Corporation
Inventors:
Stephen G. Gonya, James K. Lake, Randy C. Long, Roger N. Wild
Abstract: A method of flip chip bonding an integrated circuit chip to a chip carrier. A high melting temperature composition, such as a binary Pb/Sn alloy, is deposited on contacts on, for example, the chip, and constituents of a low melting composition, such as Bi and Sn, are codeposited on contacts on, for example, the chip carrier. The chip and chip carrier are then heated. This causes the lower melting temperature composition, for example the Bi and Sn, to melt and form a low melting temperature alloy, such as a Bi/Sn alloy. The low melting alloy dissolves the higher melting composition, as Pb/Sn. This results in the formation of a solder bond of a low melting point third composition, such as a ternary alloy of Bi/Pb/Sn.
Type:
Grant
Filed:
April 19, 1994
Date of Patent:
February 21, 1995
Assignee:
International Business Machines Corporation
Abstract: Disclosed is a Musical Instrument Digital Interface emulator for testing the THRU port echo of a Musical Instrument Digital Interface device. The emulator has input devices for taking bitstream data from the THRU and OUT ports of the Musical Instrument Digital Interface device, comparing the THRU port bitstream data to the OUT port bitstream data, and generating a result of the comparison. Also disclosed is a method of testing the THRU port echo of a Musical Instrument Digital Interface device by reading the THRU bitstream and OUT bitstream of the Musical Digital Interface Device, bitwise comparing the two bit streams; and reporting the results of the comparison to an output means.
Type:
Grant
Filed:
July 14, 1993
Date of Patent:
February 21, 1995
Assignee:
IBM Corporation
Inventors:
Alejandro R. Badia, David P. Pagnani, Edward D. Shockley
Abstract: Disclosed is a method and multiprocessor apparatus to convert an alphanumeric input into input to an application program as a text processing or word processing program. This is accomplished in a computer having relative motion and/or relative position sensing input capability and a content addressable memory including a comparand register, tag fields, data fields, and a match circuit. The method continuously determines when the relative motion and/or relative position sensing input is active. When the input is active the system senses a basic attribute myotion and/or position of the active relative motion and/or relative position sensing input and defines a meta attribute of the sensed input. Exemplary meta attributes include the turns, weighted input center, and stroke geometry and topology.
Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
Type:
Grant
Filed:
July 27, 1993
Date of Patent:
January 24, 1995
Assignee:
International Business Machines Corporation
Inventors:
Charles R. Davis, Thomas P. Duffy, Steven L. Hanakovic, Howard L. Heck, John T. Kolias, John S. Kresge, David N. Light, Ajit K. Trivedi
Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
Type:
Grant
Filed:
July 27, 1993
Date of Patent:
January 3, 1995
Assignee:
International Business Machines Corporation
Abstract: Disclosed is a multi-compartment electroplating tank and a process for using the tank to simultaneously plate dissimilar materials onto a substrate.
Abstract: The lead free alloy is a low solidus temperature, multi-component solder alloy containing at least about 50 weight percent Bi, up to about 50 weight percent Sn (basis total Sn and Bi), and an effective amount of a physical and mechanical property enhancing third component. The third component can be Cu, In, Ag, and combinations of Cu and Ag.
Type:
Grant
Filed:
June 16, 1993
Date of Patent:
November 29, 1994
Assignee:
International Business Machines, Inc.
Inventors:
Stephen G. Gonya, James K. Lake, Randy C. Long, Roger N. Wild
Abstract: Disclosed is a method of producing vias and through holes through a metal laminate. The laminate is a multi-layer, for example, a trilayer of a relatively hard metal between two layers of a relatively soft metal. The method includes the steps of first etching a clearance hole through the soft metal on one side of the trilayer laminate, followed by partially etching the hard metal layer. Next, drilling the remaining thickness of the hard metal, and drilling through the second layer of soft metal.
Type:
Grant
Filed:
July 27, 1993
Date of Patent:
November 15, 1994
Assignee:
International Business Machines, Inc.
Inventors:
Robert D. Edwards, Frank D. Egitto, Thomas P. Gall, Paul S. Gursky, David E. Houser, James S. Kamperman, Warren R. Wrenner
Abstract: Disclosed is a method of manufacturing a printed circuit panel. The method is carried out without a cleanroom, but in a clean room environment. The first step is to place a thin, non-rigid panel in a suitable fixture, for example, for transfer and also for processing. The fixtured panel is then placed in an air tight transfer container, which has a substantially contaminant free atmosphere. The transfer container has a sealed door at one end. The transfer container is then brought into a seaiable, substantially airtight interlock with a process enclosure. This process enclosure also has a substantially contaminant free atmosphere, and a sealed door at one end. An airtight seal is formed between the transfer container and the process enclosure, and also between the surfaces of the two doors. This is to avoid introducing surface contaminants into the process enclosure and transfer container atmospheres. Next, the two doors are opened simultaneously.
Type:
Grant
Filed:
June 19, 1992
Date of Patent:
November 15, 1994
Inventors:
Lewis C. Hecht, Merritt P. Sulger, deceased, by Ellen Sulgar, executrix, Ernst E. Thiele, Mark V. Pierson, Lawrence E. Williams
Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
Type:
Grant
Filed:
July 27, 1993
Date of Patent:
September 20, 1994
Assignee:
International Business Machines Corporation
Inventors:
Thomas P. Gall, Howard L. Heck, John S. Kresge
Abstract: A method of defining, creating, or editing a graphical user interface panel file. The graphical user interface panel contains a plurality of nested graphical objects. According to the disclosed method the end-user opens a graphical user interface source code file and operates on an object that contains at least further nested object. For example, the nesting object may be a box, and the nested objects may be pushbuttons. The nested object file is a linked list that includes an object start identifier, an object end identifier, and included object pointers therebetween for the included objects. Each included object has an included object pointer. The enables the end-user to perform an operation on the object start identifier, which initiates a search for included objects having pointers between the object start identifier and the object end identifier. This allows the same operation to be performed on the included objects.
Type:
Grant
Filed:
April 7, 1992
Date of Patent:
September 13, 1994
Assignee:
International Business Machines Corporation
Inventors:
John P. Barrett, Robert P. Hoffmann, John D. Montgomery
Abstract: A method of defining, creating, or editing a graphical user interface panel. According to the method, a user opens a graphical user interface source code file. This source code file contains an entry for the user interface panel and for each object, as an icon, an action bar, or the like, within the panel. The object entries include the size and location of the object. The user edits the source code file in a dynamic sizing, What You See Is What You Get environment. A compiler compiles the graphical user interface source code file to form a graphical user interface object code file. The compiler also updates the size and location object entries of each graphical object, dynamically sizing the size and location object entries.
Type:
Grant
Filed:
April 7, 1992
Date of Patent:
September 13, 1994
Assignee:
International Business Machines Corporation
Inventors:
Robert P. Hoffmann, Jerry W. Malcolm, John D. Montgomery, Steve S. Stone
Abstract: Disclosed is a method for manufacturing a stacked circuitized flex structure. The structure is a laminate for Z-axis communication within a parallel processor. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication. Z-axis circuitization is carried out by providing vias and through holes in individual circuitized flex strips. These vias and through holes are circuited and plated. This is followed by filling the vias and through holes with solder and forming solder bumps at the tops and bottoms of the vias and through holes. A sticker sheet with clearance holes for the solder bumps is provided, and a plurality of the circuitized flex strips are laid up for lamination to form a stack of circuitized flexible strips.
Type:
Grant
Filed:
July 27, 1993
Date of Patent:
September 13, 1994
Assignee:
International Business Machines Corporation
Abstract: Disclosed is a high solidus temperature, high service temperature, high strength ternary solder alloy. The components of the alloy are a major portion of Sn and lesser portions of Bi, and In.
Type:
Grant
Filed:
June 16, 1993
Date of Patent:
September 6, 1994
Assignee:
International Business Machines Corporation
Inventors:
Stephen G. Gonya, James K. Lake, Randy C. Long, Roger N. Wild
Abstract: Disclosed is a transfer container for carrying circuit panels in and between substantially contaminant free environments. The walls of the transfer container are fabricated out of substantially particulate free, unfilled polymers, such as polycarbonate. One of the end walls is an access wall. The access wall has an opening surrounded by a ferromagnetic gasket. This gasketed opening is adapted to receive a ferromagnetic door panel. The side walls, and the top and bottom walls may extend beyond the access wall, with the ends of said walls defining a plane, so that the access wall is recessed with respect to the plane defined by the said extensions. Each of the side walls have co-planar bracket pairs for holding circuit panels. Either one of, or preferably both brackets of a bracket pair have pyramidal or conical positioning pins. These pins extend upwardly from the brackets and are adapted to receive and hold a workpiece in place.
Type:
Grant
Filed:
June 19, 1992
Date of Patent:
August 23, 1994
Assignee:
International Business Machines Corporation
Inventors:
Lewis C. Hecht, Merritt P. Sulger, deceased, Ernst E. Thiele, Mark V. Pierson, Lawrence E. Williams
Abstract: Disclosed is a solder tool for reworking a pin-in-hole printed circuit board. The solder tool has means for providing a gas blanket. Also disclosed is a method of reworking a pin-in-hole printed circuit board using the solder tool.
Type:
Grant
Filed:
December 10, 1993
Date of Patent:
August 23, 1994
Assignee:
International Business Machines Corporation
Abstract: Disclosed is a high solidus temperature, high service temperature, high strength multi-component solder alloy containing a major portion of Sn, and effective amounts of Ag, Bi and In. Preferably the solder alloy contains 78.4 weight percent Sn, 2.0 weight % Ag, 9.8 weight % Bi, and 9.8 weight % In.
Type:
Grant
Filed:
June 16, 1993
Date of Patent:
July 12, 1994
Assignee:
International Business Machines Corporation
Inventors:
Stephen G. Gonya, James K. Lake, Randy C. Long, Roger N. Wild
Abstract: Disclosed are thin film triazine adhesives on organic carriers, method for making them and microelectronic circuit packages incorporating them. The circuit package has a substrate made up of organic, dielectric, polymeric sheets. At least one pair of the polymeric sheets face each other and are adhesively joined together by a triazine polymer.
Type:
Grant
Filed:
December 13, 1991
Date of Patent:
June 7, 1994
Assignee:
International Business Machines Corporation
Inventors:
Konstantinos I. Papathomas, David W. Wang, William J. Summa, Ashit A. Mehta
Abstract: Disclosed is a method of drilling, desmearing, and additively circuitizing a printed circuit board. The printed circuit board is drilled under conditions which produce glass and polymer smeared vias and through holes. The particulate debris is removed by vapor blasting the drilled printed circuit board. Next the printed circuit board is soaked in a solvent to swell the drill smear on the circuit interplanes of the printed circuit board. This solvent is then removed by entrainment in a gas, and a stream of an aqueous, acidic, oxidizing solution is passed through the printed circuit board holes to remove swollen smear in the thru holes and produce an etchback of conductors. After a water rinse an aqueous reducing solution is passed through the printed circuit board to reduce and remove aqueous acidic oxidizing solution, e.g., residual aqueous acid oxidizing solution. The printed circuit board is rinsed to remove the aqueous reducing solution.
Type:
Grant
Filed:
February 10, 1993
Date of Patent:
May 17, 1994
Assignee:
International Business Machines Corporation
Inventors:
Warren A. Alpaugh, Anilkumar C. Bhatt, Michael J. Canestaro, Robert J. Day, Edmond O. Fey, John E. Larrabee