Abstract: A firewall isolates computer and network resources inside the firewall from networks, computers and computer applications outside the firewall. Typically, the inside resources could be privately owned databases and local area networks (LAN's), and outside objects could include individuals and computer applications operating through public communication networks such as the Internet. Usually, a firewall allows for an inside user or object to originate connection to an outside object or network, but does not allow for connections to be generated in the reverse direction; i.e. from outside in. The disclosed invention provides a special "tunneling" mechanism, operating on both sides of a firewall, for establishing such "outside in" connections when they are requested by certain "trusted" individuals or objects or applications outside the firewall.

Abstract: A conference server system, for internal use in the public switched telephone network (PSTN), links to public data communication networks (e.g. the Internet) for distributing computer displayable data between participants in voice telephone conferences. The server system includes a computer sub-system for storing data generated by the participants and distributing the data in coordination with voice presentations of respective participants. Data so stored and distributed includes computer-displayable data. Other data handled by the computer subsystem represents commands and functional requests issued by participants which pertain to the handling of computer-displayable data and voice parameters of the conference. Conference participants, having separate and concurrent access to both the PSTN and the data network, receive and view computer-displayable data prepared by one of the participants in coordination with the respective voice conference.

Abstract: This invention allows customers and other users of the Public Switched Telephone Network (PSTN) to enable, disable or modify special services provided by the network. The PSTN is defined here as all equipment world wide (land-based, radio or other) enabling ordinary telephone users to connect to other telephone users, but excludes private telephone networks such as "tie line" systems maintained or leased by private enterprises. Presently contemplated actions can be taken independent of the state of the customer's telephone line (e.g. on-hook or off-hook), and usually involve use of equipment other than telephones and communication networks other than the PSTN (e.g. computers operating through the Internet and pagers operating through pager networks). The special services include existing services (call waiting, call blocking, call forwarding, etc.) and new ones (e.g. transferring an active call from a desk phone to a mobile cellular one without interrupting the call).

Abstract: The disclosure allows for creation of special web-page repositories within subsystems of the present PSTN (public switched telephone network) that conform to present architectures for advanced intelligent network (AIN) constructs in telephony. Such repositories would be formed to receive facsimile (fax) telephone transmissions, convert them to HTML (Hypertext Markup Language) web page format, store the converted results and render the latter available for viewing simultaneously--under control of PSTN call management intelligence--to multiple users of the Internet and World Wide Web subject to authorization of would be viewers by the sending party.

Abstract: A system arrangement and method are disclosed for determining location of a wireless mobile unit involved in a call for public emergency assistance (e.g. a "911" call). The system is cost-effective in that it makes extensive use of existing telecommunication infrastructures, and does not require either special hardware or software at either the mobile unit site or the emergency assistance center handling a call. The system features shared use of a computer and specially defined database among a plurality of mobile switching offices serving a larger plurality of mobile base stations, the latter serving an even larger plurality of antenna and transceiving sites within predefined cellular regions.

Abstract: Encoded color image data, stored in a first format such as YUV or YIQ, is converted to RGB format for output to a color display system. The conversion is carried out in real time synchronism with generation of the display, in order to minimize buffer storage requirements for the RGB output data. Present circuits use RAM (random access memory) storage arrays lookup tables for product functions defined in associated conversion equations. Each product function is a product of multiplication of a predetermined constant and data representing a U or V component of a source image pixel. Use of these tables effectively speeds up the conversion process, and has the added advantage of flexibility since the respective data is changeable to adjust to various image and display formats and conditions. In one embodiment, a RAM array used in the present format conversion process is also used (in a different display mode, with different stored data) as a conventional source of palette data.

Abstract: Network browser applications are improved by providing visual status indications informing users that currently displayed pages are one of: old (outdated), partly old or new. Conventional browser applications load old or partly old page information from a cache and new information from a (usually remote) server to which the browser links via a network. A user expecting to view only new information (e.g. informant that might be useless if out of date) is alerted by present status indications to request the browser to reload the entire page; which the user can do by operating a reload selector/icon conventionally presented by the browser. Various alternative status indications are shown, along with potential associations of such with a reload selector button (or equivalent icon).

Abstract: Disclosed apparatus and method enable a host computer or server in a non-synchronous data communication network--e.g. a network in which data is subject to routing over transmission paths of indefinite configurations and lengths, and receptive handling of indefinite duration--to gather time statistics from client computers or terminals receiving the data; particularly statistics useful for determining: (a) transit times of data from server to clients; (b) times elapsed at client stations, between reception of data and one or more events pre-specified in information accompanying the data; and (c) transit times of return messages sent from respective client stations to the server. Control information attached to transmitted data includes a "timing script" written in a scripted language subject to interpretation by software at the client station receiving the data.

Abstract: A visual feedback aid, for a computer system performing speech recognition functions, provides indications on a display monitor of the system representing the current state of operation of a system microphone, the current mode of operation of the system in respect to speech, and a string of text representing the system's recognition (correct or incorrect) of commands instantly spoken into the microphone. The indications preferably are located in a reserved area of a display window associated with a currently active application involving speech recognition. The reserved area preferably would be a prominent one, such as the application title bar.

Abstract: There is provided a Direct Access Memory Unit (DAu) that is associated with a remote processor module in a multi-processing system. The DAU performs Direct Memory Access (DMA) operations independently of a Central Processing Unit (CPU) in the remote processor module. The CPU requests a DMA by writing information relevant to the DMA to the remote processor's memory. The address of each control block is written to a circular queue, also in the remote processor's memory. The DAU determines if there are any control blocks to process and if so, the DAU will perform the DMA operation (reading data from or writing data to the memory of the host processor), all without the intervention of the CPU of the remote processor module. The CPU adds a new control block by loading its address in a location in the circular queue that is ahead of the circular queue location that the DAU is processing. The CPU can abort a pending DMA request during DAU operations by setting a skip bit in the control block.

Abstract: An arrangement of cells with input and output steering circuitry as well as internal shifting capabilities is disclosed which advantageously provides a first in/first out (FIFO) register circuit which can be written to and read from in contiguous clock cycles. The FIFO register circuit is provided with an arrangement of self contained FIFO cells, each cell containing its own input multiplexer and control circuitry.

Abstract: DMA adapters which perform programmed data transfer operations in response to descriptors are programmed by information in the same descriptors (and adapter logic responsive to that information) to perform various ancillary control functions relative to addressable I/O devices that conventionally would be addressed and controlled directly by a host (higher level) system processor (e.g., the processor that prepares the descriptors). The ancillary control functions are variable programmably in number (e.g., in the disclosed embodiment, one descriptor can define 0, 1 or 2 discrete ancillary control operations) and effects produced by each operation are programmably variable (e.g., ancillary operation can be used by the adapter to alter states of addressed devices; for example, to prepare a device that has been transferring data in one direction, in a half-duplex mode, for transferring data in the opposite direction, or to switch to a full duplex mode, etc.).

Abstract: A processor stores descriptors without explicit linkages, in non-contiguous memory locations, and sequentially hands them off to an adaptor which manages scheduling and processing of data transfers defined by the descriptors. Each descriptor is handed off in a request signalling process in which the processor polls the availability of a request register in the adaptor, and writes the address of a respective descriptor to that register when it is available. The adapter then schedules processing of the descriptor whose address is in the request register. The adapter manages a "Channel Descriptor Table" (CDT), which defines the order of processing of descriptors designated by the requests. In effect, the CDT defines a linked list queue into which the adapter installs descriptors, in the sequence of receipt of respective requests. Using the CDT information, the adapter retrieves successively queued descriptors and controls performance of operations (data transfer or other) defined by them.

Abstract: An adaptation of a computer operating system manages storage of EA (extended attribute) data in association with object names, the latter representing paths in direct access storage devices (e.g. directories and sub-directories), and data files stored in such paths. EA data stored in association with a data file name can be accessed either jointly with or separate from the respective data file. EA data comprises one or more variable length sets of bytes stored in disk drive sectors assigned by the operating system. The location of each set is determinable by means of an EA handle that is stored in a path table containing the respective object name. Function calls from application programs to the operating system use either a file name or EA handle to access EA data. Function calls specifying only an EA handle allow EA information to be stored, modified or read without specific association to or linkage with file data.

Abstract: Disclosed is a basic DCVS (differential cascode voltage switch) tree construct, which can be used as a uniform basis for constructing DCVS logic circuits, register-latch circuits and circuits which can be conditioned individually to function as either or both DCVS logic and register-latches. In addition to logic and load sections that may be identical to corresponding sections of prior art DCVS trees, this construct contains gating elements for providing unique functions of isolation, precharge support and latch input coupling. The isolation function is used to electrically isolate the logic and load sections from each other, so that each section can be made to operate in a mode which is independent of the other section. The precharge support function allows precharging of circuits in the logic section without involvement of the load section. The latch input coupling function allows signals to be applied to and latched in the load section from a source other than the respective logic section.

Abstract: In a computer system having both peripherals having their own DMA channel arbiter and peripherals having no arbiter, a separate arbitration unit, controlled directly by the CPU, is provided to arbitrate on behalf of peripherals having no arbiter. The CPU can thus freely assign different arbitration levels to such peripherals, and can instruct the arbitration unit to simultaneously arbitrate on different arbitration levels or for two or more DMA channels.

Abstract: Subject burst time division multiplex interface connects circuits which perform "layer 1 (L1)" line control functions relative to a data communication network with devices which perform "Layer 2 (L2)" link control functions relative to the same network (L1 and L2 defined by OSI Specifications of the International Standards Organization). The interface is characterized by presentation of bursts of readiness indicating pulses from the L1 circuit to the L2 device during each basic time division multiplex time slot. The pulses indicate readiness of the circuits for data bit exchange, and separate time overlapped bursts are sent to indicate readiness of the circuits to send and receive data bits. Each burst contains a varied number of pulses ranging from 0 to n (where n is greater than 2, and in the disclosed embodiment equals 8). The bursts are positioned in a window of time occupying a fraction of the slot interval close to the end of each slot.

Abstract: In a multitasking data processing system, I/O requests to a disk drive are staged in holding queues from which they are transferred to a service queue. Requests in the latter queue are directly serviced on a FIFO basis by a device driver module running on the system. The system maintains a set of holding queues and an associated service queue separately for each physical drive in the system. Holding queues in each set are prioritized in accordance with base priorities of tasks, and I/O requests to disk drives are entered into associated holding queues having priorities corresponding to those of task threads for which such requests are originated. Prioritization of the holding queues, and a starvation advancement process performed to advance "oldest" enqueued requests to higher priority holding queues, causes the requests to be presented to the disk drive in a sequence based in part on respective task priorities and in part on "fairness" servicing of "service starved" requests.

Abstract: A "single-chip" integrated circuit device, useful in ISDN digital voice and data telephone applications, links plural channels of a data communication network with memory and CPU components of a data processing system. The device couples to the system via a bus that may be shared by other devices, and bidirectionally exchanges service information signals with the system CPU, and communication data signals with system memory. The service information includes device control information furnished by the CPU, and (channel and device) status information prepared by the device. The device contains multiple logic circuit units, operating in relative functional autonomy, and buffer memory units for storing service information and data. Units which interface to the network operate in synchronism with network communication processes. Units which interface to the system bus operate in asynchronous relation to network processes.

Abstract: An integrated data link control device (IDLC) interfaces between a host computer system and external channels in a communication network. The device contains multiple internal channels allocatable individually to interface to the external channels, each internal channel having internal buffer memory reserved to it for storing data signals handled by it. The device also includes facilities for selectively configuring groups of its internal channels into "extended channels", some of which are termed Hyper Channels. Channels in each extended channel group interface collectively and in time coordination to one external channel, presenting an effective bandwidth to the external channel which is greater than the bandwidth of any single internal channel.