Patents Represented by Attorney Robert O. Groover
  • Patent number: 4596069
    Abstract: The disclosure relates to a monolithic circuit and method of making same which includes the use of two substrates of different semiconductor materials or two substrates of the same semiconductor material wherein the processing steps required for certain parts of the circuit are incompatible with the processing steps required for other parts of the circuit.
    Type: Grant
    Filed: July 13, 1984
    Date of Patent: June 24, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Burhan Bayraktaroglu
  • Patent number: 4594711
    Abstract: A test circuit, called a universal testing block (UTB) for on-chip testing of a VLSI subsystem such as a ROM or an ALU has several modes, including test generator and test evaluator, formed on the VLSI chip. The test generator circuit includes means for applying a predetermined test pattern to an input channel of the subsystem and may be a generator for generating pseudorandom test patterns for application to the subsystem. Alternatively, the test generator may be a counter which can be selectively activated to generate a binary up-count. The UTB also has a shift register mode having a serial input and output to enable serial data to be shifted into and out of the subsystem in parallel fashion. The test evaluator circuit receives output signals from the subsystem, and includes a parallel signature analyzer to generate a signature of the subsystem after the application of the test patterns by the input circuit to indicate whether the subsystem is fault-free.
    Type: Grant
    Filed: November 10, 1983
    Date of Patent: June 10, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Satish M. Thatte
  • Patent number: 4592308
    Abstract: A molecular beam epitaxy system wherein the wafer on which epitaxial deposition is to occur is not soldered to a substrate holder. Instead, a substrate holder with a lip approximately as high as the thickness of the wafer is used, and a retaining ring attaches to the substrate holder to hold the wafer in place during the growth cycle. The retaining ring, like the substrate holder, is made of high-purity refractory material, such as arccast molybdenum. The substrate holder and retaining ring are dimensioned to hold the wafer somewhat loosely, to allow for thermal expansion during the cycling up to growth temperature, which is typically about 600.degree. C.
    Type: Grant
    Filed: August 23, 1984
    Date of Patent: June 3, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Hung-Dah Shih, Tommy J. Bennett
  • Patent number: 4591409
    Abstract: The disclosure relates to a method for producing single crystal silicon from a polycrystalline silicon melt wherein dopants such as oxygen and nitrogen are uniformly distributed in the crystal both along the crystal axis and radially therefrom. This is accomplished by identifying the correct species in the melt and above the melt and determining the thermochemical equilibrium between the two chemical species which lead to a change of the composition of the silicon single crystal during the entire growth process. This approach effectively circumvents the segregation coefficient during the growth process through the control of the concentration of the dopants in the melt.
    Type: Grant
    Filed: May 3, 1984
    Date of Patent: May 27, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Eva A. Ziem, Graydon B. Larrabee, David E. Witter
  • Patent number: 4585991
    Abstract: A high density multiprobe including a multiprobe on a semiconductor substrate with contact pads selectively positioned in relation to the contacts of a device to be tested. Each of the selectively positioned contacts on the multiprobe semiconductor substrate include an elevated conductive surface that makes physical and electrical contact with the contacts of the device to be tested. In addition, the elevated conductive surfaces on the multiprobe are conductively connected to interface terminals on the semiconductor substrate to allow test signals to be input and output from the multiprobe device during testing. The multiprobe semiconductor substrate is also capable of containing onboard circuitry including buffers and logic circuitry for processing the test signals to be sent to and received from the device under test. A multiprobe testing device is also disclosed that includes the multiprobe semiconductor substrate with elevated contacts to allow for the testing of a semiconductor device.
    Type: Grant
    Filed: March 13, 1985
    Date of Patent: April 29, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Lee R. Reid, Tommy D. Cody
  • Patent number: 4582588
    Abstract: The disclosure relates to a method of sealing the surface of an aluminum member, such as an aluminum foil, from the environment by first placing the foil in an H.sub.2 SO.sub.4 bath to form an oxide which normally will not provide a total seal of the aluminum from the environment and then placing the aluminum member with oxide thereon in an H.sub.3 PO.sub.4 bath to close the pores in the oxide layer and provide sealing of the aluminum from the environment. This process also passivates the silicon.
    Type: Grant
    Filed: September 4, 1984
    Date of Patent: April 15, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Millard J. Jensen, Jules D. Levine
  • Patent number: 4581621
    Abstract: Quantum-coupled devices, wherein at least two closely adjacent potential wells, (e.g. islands of GaAs in an AlGaAs lattice) are made small enough that the energy levels of carriers within the wells are discretely quantized. This means that, when the bias between the wells is adjusted to align energy levels of the two wells, tunneling will occur very rapidly, whereas when energy levels are not aligned, tunneling will be greatly reduced. To provide output coupling from these quantum-well devices to macroscopic currents, the output from the quantum-well devices is injected into localized states close to an extremely small metal line (e.g. 200 Angstroms square in section). These trapped charged perturb the resistance of a metal line significantly, so that a conventional sense amplifier can be used for differential sensing between two such narrow metal lines, to provide macroscopic outputs.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: April 8, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Mark A. Reed
  • Patent number: 4581103
    Abstract: The disclosure relates to a method of etching semiconductor material wherein the material is secured in an oxide coated aluminum foil which acts as an etchant mask. The portion of the material extending from one side of the foil can then be etched with a semiconductor material etchant with the remainder of the material being masked from the etchant by the foil.
    Type: Grant
    Filed: September 4, 1984
    Date of Patent: April 8, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Jules D. Levine, Millard J. Jensen
  • Patent number: 4577232
    Abstract: This specification discloses a CCD imager which includes a line addressing circuit (24) which selectively addresses CCD imaging gates (48). Output signals are clocked under the gates (48) to a buffer register (30) which is constructed in the form of a tree. Signals from under each of the CCD gates (48) travel an identical length path through the buffer register (30) to a charge detection circuit (46) measured by the number of pixels involved. The output signals thus take the same time, or same number of clock pulses, to travel the length of the buffer register (30) to enable all line switching to be accomplished during the horizontal blanking time of a television thus eliminating the switching noise from the television screen.
    Type: Grant
    Filed: August 31, 1984
    Date of Patent: March 18, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 4575924
    Abstract: The present invention teaches a process for fabrication of quantum-well devices, in which the quantum-wells are configured as small islands of GaAs in an AlGaAs matrix. Typically these islands are roughly cubic, with dimensions of about 100 Angstroms per side. To fabricate these, an n- on n+ epitaxial GaAs structure is grown, and then is etched to an e-beam defined patterned twice, and AlGaAs is epitaxially regrown each time. This defines the quantum wells of GaAs in an AlGaAs matrix, and output contacts are then easily formed.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: March 18, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Mark A. Reed, Robert T. Bate
  • Patent number: 4571603
    Abstract: An image projection system for producing a projected image in response to electrical signals which represent the image to be projected. The projection system includes input capability to produce electrical signals in response to an image to be projected. These electrical signals are then transmitted to a light modulator which receives light from an external source. The light modulator consists of arrays of deformable mirrors which selectively deflect the light from the external source in response to the electrical signals received from the input capability. The deflected light is absorbed by opaque stops. The undeflected light travels through optics which form the projected image. A printer using this image projection system is also disclosed. The printer further includes the ability to develop the projected image in such a manner that the image is transferrable to a paper surface in a printer in such a manner that the image is reproduced upon the surface in a printer form.
    Type: Grant
    Filed: January 10, 1984
    Date of Patent: February 18, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Larry J. Hornbeck, William E. Nelson, James T. Carlo
  • Patent number: 4569829
    Abstract: A molecular beam epitaxy system including a growth chamber and an analysis chamber, both connected to ultrahigh vacuum pump systems. The analysis chamber includes a source outgassing mount, so that, while growth is proceeding in the growth chamber, a newly received source can be outgassed in the special mount connected to the analysis chamber. Preferably the exhausted cryogenic gases from the cryo shield in the growth chamber are used to cool the source outgassing mount on the analysis chamber, to minimize the contamination of the analysis chamber by contaminants outgassed.
    Type: Grant
    Filed: November 10, 1983
    Date of Patent: February 11, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Hung-Dah Shih
  • Patent number: 4568889
    Abstract: In a distributed IMPATT structure, power is coupled out through a side contact. That is, in previously proposed distributed IMPATT structures, the gain medium (the active region of the IMPATT) operates as a transmission line. The prior art has attempted to couple output power from the gain medium through an end contact, i.e., through a contact which is perpendicular to the primary direction of energy propagation (and also to the direction of maximum elongation) of the active medium. In the present invention, a sidewall contact extends in a direction which is parallel to the principal direction of propagation of the energy in the active medium. Thus, the sidewall contact plus the active region together can be considered as a single transmission line. This extended transmission line is also connected to a second distributed semiconductor element which functions as a varactor.
    Type: Grant
    Filed: August 31, 1983
    Date of Patent: February 4, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Burhan Bayraktaroglu
  • Patent number: 4566935
    Abstract: Methods of fabrication of spatial light modulators with deflectable beams by plasma etching after dicing of a substrate into chips, each of the chips an SLM, is disclosed. Also, various architectures available with such plasma etching process are disclosed and include metal cloverleafs for substrate addressing, metal flaps formed in a reflecting layer over a photoresist spacer layer, and torsion hinged flaps in a reflecting layer.
    Type: Grant
    Filed: July 31, 1984
    Date of Patent: January 28, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Larry J. Hornbeck
  • Patent number: 4556808
    Abstract: A single-pole-double-throw microwave monolithic switch is realized by employing shunt connected field effect transistors interconnected with microstrip transmission lines on a gallium arsenide substrate. A low-pass network, configured with quasi-lumped elements, is used to achieve a 90.degree. phase shift between the transistors and the input point. The FET gate width is selected to yield the appropriate source-drain capacitance, which forms one element of the low-pass network comprising the respective switch output path. Use of this inventive structure yields the bandwidth offered by the conventional shunt switch and the small size achievable in the series switch configuration.
    Type: Grant
    Filed: June 3, 1982
    Date of Patent: December 3, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Robert P. Coats
  • Patent number: 4545116
    Abstract: A method of forming a metallic silicide on silicon or polysilicon in which a masking layer such as silicon dioxide is formed on a silicon slice and patterned to expose selected areas of the slice surface. The slice is then sputter etched followed by in situ deposition of a metal layer. The slice is heated to convert the portion of the metal layer in contact with the silicon and/or polysilicon to a metal silicide, then the non-converted metal is removed by a selective etchant. According to another embodiment of the invention a titanium layer is deposited and reacted in an ambient including nitrogen to prevent the out-diffusion of silicon through the TiSi.sub.2 and titanium layers.
    Type: Grant
    Filed: May 6, 1983
    Date of Patent: October 8, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Chi K. Lau
  • Patent number: 4541167
    Abstract: The disclosure relates to a method manufacturing semiconductor devices which minimizes encroachment by utilizing a polycrystalline silicon (polysilicon) layer over a grown oxide on the substrate with a nitride layer positioned above the polysilicon layer. A patterned resist is then formed in the active device regions and the device is then etched in the regions where the resist has not been applied to remove the nitride layer, the polysilicon layer and the oxide layer in one embodiment and, in a second embodiment, also removes a portion of the substrate. The silicon substrate portion which is exposed is then oxidized by field oxidation to provide, in the first embodiment, an oxide layer which rises above the level of the polysilicon layer and, in the second embodiment, to a point equal to or slightly above the oxide layer beneath the polysilicon layer. The nitride and polysilicon layer are then stripped or, alternatively, the polysilicon layer can be oxidized.
    Type: Grant
    Filed: January 12, 1984
    Date of Patent: September 17, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Robert H. Havemann, Gordon P. Pollack
  • Patent number: 4536886
    Abstract: Pole encoding of a linear predictive all-pole model of speech is accomplished by first finding poles up to the number required for good prediction (e.g., ten). These poles are extracted from the LPC predictor polynomial, using, e.g., a slightly modified Bairstow method. Those poles having a sufficiently narrow bandwidth (i.e., those sufficiently near the unit circle) are separately encoded, since these poles generally correspond to perceptually important formants. The remaining poles are lumped together to form a residual polynomial. The residual polynomial is then transformed to produce reflection coefficients, and all reflection coefficients above the first two are discarded. This provides an efficient spectral-shaping polynomial of a reduced degree. Thus, pole encoding is made possible using a reduced and adaptively varied bit rate.
    Type: Grant
    Filed: May 3, 1982
    Date of Patent: August 20, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Panos E. Papamichalis, George R. Doddington
  • Patent number: 4505949
    Abstract: An apparatus and method for depositing a layer of a surface-compatible material from the gas phase onto a selected surface area of a substrate body using a plasma adjacent the substrate body to create a source gas which is decomposed by a laser or other source of energy on the selected surface area. The plasma-generated source gas may be varied by changing targets within the plasma or the reactant gases, and the laser energy may cause decomposition of the source gas by photolysis or pyrolysis or a combination of both.
    Type: Grant
    Filed: April 25, 1984
    Date of Patent: March 19, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Edward C. Jelks
  • Patent number: 4502915
    Abstract: The disclosure relates to a two-step for selective anisotropic etching of polycrystalline silicon having a silicon dioxide base thereunder and an exposed opposing face with contaminants thereon including silicon dioxide without leaving a residue wherein the silicon is initially etched with a non-selective etchant for a distance below all contaminants and then an etchant used is a highly anisotropic selective polycrystalline silicon etchant.
    Type: Grant
    Filed: January 23, 1984
    Date of Patent: March 5, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Duane E. Carter, Rhett B. Jucha