Patents Represented by Attorney, Agent or Law Firm Sawyer Law Group LLP
  • Patent number: 7133253
    Abstract: A thin film electromagnetic head has an inductive transducer with a ferromagnetic pole layer terminating adjacent a media-facing surface at a pole tip surface. The pole layer has side surfaces each having an end region that meets the pole tip surface, the end regions increasingly separated with increasing distance from the pole tip surface. Having a pole layer that is tapered to the point at which it meets the pole tip surface channels flux more efficiently for writing on-track as opposed to off-track. Such a tapered pole tip can be formed for a pair of pole layers separated by a submicron nonferromagnetic gap, or for a single perpendicular writing pole layer.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: November 7, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: David J. Seagle, G. Vinson Kelley
  • Patent number: 7130209
    Abstract: A method and system for protecting a memory having a plurality of blocks from modification is disclosed. The method and system include providing a plurality of one time programmable (OTP) cells and OTP cell logic coupled with the OTP cells. An OTP cell of the plurality of OTP cells corresponds to a portion of a block of the plurality of blocks. The OTP cell allows modification of the portion of the block when the OTP cell is in a first state and permanently prevents modification of the portion of the block when the OTP cell is in a second state. The OTP cell logic uses the plurality of OTP cells to select the portion of the block as corresponding to the OTP cell. This portion of the block is write protected when the OTP cell is placed in the second state.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: October 31, 2006
    Assignee: Atmel Corporation
    Inventors: Riccardo Riva Reggiori, Lorenzo Bedarida, Giorgio Oddone, Fabio Tassan Caser
  • Patent number: 7130294
    Abstract: The present invention comprises a MMDS broadcast digital video cell system on one polarization and a smaller array of cells, designed for two way services that use the orthogonal polarization in the same area. The present invention includes a method for distributing information in a MMDS network comprising the steps of providing a video signal in a first polarization and a first direction to a first area, the video signal having a frequency within a predetermined set of frequencies, the method further includes providing a two-way digital signal in a second polarization and a second direction to the first area, the two-way digital signal having a frequency within the predetermined set of frequencies, wherein the second polarization is orthogonal to the first polarization. The present invention also includes a system for distributing information in a MMDS network comprising a digital video signal transmitter, wherein the video signal has a first polarization.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: October 31, 2006
    Inventors: Keith Hugenberg, Malcom I. Ziegler, Malik Audeh
  • Patent number: 7131126
    Abstract: A network system built in a distributed system environment includes a server having a first ORB, a client having a second ORB, specifications for which are different from those for the first ORB, and a naming server which registers a profile object to disclose specifications for the first ORB through a naming service of the naming server. The second ORB in the client accesses the profile object through the naming server, grasps the specifications for the first ORB, and performs IIOP intercommunications according to the grasped specifications. The network system improves reliability and communication efficiency in intercommunication between ORBs with different specifications.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventor: Hiroshi Yamamoto
  • Patent number: 7126202
    Abstract: A method and system for providing a magnetic element is disclosed. The magnetic element include providing a pinned layer, a spacer layer, and a free layer. The method and system also include providing a heat assisted switching layer and a spin scattering layer between the free layer and the heat assisted switching layer. The spin scattering layer is configured to more strongly scatter majority electrons than minority electrons. The heat assisted switching layer is for improving a thermal stability of the free layer when the free layer is not being switched. Moreover, the magnetic element is configured to allow the free layer to be switched due to spin transfer when a write current is passed through the magnetic element.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: October 24, 2006
    Assignee: Grandis, Inc.
    Inventors: Yiming Huai, Mahendra Pakala
  • Patent number: 7126790
    Abstract: A magnetic head for writing information on perpendicular media has a write pole tip and a return pole tip with a media-facing area at least two orders of magnitude greater than that of the write pole tip, the return pole tip is spaced from a trailing corner of the write pole tip by a submicron nonferromagnetic gap. Magnetic flux emanating from the write pole tip is strongest adjacent the trailing corner and directed at an angle that is not perpendicular to the write pole tip. The angled flux provides increased torque to rotate magnetic dipoles in the adjacent media layer that are oriented substantially perpendicular to the disk surface. The media may have a soft magnetic underlayer that is spaced from the write pole tip by a distance similar to the gap spacing.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: October 24, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Francis H. Liu, Kroum S. Stoev, Yugang Wang
  • Patent number: 7126873
    Abstract: Through the use of an allocation logic unit with a Flash controller, a single primary chip enable is de-multiplexed into a multiple secondary chip enables for multiple Flash memory dies or chips. In so doing, Flash storage device capacity is greatly expanded. In a first aspect, a memory package includes a plurality of memories; and an allocation logic unit coupled to the plurality of memories for receiving a single chip enable signal. The allocation logic unit de-multiplexes the single chip enable signal to a plurality of chip enable signals. Each of the plurality of chip enable signals access to one of the plurality of memories. In a second aspect, a printed circuit board (PCB) includes a Flash controller for providing at least one primary chip enable signal. The PCB also includes a plurality of Flash memory chips and at least one allocation logic unit coupled to at least a portion of the plurality of Flash memory chips and the Flash controller.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: October 24, 2006
    Assignee: Super Talent Electronics, Inc.
    Inventors: Sun-Teck See, Horng-Yee Chou, Charles C. Lee
  • Patent number: 7126788
    Abstract: A magnetic head for writing information on perpendicular media has a write pole tip, a return pole tip and a deflection pole tip is disclosed. The return pole tip has a media-facing area at least two orders of magnitude greater than that of the write pole tip, and the deflection pole tip is spaced from a trailing corner of the write pole tip by a submicron nonferromagnetic gap. Magnetic flux emanating from the write pole tip is strongest adjacent the trailing corner and directed at an angle that is not perpendicular to the write pole tip. The angled flux provides increased torque to rotate magnetic dipoles in the adjacent media layer that are oriented substantially perpendicular to the disk surface. The media may have a soft magnetic underlayer that is spaced from the write pole tip by a distance similar to the gap spacing.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: October 24, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Francis H. Liu, Kroum S. Stoev, Yugang Wang
  • Patent number: 7127691
    Abstract: An improved method and process is provided for verifying a digital logic design complies with certain manufacturing test rules or guidelines. A replacement is created for any portion of a design to make it usable by the manufacturing test tool set, without requiring the contents of that portion of the design to be implemented. The inputs and outputs of a portion of the design are examined for violations of the manufacturing test rules or guidelines. If there are no violations, the contents of this portion of the design are replaced with some basic contents which satisfy the manufacturing structure rules. The interconnections between logic blocks can then be tested using test generation tools to ensure the design does not violate manufacturing test rules or guidelines The compliance verification can thus be done much earlier in the design process than typically occurs.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: October 24, 2006
    Assignee: International Business Machines Corporation
    Inventors: R. Thomas Cruz, Robert G. Gerowitz, Claudia M. Tartevet
  • Patent number: 7127595
    Abstract: A method and system of configuring an array of data is disclosed. The method and system comprise generating an array of data an order and reconfiguring the array of data into a plurality sub arrays of data, the plurality of sub arrays of data being in a desired order. By utilizing the method and system in accordance with the present invention, a converted data array can be processed in a parallel fashion thereby increasing the overall processing speed of the computer system. The present invention has particular utility when converting data either from a bit reverse order to a natural order or from a natural order to a bit reverse order. In accordance with the present invention, the array of data is reconfigured utilizing a swap operation to allow for conversion of the data array from either a bit reverse order to a natural order or from a natural order to a bit reversed order.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: October 24, 2006
    Assignee: Promos Technologies, Inc.
    Inventor: Dayin Gou
  • Patent number: 7123506
    Abstract: A method and system for programming a magnetic memory is disclosed. The method and system further include turning on a word line current and turning on a bit line current. The word line current is for generating at least one hard axis field. The bit line current is for generating at least one easy axis field. In one aspect, the method and system further include turning off the word line current and the bit line current such that a state of the at least one magnetic memory cell is repeatably obtained. In another aspect, the word line current is turned off after the bit line current is turned off.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: October 17, 2006
    Assignees: Applied Spintronics Technology, Inc., Headway Technologies, Inc.
    Inventors: Xizeng Shi, Son Le, Po-Kang Wang, Tai Min
  • Patent number: 7124146
    Abstract: A technique is provided for incrementally maintaining column cardinality estimates in database management systems. The system catalog table containing a cardinality estimate for a column is extended to include an appropriate data structure. A modified linear counting technique is used in a first embodiment of a method for column cardinality estimation. Moreover, a modified logarithmic counting technique is used in a second, preferred embodiment of a column cardinality estimation method to reduce storage requirements for the data structure. The cardinality estimate is produced by an initial scan of the data but is then further maintained without requiring a full scan of the data. Data changes are reflected incrementally in modifications to the initial cardinality estimate, keeping the cardinality statistics more current with respect to the database condition.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: October 17, 2006
    Assignee: International Business Machines Corporation
    Inventors: Walid Rjaibi, Peter Jay Haas
  • Patent number: 7123074
    Abstract: A multiplexer is disclosed. The multiplexer comprises a first input and a first channel coupled to the first input. The multiplexer further includes a second input and a second channel coupled to the second input. Finally, the multiplexer includes an output coupled to the first and second channels, wherein a coupling capacitance of an inactive one of the first and second channels is not coupled directly to the output. A method and system in accordance with the present invention reduces crosstalk and jitter in a multiplexer by eliminating the coupling capacitance between an inactive input and the output. In so doing, there is significantly better isolation between channels thereby minimizing the aforementioned cross-talk and jitter.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: October 17, 2006
    Assignee: Micrel, Inc.
    Inventor: Bernd Neumann
  • Patent number: 7123848
    Abstract: Aspects for managing print jobs for a printer are described. The aspects include an examination of a print queue of print jobs based on a level of consumable resources available in the printer. Further, an order of the print jobs in the printer is adjusted to prioritize printing of the print jobs that can be completely printed with the consumable resources available, wherein the printer realizes increased throughput and minimized downtime.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: October 17, 2006
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Clement, Jerry W. Pearce
  • Patent number: 7119528
    Abstract: A bandgap reference generation circuit utilizes two feedback loops to maintain the voltage at across the current sources to be essentially the same, such that the reference voltage remains constant over variations in process, temperature, and supply voltage. The accuracy of the reference voltage is maintained even at low supply voltages. Furthermore, the feedback loops increase the output impedance of the current sources, reducing the amount of noise coupling from the power supply, improving power supply rejection ratio.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventor: Todd Morgan Rasmus
  • Patent number: 7119797
    Abstract: Units are provided for determining whether or not a coordinate input is continued as being substantially the same coordinate and a predetermined time period has lapsed after an initial input of an arbitrary coordinate by a coordinate input unit. A first processing unit performs a first processing in accordance with the coordinate when the determination is not met, and a second processing unit performs a second processing different from the first processing when the determination is met.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: October 10, 2006
    Assignee: Lenovo Pte. Ltd.
    Inventors: Seiichi Kawano, Masayoshi Nakano, Yuhko Ohmori
  • Patent number: 7119727
    Abstract: A system and method for implementing an analog-to-digital converter (ADC). The ADC includes a converter for generating a timed pulse based on an analog signal and a control signal. The ADC also includes a timing analyzer for generating a digital signal based on the timed pulse. According to the system and method disclosed herein, the present invention achieves a high sampling rate and low latency at low power.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: October 10, 2006
    Assignee: Atmel Corporation
    Inventor: Mikhail Itskovich
  • Patent number: 7120704
    Abstract: A method and system for connecting a client to a database managed by a network of computer systems having a plurality of database management system (DBMS) members includes providing a shared network address for the plurality of DBMS members, which is used by the client to connect to an active DBMS member of the plurality of DBMS members. Through the aspects of the present invention, the shared network address allows the client to connect, via a network router, to any one of the plurality of DBMS members so long as one member is active. Once the client is connected to one member, the member sends to the client a list of all active members and their respective workloads. The list also includes member-specific network addresses corresponding to each member so that the client can distribute work evenly across the active members and also perform a resynchronization process with a DBMS member after a first connection with the DBMS member has been interrupted.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: James Pickel, Shivram Ganduri
  • Patent number: 7116314
    Abstract: A method for distribution of wear for a touch display, includes: providing at least one graphic at a first location on a touch display, where the display includes at least one target area corresponding to the graphic; registering a first touch within the target area; and moving the graphic to a second location on the touch display, where the target area moves in accordance with its corresponding graphic. By moving the target area in this manner, the wear of the touch display is distributed to avoid accelerated wear of particular target areas due to repeated use.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: October 3, 2006
    Assignee: International Business Machines Corporation
    Inventors: David W. Stanhope, Debra L. Singer-Harter
  • Patent number: 7117196
    Abstract: Aspects for optimizing leaf comparisons from a tree search of data stored in external memory of an embedded processing system are described. The aspects include providing a control structure for leaf data comparisons as a control vector and a match key, and utilizing the control vector to direct types of comparison tests performed with the match key.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: October 3, 2006
    Assignee: International Business Machines Corporation
    Inventors: Santosh Prasad Gaur, William Eric Hall