Patents Represented by Attorney, Agent or Law Firm Sawyer Law Group LLP
  • Patent number: 7113366
    Abstract: A thin film electromagnetic head has an inductive transducer with a double-nosed ferromagnetic trailing pole layer. The trailing pole layer has a trailing pole tip disposed adjacent to a media-facing surface, a trailing pole yoke disposed distal to the media-facing surface, and a trailing pole nose disposed between the trailing pole tip and the trailing pole yoke. The media-facing surface extends as a substantially flat surface in all directions from the trailing pole tip. The length of the trailing pole nose may be at least twice as long as the trailing pole tip length. The width of the trailing pole nose can be 10 to 30 times as wide as the trailing pole tip width. An inductive transducer having a double-nosed trailing pole layer provides a higher ratio of on-track to off-track write fields, thereby improving the density with which data can be written to the recording media. Such a double-nosed trailing pole layer can be used in transducers for either longitudinal or perpendicular magnetic recording.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: September 26, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Yugang Wang, Kroum Stoev, Francis Liu, Yingjian Chen
  • Patent number: 7113122
    Abstract: A current sensing analog to digital converter (CS-ADC) is disclosed. The current sensing analog to digital converter comprises a modulator adapted to sense a change in current and generate an oversampled signal. The converter further includes a decimation filter system coupled to modulator for removing out of band noise from the signal and reduce the data rate to achieve a high resolution signal. A current sensing analog to digital converter (CS-ADC) is disclosed that samples the charge or discharge current flowing through an external sense resistor RSENSE. The sample from the RSENSE is processed by a delta-sigma modulator which generates an over sampled noise shaped signal. From this signal a decimation filter system removes the out-of band noise and reduces the data rate to achieve a high-resolution signal. The CS-ADC also provides regular current detection. The regular current detection compares the data from conversion against charge/discharge threshold levels specified by the user.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: September 26, 2006
    Assignee: Atmel Corporation
    Inventors: Gunnar Gangstoe, Arne Aas
  • Patent number: 7111287
    Abstract: An assembler for assembling code is disclosed. The assembly language code includes a plurality of code blocks associated with resource-needs, such as variables, and resources, such as registers, I/O locations, memory locations, and coprocessors. A technology is provided that allows the global assignment of resource-needs to resources such that run time resource conflicts are avoided. A grammar for allowing resources to be defined and managed, a grammar for allowing the resource-needs to be defined and managed, a grammar providing definition of code blocks, and a grammar for associating resources with code blocks are also provided.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 19, 2006
    Assignee: International Business Machines Corporation
    Inventors: Joseph F. Garvey, Clark D. Jeffries
  • Patent number: 7110287
    Abstract: A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, spacer, free, and heat assisted switching layers. The spacer layer resides between the pinned and free layers. The free layer resides between the spacer and heat assisted switching layers. The heat assisted switching layer improves thermal stability of the free layer when the free layer is not being switched, preferably via an exchange coupling. The free layer is switched using spin transfer when a write current is passed through the magnetic element. The write current preferably provides heat that reduces the heat assisted switching layer's stabilization of the free layer. In another aspect, the magnetic element also includes second free, a second spacer, and second pinned layers. The heat assisted switching layer resides between the two free layers, which are magnetostatically coupled.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: September 19, 2006
    Assignee: Grandis, Inc.
    Inventors: Yiming Huai, Mahendra Pakala
  • Patent number: 7111288
    Abstract: A method and system for minimizing the cycle time when compiling a program in a computer system is disclosed. The program includes a plurality of directories and each of the directories includes a code file. The method and system comprises the steps of providing a master array of directories of the program, wherein the master array lists the dependencies of the directories; providing a code change to the program to provide an updated program; providing associated dependency changes to the master array to provide an updated master array; and compiling the updated program utilizing the updated master array wherein the code files of the directories are compiled in an ordered manner based upon the dependencies of the plurality of directories. Through the use of the method and system in accordance with the present invention, compile cycle time for large programs is significantly reduced.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: September 19, 2006
    Assignee: International Business Machines Corporation
    Inventor: Matthew Edward Aubertine
  • Patent number: 7109629
    Abstract: A rotor disc for an electrical machine is disclosed. The rotor disc comprises a series of magnetisable members arranged in a circumferential series on a surface thereof and against peripheral retaining structure of the disc. The disc also includes a retainer fixable to the surface and arranged for assisting in retaining the members at least axially on the surface when so fixed. The retainer is arranged to abut at least one of a substantially circumferentially and substantially tangentially extending, radially inner part of each member and thereby to provide the axial retention.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: September 19, 2006
    Assignee: Newage International Limited
    Inventors: Nazar Al-Khayat, Stephen Frederick Allen, Cleveland Mills, Jeremy Owen Dowdall, Christopher Paul Maddison, Martin Nicholls
  • Patent number: 7104129
    Abstract: A MEMS assembly having a MEMS subassembly sandwiched between and bonded to a cap and a base is provided. The MEMS subassembly includes at least one MEMS device element flexibly connected to the MEMS assembly. The vertical separation between the MEMS device element and an electrode on the base is lithographically defined. Precise control of this critical vertical gap dimension is thereby provided.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: September 12, 2006
    Assignee: InvenSense Inc.
    Inventors: Steven S. Nasiri, Anthony Francis Flannery, Jr.
  • Patent number: 7106624
    Abstract: A method and system for providing a magnetic element capable of being written using spin-transfer effect while generating a high output signal and a magnetic memory using the magnetic element are disclosed. The magnetic element includes a first ferromagnetic pinned layer, a nonmagnetic spacer layer, a ferromagnetic free layer, an insulating barrier layer and a second ferromagnetic pinned layer. The pinned layer has a magnetization pinned in a first direction. The nonmagnetic spacer layer is conductive and is between the first pinned layer and the free layer. The barrier layer resides between the free layer and the second pinned layer and is an insulator having a thickness allowing electron tunneling through the barrier layer. The second pinned layer has a magnetization pinned in a second direction. The magnetic element is configured to allow the magnetization of the free layer to change direction, due to spin transfer when a write current is passed through the magnetic element.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: September 12, 2006
    Assignee: Grandis, Inc.
    Inventors: Yiming Huai, Paul P. Nguyen
  • Patent number: 7106179
    Abstract: A deployment system for illumination devices, including: a holding mechanism for engaging at least one illumination device; and a deploying mechanism for causing the at least one illumination device to exit the system. In the preferred embodiment, the deploying mechanism is at least one solenoid, where the at least one solenoid extends to cause the illumination device to exit the system. The system allows a user or an automated system to deploy illumination devices without being exposed to dangerous conditions. For example, the system can be mounted internally or externally to a law enforcement, road crew, or utility company vehicle. The user may then deploy the illumination devices to mark the road without being subjected to the dangers of oncoming traffic.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: September 12, 2006
    Assignee: PowerFlare Corporation
    Inventors: Kenneth S. Dueker, Paul M. Hagelin, Troy J. Edwards, Russell E. Tavernetti
  • Patent number: 7106094
    Abstract: Aspects for improving signal quality on high speed, multi-drop busses are described. The aspects include coupling a source device directly to multiple load devices, wherein there are no resistance components coupled in series between the source device and the multiple load devices. The aspects further include providing a spacing arrangement for the multiple load devices, wherein negative reflections are delayed to minimize deleterious efforts from the negative reflections. Through the present invention, the modified version of a commonly used bus topology achieves extended voltage timing margins in a high speed, multi-drop bus in a straightforward and efficient manner.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: September 12, 2006
    Assignee: International Business Machines Corporation
    Inventors: Edmund S. Gamble, Terence Rodrigues, Leon Wu
  • Patent number: 7103765
    Abstract: A method and system for providing a modulized server-on-a-board is disclosed. The server-on-a-board is installed on a computing device. The method and system include providing bus interface logic, providing local control BIOS, a flash memory and a set of control button connectors, light emitting diodes (LED) connectors and a liquid crystal display (LCD) connector. The local control BIOS is coupled with the bus interface logic and the flash memory. The bus interface logic interacts with the computing device and allows computing device to detect the server board. The local control BIOS boots up the server and prepares the computing device for use as the server. The flash memory stores a server image for the server, which is provided to the computing device using the local control BIOS. The control button connectors allow the server to be turned on, shut down gracefully, or restored to its initial state, by a single press of buttons connected to these connectors.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: September 5, 2006
    Inventor: Ben Wei Chen
  • Patent number: 7103852
    Abstract: A method for increasing ease-of-use of a touch screen application by dynamically resizing touch screen input areas is disclosed. The touch screen application includes a user interface that displays one or more touch screen input areas. Each of the touch screen input areas include a viewable area and a clickable area, wherein a user's touch of the clickable area activates the corresponding touch screen input area. Aspects of the present invention include collecting coordinates of touches on the display in response to user interaction, and analyzing the touch coordinates to determine how often the user has missed the input areas. In response to the number of missed touches reaching a predetermined threshold, both the size of the viewable area and the clickable area of at least one of the input areas, and possibly all areas of a similar size or type, are increased so that the input areas will be easier to touch.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventor: Richard J. Kairis, Jr.
  • Patent number: 7103847
    Abstract: A system for monitoring a resource in a processing system is disclosed. The processing system includes a display. The system comprises a total resource graphic provided on the display. The total resource graphic represents the total resource. The system includes at least one allocation graphic provided within the total resource graphic. The allocation graphic represents the proportion of the resources allocated to an object. The system and method in accordance with the present invention allows for allocation of a resource across all demands, the relative size of the allocations, and the usage of the resource by the individual demanding operation within a single graphical object. In addition, the object would provide for changes to that allocation by direct manipulation, in addition, the status indicator would provide additional information on demand by the user.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jack Allen Alford, Jr., Kenneth Ray Banning, James Lee Lentz
  • Patent number: 7103762
    Abstract: A method and system for caching and moving the required real-time, processing unit specific data (including boot image selection) among isolated servers in a pre-boot environment is disclosed. A system and method in accordance with the present invention provides a network/server topology that includes a common control server, and a plurality of isolated process servers. A system and method in accordance with the present invention provides the capability of being able to reference the real-time processing unit specific data based on either the unique processing unit identifier (MTSN directory name) or based on the MAC address (in conjunction with the content of a MAC binding file).
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: John Gary Harper, Barry Alan Kritt, Pamela Annette Morse, Linda Reed Newton, Paul Allen Roberts
  • Patent number: 7102167
    Abstract: A CMOS output stage is disclosed. The CMOS output stage comprises a substrate and at least one well coupled to the substrate. The CMOS output stage also includes a plurality of slots provided through the one well into the substrate. Each of the slots are oxidized. Each of the plurality of slots are filled with metal to provide a plurality of power busses. One of the power busses provides a ground. One of the power busses provides an output. One of the power busses provides a power connector. This results in the buried power buss metal always having oxide isolated surroundings. This feature allows all of these power busses to be established wherever necessary without causing any circuit issues since they are always insulated from other areas of the device. One of the power busses provides a ground. One of the power busses provides an output. One of the power busses provides a power connector.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: September 5, 2006
    Assignee: Micrel, Inc.
    Inventor: John Durbin Husher
  • Patent number: 7103587
    Abstract: A callback to a data manager is carried out from an index manager in a query processing system for an index-data fetch to enable an index page held stabilized by an index manager to remain stabilized during predicate checking or data consumption operations. The index manager locates a data identifier in an index and calls back to a data manager to access the data indicated by the data identifier. The data manager may carry out a predicate check or a data consuming operation on the data and if this is the case the index manager may access the next data identifier in the index when the data manager callback is complete. The index page need not be destabilized in such a case.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Bruce G. Lindsay, Catherine S. McArthur, Michael J. Winer
  • Patent number: 7098889
    Abstract: A device, method, and computer program product for a self-calibrating input device are provided. The input device includes a designated value change unit operable to change a designated value using a variation amount associated with the designated value, the designated value being changed using a predetermined first variation amount when a first designated value change directive is received from an operator, and a variation amount change unit operable to alter the variation amount associated with the designated value from the predetermined first variation amount to a smaller second variation amount when a second designated value change directive that is opposite the first designated value change directive is received from the operator within a predetermined variation amount change period.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: August 29, 2006
    Assignee: Lenovo Pte. Ltd.
    Inventors: Takashi Inui, Tetsuji Nakamura
  • Patent number: 7098494
    Abstract: A magnetic logic cell includes a magnetic element having a pinned layer, a free layer, and a spacer layer. The pinned and free layers have pinned and free layer magnetizations. The spacer layer resides between the pinned and free layers. In one aspect, the magnetic logic cell includes a first configuration line that is electrically connected to the magnetic element and carries a first current and a second configuration line electrically that is insulated from the magnetic element and the first configuration line and carries a second current. The first or second current alone cannot switch the free layer magnetization. The first and second currents together can switch the free layer magnetization. When the first current is driven through the magnetic element and the second current is provided, the combination sets the pinned layer magnetization direction. In one aspect, the pinned layer magnetization is set by heating the AFM layer to approximately at or above the blocking temperature.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: August 29, 2006
    Assignee: Grandis, Inc.
    Inventors: Mahendra Pakala, Yiming Huai
  • Patent number: 7098113
    Abstract: A power lateral PNP device is disclosed which includes an epitaxial layer; a first and second collector region embedded in the epitaxial layer; an emitter region between the first and second collector regions. Therefore slots are placed in each of the regions. Accordingly, in a first approach the standard process flow will be followed until reaching the point where contact openings and metal are to be processed. In this approach slots are etched that are preferably 5 to 6 um deep and 5 to 6 um wide. These slots are then oxidized and will be subsequently metalized. When used for making metal contacts to the buried layer or for ground the oxide is removed from the bottom of the slots by an anisotropic etch. Subsequently when these slots receive metal they will provide contacts to the buried layer where this is desired and to the substrate when a ground is desired. In a second approach the above-identified process is completed up through the slot process without processing the lateral PNPs.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: August 29, 2006
    Assignee: Micrel, Inc.
    Inventors: John Durbin Husher, Ronald L. Schlupp
  • Patent number: 7093142
    Abstract: The present invention facilitates the operational management and usability of a portable computing device by providing an apparatus, method and program product to allow a user to select the operational and power state of a device operably connected with a computer and the power state of the computer prior to removing the computer from an apparatus such as a docking station.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: August 15, 2006
    Assignee: Lenovo Pte. Ltd.
    Inventors: Mikio Hagiwara, Eitaroh Kasamatsu, Mizuho Tadakoro