Abstract: A particle deposition system having an atomizer, wafer transport, sheath flow means, particle counter and computer control for accurately depositing a desired density of particles onto a surface. The sheath flow keeps an article clean, while the particle flux in the deposition chamber is rising from zero to an equilibrium state. The particle counter measures particle flux by sampling the atmosphere in the deposition chamber. The computer determines when the rate of change of particle flux is substantially zero and then actuates transport of the article completely or partially out of the sheath flow into the mist of falling particles. The computer also calculates the required deposition time for providing the article's surface with a desired particle density, actuating transport of the article back into the sheath flow after the desired density is reached. The operator of the system can specify particle size, desired density and full or partial coverage of the surface with particles.

Abstract: A method using implantation to form a semiconductor laser or laser array with current blocking implants. A semiconductor material laser structure including layers of a first conductivity type, an active region and layers of a second conductivity type is formed. In a first embodiment, impurity ions of the second conductivity type are implanted into selected regions of a first conductivity type layer. The implanted ions form current blocking buried regions of the second conductivity type with current confining channels therebetween. Finally, the structure is thermally annealed. In a second embodiment, a disorder inducing impurity, which may be a saturable absorber, is diffused into selected portions of the layers of the first conductivity type through the active region. The diffusion converts side regions of those layers into the second conductivity type.

Abstract: A programmable logic device having multiple first logic arrays, such as AND arrays, each with a different set of inputs and all simultaneously operating, in which the outputs from two or more first logic arrays are shared in a single speed logic gate or array, such as an OR gate or array. In one embodiment, there are N first logic arrays and M second logic arrays connected such that each second logic array receives intermediate terms from every first logic array and intermediate terms from each first logic array are shared by plural second logic arrays. In a second embodiment, there are N first logic arrays and a plurality of second logic gates connected so that at least some of the second logic gates receive intermediate terms from two adjacent first logic arrays.

Abstract: A system for use on an automated assembly line having an adhesive applicator disposed to deposit adhesive on cartons progressing along the assembly line. A flap closing device which is utilized only during scheduled or unscheduled cycle stops of the assembly line is operatively associated with a pair of applicator heads. During normal, continuous operation of the assembly line, the flaps of a carton are sealed downstream of the application of adhesive. Effective sealing of all cartons upon a cycle stop is provided by including the second flap closing device at the applicator heads. The applicator heads are within the arc of movement of a carton flap closed by the second flap closing device, but operatively associating the applicator heads with the flap closing device displaces the heads from the path of the flap. Movement of the heads can be a rotational or linear motion.

Abstract: A surface inspection apparatus having multiple inspection stations to inspect a wafer for a number of characteristics. The wafer is placed on a chuck connected to a rack-and-pinion or equivalent system so that the wafer simultaneously rotates and translates under the fixed position of the inspection stations. A single light source may be used by all stations in turn. One station may be a particle detector with collection optics receiving a small select portion of the light scattered from the wafer surface. A second station may be a roughness detector with a collection system to direct a large portion of scattered light to a detector. A position sensitive detector may be used to determine the slope of the wafer surface at an inspection point when the wafer is not clamped to the chuck, giving a measure of surface deformation. These or other stations are positioned about either of two inspection points at which the beam from the light source may be directed.

Abstract: A laser diode construction having internal reflectors within the laser cavity to provide a stable spectral mode of laser operation. The laser includes a plurality of contiguous semiconductor layers disposed on a substrate to form a semiconductor body with at least one layer forming an active region. Electrically conductive contacts bias the heterostructure to inject current into the active region and produce lightwaves. Feedback means define two or more tandem resonant optical cavities to achieve lasing operation. The feedback means includes at least one internal light reflector within the semiconductor body. In a preferred embodiment, a pair of spaced apart internal reflectors are provided with the region between the pair also being electrically pumped to define an active internal etalon. Other embodiments have multiple periodic reflectors or combine internal reflectors with feedback gratings or passive windows at the end facets of the body.

Abstract: Arrangements for efficiently coupling light between a laser diode and a second-harmonic generator which feature external resonant cavities that include a feedback grating fabricated on the second-harmonic generator. The feedback grating reflects light of a first frequency that matches the frequency doubling band of the second-harmonic generator, thereby establishing stable laser oscillation at that first frequency. Preferably, the second-harmonic generator has a periodically-poled waveguide formed in the surface of the nonlinear material body. The laser diode may be butted against the harmonic generator or coupling optics may be positioned between the two. In one arrangement, a polarizer is placed in the resonant cavity, either between an external back reflector and the back facet of the laser diode or between the antireflection coated front facet of the laser diode and the harmonic generator, to provide loss to the TE polarization mode and enhance oscillation in the TM polarization mode.

Abstract: A laser-diode or laser diode array end-pumped solid-state laser package for optical communications and the like mounted on a common thermally conductive, low thermal expansion base that is temperature stabilized with a thermo-electric cooler. The laser package includes a heat sink, a thermo-electric cooler mounted on the heat sink, a base having a base plate portion mounted on the thermo-electric cooler and a block portion mounted on the base plate portion and optical elements mounted on the base plate and block. The laser active medium and collimating and focusing lenses are mounted with their optically axes collinear in a v-groove formed in a top surface of the block. A laser diode pump is mounted to the base plate and supported so that its laser emission is aligned with the length of the groove.

Abstract: A method of forming leadouts on a surface mountable chip carrier for electrical connection to a supporting substrate, such as a motherboard. The chip carrier includes a carrier board having input/output vias extending to a selected layer of the carrier board. In a preferred embodiment, the selected layer is the lower surface of the carrier board, but the selected layer may optionally be the upper surface or an intermediate layer. The input/output vias are on an inboard side of an interconnection region. An array of terminals, which may also be vias, are on the outboard side of the interconnection region. The interconnection region is removed from the carrier board to form a window located between the terminals and the input/output vias. In the preferred embodiment, a metallic layer is then deposited on the lower surface of the carrier board. The metallic layer is patterned to leave leads extending from the input/output vias to the terminals, thereby providing parallel leads extending across the window.

Abstract: A lead frame interconnection assembly and method of fabricating the assembly having multi-layered alignment bars. First and third layers of the alignment bars are strips of water soluble tape attached at opposite sides of the conductive fingers. The strips of tape are perpendicular to the conductive fingers and parallel to each other. The strips of tape sandwich a center layer that is made of a flowable, water soluble material. Preferably, the alignment bar acts as a dam bar to stop the flow of encapsulant material during the formation of a package. After the alignment bar has served the intended function, the bar may be dissolved without adversely affecting the structural integrity of the conductive fingers.

Abstract: A modular adhesive applicator assembly in which electrical, thermal and fluid communication between a main block and individual modules occur at one face of the main block and in which a separate flow loop within each module is provided to prevent adhesive degradation within the module. Each module has an inlet port in fluid communication with an opening in the main block. The inlet port is located at an intermediate region of a solenoid armature used to control flow from the inlet port to an outlet port. A high-volume adhesive flow path extends forwardly along the solenoid armature directly to the outlet port. A low-volume adhesive loop extends rearwardly along grooves within the exterior of the solenoid armature and then forwardly within a central bore of the solenoid armature. A radial bore to the central bore provides fluid communication to the high-volume adhesive flow path.

Abstract: A semiconductor wafer processing station comprising a plasma etching unit, a wet processing spin-spray unit, a robotic wafer transfer arm, and a central control computer all contained in a single housing. The apparatus is designed to perform manufacturing tasks especially related to photoresist processing: photoresist developing, descumming, baking and hardening, and stripping. The apparatus follows preprogrammed instructions which allow the station to automatically perform wafer processing routines by removing wafers from a storage cassette, then transferring the wafers to the processing unit with the robotic arm. Custom processing procedures are programmable, allowing practical small-scale low volume wafer development. Wafer processing routines envisioned include photoresist application and developing, plasma etching and descumming, and procedures involving multiple processing steps utilizing both the plasma/oven unit and the wet chemical spin-spray unit.

Abstract: A system and method for processing images viewed on radiographic film. Such images include mammograms, CAT scans, or other standard x-ray type images. The system includes a scanning laser film digitizer for reading the optical density of pixels in an original film image; a controller which analyzes the image data based on input film type and scanned optical density in order to compute an exposure correction factor which enhances the original image quality; and a laser film writer which creates a new copy of the original data in the improved form. The system is capable of writing several proportional non-overlapping images on a single sheet of film. This feature facilitates diagnostic evaluation of related subject matter such as multiple angle views of an injury, simultaneous views of right and left side mammograms, or several CAT scans on a single exposure. The system uses a look-up table to store and access optical density vs. exposure characteristics for several types of radiographic film.

Abstract: A multi-channel and multi-capability facsimile system including N(.gtoreq.2) signal-carrying facsimile channels, an image server means to process, store and retrieve document image information, and a master processing unit to control the process by which information is transferred between a facsimile channel and the image server means, and to enable and disable data compression and expansion document image information that is provided to or received from the facsimile channels. The system: (1) allows visual display of document pages sent and/or received in the resolution in which the document is originally received or generated; (2) allows transmission, receipt and storage of document image information and speech or voice signals; (3) allows control of the destination address and route used for transmitted document and speech infomation, using the DTMF touch tone signaling available with a telephone; (4) supports CCITT group 2, Group 3 and Group 4 standards.

Abstract: A vacuum-actuated tool for handling of electronic articles, such as integrated circuit chips, wherein the tool includes an elongated body having first, second, and third passageways. The second passageway is connected to a vacuum source, while the first passageway leads to a pickup tip that contacts the article to be handled. Positive pressure sealing provides a leak-proof closure of the second passageway when the article is to be released. The third passageway is in fluid communication with the atmosphere and is linked to the first passageway simultaneously with the positive pressure sealing of the second passageway. In a pickup position, the third passageway to the atmosphere is pressure sealed to prevent leakage through the third passageway to the atmosphere. The pressure seals are provided by elastomeric members.

Abstract: An optical system for use in conjunction with a one or two dimensional array of high brightness sources where such sources are individually rotated by multiple reflective elements and in turn may be captured by beam filling optics and subsequently re-imaged by symmetric and asymmetric optics where the asymmetric optics preferentially image a single dimension while leaving the focus in the second dimension largely unaffected. In this manner and by properly selecting the spacing as well as the width of the line sources, and by properly designing the symmetric and asymmetric optics, the array of high brightness sources can be reformatted in a brightness conserving manner that allows the reformatted beam to simultaneously have an arbitrary ratio of image length to image width and arbitrary divergences in the respective dimensions.

Abstract: Flat-field telecentric scan systems, each having a planar scanning reflector situated in a light path and mounted for movement about a scan axis, a concave spherical mirror fixed in a position in the light path an effective focal length away from the scanning reflector to provide a telecentric scan of the light beam, and a lens or mirror with spherical surfaces placed in the light path for providing a flat-field scan. The concave mirror and the additional lens or mirror element may be placed off of the symmetry axis to avoid light obstruction problems provided the tilt of the scanning reflector and the positions and orientations of the concave mirror and additional optical element are selected for a straight-line scan. The additional lens can be either before or after the concave mirror in the light path. It can also be positioned in the path of both light incident on and reflected from the concave mirrors.

Abstract: A CMOS flip-flop circuit that includes master and slave inverter latches, a pass transistor for opening and closing access of the master latch input to an input signal D, and a special driver circuit between the master and slave latches to pull the input of the slave latch either up or down depending on the logic level of the master latch output. The pass transistor and driver circuit are responsive to a control signal, supplied by complementary clock signals or by multiplexers that select either the clock signals or a fixed logic high signal, to activate a conductive path to the inputs of respective master and slave latches. The driver circuit includes four transistors connected, so that first and second transistors are in series and third and fourth transistors are in series, to form two parallel paths from two logic level sources to the slave latch input.

Abstract: In a semiconductor laser array structure in which antiguided regions between high effective refractive index waveguide regions experience greater gain then the waveguide regions, structures introduced at the sides of the array, next to the edgemost waveguides and not on the array period, reflect laterally transmitted radiation back toward the center of the array. The edge reflecting structures may be waveguide regions having widths of (m'+1/2) half-wavelengths, where "m'" is zero or a positive integer, compared to array waveguides with width m, where "m" is an integer not necessarily equal to "m'". The edge reflecting structures may also be stacks of such waveguides, where the regions between the edge waveguides are of a width substantially equal to (n'+1/2) half-wavelengths, compared to antiguide element widths of n half-wavelengths. The two integers n and n' may be, but are not necessarily, equal.

Abstract: Characterization and validation boards having the capability of allowing selective variation of current loading, localized heating, operational speed and signal pin assignment. Each printed circuit board includes a connector that is electrically coupled to a backplane of a bus system. The connector has power, ground and signal contacts. On a first side of each printed circuit board is a series of parallel circuits of resistors grounded at first ends and individually connected to switches at second ends. The switches allow a user to select a desired current load for each power contact and to emulate thermal characteristics of other boards. Clock circuitry is programmable to transmit or receive selectable clock frequencies. Bus interface circuitry, along with shorting jumpers select from a plurality of signal outputs to programmable signal contacts of the connector.