Patents Represented by Attorney Schubert Osterrieder & Nickelson PLLC
  • Patent number: 7375278
    Abstract: Methods, systems, and media to mount one or more components to a hardware casing are disclosed. Embodiments include hardware and/or software for determining a pattern of interconnects to apply to an interior surface of the hardware casing. The pattern includes at least one independent path for transmitting a signal between the components. The pattern of interconnects is then applied to the interior surface, the application being configured for the topography of the interior surface to couple the components with the pattern of interconnects. In many embodiments, the components may then be mounted to the casing and interconnected with the interconnects. And, in some embodiments the pattern of interconnects may be coupled with a circuit board having additional components.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: May 20, 2008
    Assignee: International Business Machines Corporation
    Inventors: Michael Aaron Kaply, Walter Chun-Won Lee, Jonas Sicking, Lloyd Bernard Stearn, Jr.
  • Patent number: 7364220
    Abstract: Systems, methods and media for reducing the aerodynamic drag of vehicles are disclosed. More particularly, embodiments may include at least one fan for directing air into a lower pressure region behind a vehicle in motion in order to reduce pressure drag. Embodiments may also include one or more internal air ducts for directing air from other parts of the vehicle to the at least one fan. In one embodiment, the operation of the at least one fan may be controlled based on sensed conditions, user control, or other means.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: April 29, 2008
    Inventor: Khosrow Shahbazi
  • Patent number: 7362744
    Abstract: A forwarding table, in a network device such as a router, used to forward packets in a communications network includes indicia whose state determine whether information contained in the forwarding table or information contained in the header portion of a packet is to be used to forward the packet to the next hop (i.e. next point in the route).
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: April 22, 2008
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Natarajan Vaidhyanathan, Colin Beaton Verrilli
  • Patent number: 7363551
    Abstract: Embodiments include systems and methods for measurement of signal propagation delay between Input/Output (IO) Loopback (IOLB) circuits. Embodiments include measurement of an output delay time of a first IOLB circuit and measurement of an input delay time of a second IOLB circuit. Embodiments also include measurement of a total delay time from an internal point of the first IOLB circuit to an internal point of the second IOLB circuit. Embodiments subtract from the measured total delay time, the measured output delay time of the first IOLB circuit and the measured input delay time of the second IOLB circuit to determine the time of flight of a signal between the I/O pads of the two IOLB circuits.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: April 22, 2008
    Assignee: Intel Corporation
    Inventor: Harry Muljono
  • Patent number: 7361457
    Abstract: Methods, systems, and media to define a portion of a circuit pattern with a source of real-time configurable imaging are disclosed. Embodiments include hardware and/or software for directing a beam through a mask onto a wafer surface to outline a circuit pattern having an undefined area, directing a second beam to the semiconductor wafer surface to define a circuit structure in the undefined area to complete the circuit pattern on the semiconductor wafer surface, and directing the second beam onto a source of real-time configurable imaging. Embodiments may also include a mask to include an undefined area incorporated into the circuit pattern to leave a critical structure of the circuit pattern undefined. Several embodiments include a photolithography system including an exposure tool, a mask, a source of real-time configurable imaging, and addressing circuitry.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: April 22, 2008
    Assignee: International Business Machines Corporation
    Inventors: William Bornstein, Anthony Cappa Spielberg
  • Patent number: 7359824
    Abstract: Systems, methods and media for providing a distributed execution environment with per-command environment management are disclosed. In one embodiment, a plurality of digital systems are connected to a serving device. The serving device comprises a sequencer to originate environment attributes and commands to be executed within the environment. Each digital system under test and serving device comprises a listener with a queue to receive environment attributes and commands. A listener on a digital system under test or serving device implements the environment attributes and executes the received commands within the specified environment.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: April 15, 2008
    Assignee: International Business Machines Corporation
    Inventors: Eric Erhard Blouin, Barry Alan Kritt, Douglas Alan Law, Kuldip Nanda, Paul Allen Roberts
  • Patent number: 7355419
    Abstract: Methods and arrangements to enhance photon emissions responsive to a signal within an integrated circuit (IC) for observability of signal states utilizing, e.g., picosecond imaging circuit analysis (PICA), are disclosed. Embodiments attach a beacon to the signal of interest and apply a voltage across the beacon to enhance photon emissions responsive to the signal of interest. The voltage is greater than the operable circuit voltage, Vdd, to enhance photon emissions with respect to intensity and energy. Thus, the photon emissions are more distinguishable from noise. In many embodiments, the beacon includes a transistor and, in several embodiments, the beacon includes an enablement device to enable and disable photon emissions from the beacon. Further, a PICA detector may capture photon emissions from the beacon and process the photons to generate time traces.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: April 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Chandler Todd McDowell, Stanislav Polonsky, Peilin Song, Franco Stellari, Alan J. Weger
  • Patent number: 7352200
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: John Saunders Corbin, Jr., Jose Arturo Garza, Dales Morrison Kent, Kenneth Carl Larsen, Howard Victor Mahaney, Jr., Hoa Thanh Phan, John Joseph Salazar
  • Patent number: 7350047
    Abstract: Methods, systems, and media to enhance memory overflow management by identifying a memory overflow condition associated with execution of a task and adjusting memory allocation for the task to attenuate the memory overflow condition are disclosed. In particular, embodiments reduce the impact of repetitious memory overflow conditions caused by a specific task by increasing the memory allocation for that task. The memory overflow may also be reported to a technical service provider to help the technical service provider identify and fix the code that is responsible for the memory overflow. Many embodiments monitor an extent of the overflow and determine an allocation correction term based upon the extent of the overflow. In some situations, application of a correction term to increase the memory allocation for the task may advantageously eliminate the cause of the memory overflow condition. In further situations, the impact of the memory overflow condition is attenuated.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: March 25, 2008
    Assignee: International Business Machines Corporation
    Inventor: Marc Alan Dickenson
  • Patent number: 7346880
    Abstract: Methods and arrangements to gang differential clock signals to attenuate pin-to-pin output skew for a clock driver are disclosed. Embodiments may comprise a pattern of conductors to interconnect output pins for differential clock signals with termination resistors. The pattern of conductors comprises a group of conductors for a positive clock (p-clock) signal and a group of conductors for a negative clock (n-clock) signal. The conductors for the p-clock signal intersect at a gang point between the output pins and pads for the termination resistors. Similarly, the conductors for the n-clock signals intersect at a gang point between the pins and the pads. In many embodiments, the distance between the pins and pads may be approximately 120 mils. In further embodiments, the distance may be longer or shorter than 120 mils. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: March 18, 2008
    Assignee: Intel Corporation
    Inventors: Choupin B. Huang, Charles T. Ballou, Ramesh K. R. Velugoti, Drin-Guang W. Chen
  • Patent number: 7344439
    Abstract: A system, method, and apparatus for distributing air in a blade server are disclosed. Embodiments may include a rotating damper having a damper door, sliding door, and connecting rod. The damper door may be rotatably attached to a blade server having a plurality of blade slots for receiving blades and may rotate between a blocking position and a flat position, where the damper door impedes air through a blade slot when in the blocking position. The sliding door may move between an open position and a closed position, where the sliding door allows airflow through an air opening while in the open position and blocks airflow through the air opening while in the closed position. A further embodiment may include an extension spring to apply a pulling force to the sliding door and a kick up spring to apply a pushing force to the damper door in the flat position.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: March 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Matthew S. Henry, David J. Jensen, Seth D. Lewis, Peter A. Smith
  • Patent number: 7343570
    Abstract: Methods, systems, and media to improve the manufacturability of cells and structures within cells of an integrated circuit are disclosed. Embodiments comprise a method of arranging programmable cells, routing the programmable cells, analyzing the cell arrangement and interconnect wiring for manufacturing improvement opportunities, and modifying the programmable cell structures to incorporate the manufacturing improvements. In some embodiments, wires are spread to prevent shorting. In other embodiments, the reliability of contacts and vias is improved by adding additional metallization to the areas surrounding the contacts and vias, or by adding redundant contacts and vias. In one embodiment, a series of manufacturing improvements are made to integrated circuit cells in an iterative fashion.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: March 11, 2008
    Assignee: International Business Machines Corporation
    Inventors: Benjamin J. Bowers, Anthony Correale, Jr.
  • Patent number: 7338818
    Abstract: Systems and arrangements to assess the thermal performance of a thermal solution based upon the ability of a device under test (DUT) to operate in accordance with electrical performance criteria are contemplated. Embodiments may include a tester to couple with the DUT to determine an operating junction temperature. In some embodiments, the measured junction temperature may be the operating junction temperature anticipated for the DUT in a customer installation. In other embodiments, the tester may comprise logic to calculate a projected, operating junction temperature based upon the measured junction temperature and known differences between the tester and a customer installation. Upon determining the operating junction temperature for the DUT at the customer installation, the operating junction temperature is compared against a maximum junction temperature for proper operation of the DUT. Advantageously, the maximum junction temperature may be varied based upon the project objective for a line of DUTs.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: March 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Ronald Xavier Arroyo, Kenneth A. Bird, William A. Ciarfella, Bret Peter Elison, Gary Franklin Goth, Terrance Wayne Kueper, Thoi Nguyen, Roger Donell Weekly
  • Patent number: 7339390
    Abstract: Systems and methods for controlling electro-migration, and reducing the deleterious effects thereof, are disclosed. Embodiments provide for reversal of an applied voltage to an integrated circuit when a measurement indicative of an extent of electro-migration indicates that a healing cycle of operation is warranted. During the healing cycle, circuits of the integrated circuit function normally, but electro-migration effects are reversed. In one embodiment, micro-electro-mechanical switches are provided at a lowest level of metallization to switch the direction of current through the levels of metallization of the integrated circuit. In another embodiment, if the measurement indicative of the extent of electro-migration exceeds a reference level by a specifiable amount, then the voltage applied to the integrated circuit is reversed in polarity to cause current to switch directions to counter electro-migration.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: March 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Hayden Clavie Cranford, Jr., Louis Lu-Chen Hsu, James Stephen Mason, Chih-Chao Yang
  • Patent number: 7320090
    Abstract: Methods, systems and media for generating an improved regression suite by applying harvesting models and/or regression algorithms to tests utilized in verification of a system are disclosed. In one embodiment, a regression manager responsive to user input may be coupled to a harvester module, an analysis module, and a management module. In one embodiment, the harvester module is responsive to harvesting models defined in a modeling language, where the harvester module is coupled to a regression suite database. In another embodiment, a regression methodology may be defined from a collection of regression strategies and each regression strategy may be defined from a combination of harvesting models and/or regression algorithms. A regression generator to receive tests, to apply one or more regression strategies to the tests, to provide reports, and to allow user control may also be provided.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: January 15, 2008
    Assignee: International Business Machines Corporation
    Inventors: James J. Coulter, Jr., Amir Hekmatpour
  • Patent number: 7315595
    Abstract: Methods, and arrangements for extension of clock and data recovery (CDR) loop latency and deactivation of CDR circuits are disclosed. In particular, embodiments address situations in which a receiver, designed to handle spread spectrum clocking, may not always or continuously encounter spread spectrum signals. As a result, power consumption by the receivers may be reduced. Embodiments identify situations in which spread spectrum clocking is unnecessary and may adapt the CDR loop to operate with less power consumption by, e.g., reducing the operating frequency of CDR circuits. For instance, some embodiments employ a flywheel circuit, incorporated into many spread spectrum CDR loops to accelerate adjustments to a sampling clock, to determine when spread spectrum signals are not being encountered. A loop latency controller may then, advantageously, reduce power consumption by reducing frequencies of operation and voltages, and merging or simplifying stages.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: January 1, 2008
    Assignee: International Business Machines Corporation
    Inventor: Juan-Antonio Carballo
  • Patent number: 7313772
    Abstract: Systems, methods, and media for block-based assertion generation, qualification and analysis are disclosed. Embodiments may include a method for generating assertions for verifying a design. The embodiment may include generating session preferences, the session preferences including a selection of one or more assertion schemas for use in generating the assertions, where the selected assertion schema each have one or more design attributes. The embodiment may also include parsing the design to determine locations in the design for the assertions based on the design architecture, structure, and hierarchy and generating the assertions based on at least the session preferences, the determined locations for the assertions, and the design attributes associated with the selected assertion schema.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: December 25, 2007
    Assignee: International Business Machines Corporation
    Inventors: Amir Hekmatpour, Azadeh Salehi
  • Patent number: 7293158
    Abstract: Systems and methods for implementing counters in a network processor with cost effective memory are disclosed. Embodiments include systems and methods for implementing counters in a network processor using less expensive memory such as DRAM. A network processor receives packets and implements accounting functions including counting packets in each of a plurality of flow queues. Embodiments include a counter controller that may increment counter values more than once during a R-M-W cycle. Each time a counter controller receives a request to update a counter during a R-M-W cycle that has been initiated for the counter, the counter controller increments the counter value received from memory. The incremented value is written to memory during the write cycle of the R-M-W cycle. A write disable unit disables writes that would otherwise occur during R-M-W cycles initiated for the counter during the earlier initiated R-M-W cycle.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: November 6, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jean Louis Calvignac, Chih-jen Chang, Joseph Franklin Logan, Fabrice Jean Verplanken
  • Patent number: 7291783
    Abstract: Methods, systems, and media to mount one or more components to a hardware casing are disclosed. Embodiments include hardware and/or software for determining a pattern of interconnects to apply to an interior surface of the hardware casing. The pattern includes at least one independent path for transmitting a signal between the components. The pattern of interconnects is then applied to the interior surface, the application being configured for the topography of the interior surface to couple the components with the pattern of interconnects. In many embodiments, the components may then be mounted to the casing and interconnected with the interconnects. And, in some embodiment, the pattern of interconnects may be coupled with a circuit board having additional components.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: November 6, 2007
    Assignee: International Business Machines Corporation
    Inventors: Michael Aaron Kaply, Walter Chun-Won Lee, Jonas Sicking, Lloyd Bernard Stearn, Jr.
  • Patent number: 7290131
    Abstract: There is described a method, system and computer program product for processing a link embedded in a link document in a client computer, said link comprises a URL reference for a URL document in the client computer or another computer, there being stored a record containing a link reference and an intended fingerprint, said intended fingerprint representing the content of the URL document associated with the URL of the link at the time of or after the link was created, said method comprising the steps of: fetching the intended fingerprint for the link; fetching the URL document; creating a current fingerprint of the fetched URL document; comparing the intended fingerprint and the current fingerprint; and identifying that the intended fingerprint and the current fingerprint are different in a material way.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: October 30, 2007
    Assignee: International Business Machines Corporation
    Inventors: Margaret Ann Ruth Beynon, Andrew James Flegg