Abstract: Methods, systems, and media for aggregating and processing product information are disclosed. Embodiments include hardware and/or software for receiving an electronic receipt from a merchant that describes a transaction for a product by a purchaser and gathering product information from one or more sources such as the merchant, the product's manufacturer, the purchaser's bank, and/or an accessories dealer. Upon gathering the product information, the product information is associated with the transaction for the product on the electronic receipt and packaged in a standard, electronic format, an aggregated package, that is accessible and manageable by the purchaser's software, such as a personal finance manager (PFM) like Quicken™, Quickbooks™, Microsoft Money™, or the like. The aggregated package can then be sent to the purchaser via an email address supplied by the purchaser at the time of the purchaser or by the purchaser's bank while completing a funds transfer for the transaction.

Abstract: An integrated circuit interconnection system is disclosed. The system can include a first integrated circuit die having a first electrode configuration and a second integrated die having the same or a substantially similar electrode configuration. The system can also include a multilayer flexible cable having a first side and a second side that has substantially parallel conductors running along the cable. At least a portion of one of the parallel conductors can be exposed on the first side and/or the second side, such that the first and second integrated circuit die can be connected to both the first side and the second side of the multilayer flexible cable. The cable can be folded to provide a dense interconnect for stacked memory configurations.

Abstract: Methods, systems and media for generating an improved regression suite by applying harvesting models and/or regression algorithms to tests utilized in verification of a system are disclosed. In one embodiment, a regression manager responsive to user input may be coupled to a harvester module, an analysis module, and a management module. In one embodiment, the harvester module is responsive to harvesting models defined in a modeling language, where the harvester module is coupled to a regression suite database. In another embodiment, a regression methodology may be defined from a collection of regression strategies and each regression strategy may be defined from a combination of harvesting models and/or regression algorithms. A regression generator to receive tests, to apply one or more regression strategies to the tests, to provide reports, and to allow user control may also be provided.

Abstract: Embodiments may include connectors with discharge elements integrated into the connectors to interconnect conductors of a cable to attenuate or discharge an electrostatic charge built up on the conductors. In some embodiments, the conductors are momentarily connected to ground as the connector couples with another connector to interconnect a cable with, e.g., a computer. The discharge elements interconnect the conductors of a cable to redistribute an electrostatic charge and thereby minimize the impact of a discharge when the cable couples with an electronic system such as a computer. Another embodiment comprises a male connector with discharge elements, which ground conductors of the cable as the cable is being inserted into the connector. The discharge elements are pushed out of the way of the conductors as the conductors couple with the connector.

Abstract: Methods to enhance browsing of messages in a message queue are disclosed. Embodiments include hardware and/or software for tracking records browsed by one or more agents. The agents can be processes designed to collect, process, and/or reformat data for an upperware application, a data warehouse, and/or similar arrangements. When agents set up communications with a queue, the agents may include an attribute setting that instructs the middleware to track the last record browsed and/or the next record to browse. In response to setting the attribute, some embodiments record the current record number, row number, queue identifier, and/or the like in a database with an agent identification (ID). Then, whenever an agent re-establishes communication with the middleware queue using the same ID, the middleware can retrieve the current record number.

Abstract: In one embodiment a method for programming memory cells is disclosed. The method can include applying a programming voltage to a selected memory cell during a lower page programming procedure, the selected memory cell can be part of a string of memory cells containing unselected memory cells, where the string of cells have a source side between the selected memory cell and a source line and have a drain side between the selected memory cell and bit line. The method can also include applying pass voltages to the unselected memory cells during the lower page programming procedure and applying pass voltages to the unselected memory cells during the upper cell programming procedure. The pass voltages can be higher during the upper page programming than during the lower page programming procedure.

Abstract: Methods for managing an interactive streaming image system are disclosed. More particularly, hardware and/or software for generating, encoding, and transmitting image frames to an interactive client are disclosed. One embodiment provides a method for streaming images from a server to a client. Embodiments may include receiving from the client via a network client information and generating a new image frame based on the received client information. Embodiments may also include comparing the new image frame and a previous image frame and setting a new compression level based on the comparison between the new image frame and the previous image frame. Embodiments may also include encoding the new image frame based on the new compression level and transmitting the encoded new image frame and an indication of the new compression level to the client via the network.

Abstract: Methods, systems, and media to test a code segment of a source file are disclosed. Various embodiments machine-render a source code skeleton in response to a selection of the code segment, incorporate the code segment into the source code skeleton to generate a temporary source file, insert a monitoring statement into the temporary source file, and compile the temporary source file into a compiled program to output a result. Embodiments may further include executing the compiled program and outputting the result. In addition, some embodiments also initiate compilation of the temporary source file, attempt to resolve a compilation error, and output the compilation error. Some embodiments terminate execution in response to selection of a cancel button. Further, some embodiments delete the temporary source file. Several embodiments also include a file creator, a code gatherer, a code generator, an adaptive compiler, a processor, and an output device.

Abstract: Apparatuses, circuits, and methods to reduce duty cycle errors are disclosed. Embodiments generally comprise buffer circuits coupled with error detection circuits and correction feedback circuits that sense duty cycles errors in output signals from the buffer circuits, generate error signals, and couple the error signals back to the inputs to correct or reduce the duty cycle errors. The error circuits may comprise active low pass filters in various embodiments, while amplifiers generally comprise inverter buffers or other simple buffers which alter or affect the input signals to the buffer circuits in order to reduce the duty cycle errors. In many system and apparatus embodiments, the error circuits comprise a resistor-capacitor circuit coupled with an inverter buffer. The error detection circuits generally function as active low pass filters and generate error signals for the feedback circuits.

Abstract: One arrangement includes a sense element to convey a current from a source to a load and a compensation element located proximate to the sense element. The compensation element having a resistance that changes proportional to a change in temperature of the sense element. The arrangement further includes an operational amplifier having a first input connected to the sense element, a second input connected to the compensation element and an output that provides an output signal that biases a current through the compensation element in response to a voltage across the sense element. The bias current provides an output signal proportional to the conveyed current and the compensation element provides temperature compensation for the output signal. Other embodiments are also disclosed.

Abstract: Systems, methods and media for managing software defects by aggregating potential software defect information from a plurality of user computer systems are disclosed. Embodiments may include receiving a plurality of software state logs each from an originating user computer system, where each software state log is associated with a potential software defect of an application executing on its originating user computer system and each software state log includes software state information associated with its originating user computer system. Embodiments may also include storing the received software state logs in a defect repository and analyzing the software state information of the stored software state logs to detect patterns in the software state information. Further embodiments may include verifying that a potential software defect associated with a software state log is a defect and transmitting a verification of the software defect to the particular user computer system.

Abstract: A method for selecting packets to be switched in a collapsed virtual output queuing array (cVOQ) switch core, using a request/acknowledge mechanism. According to the method, an efficient set of virtual output queues (at most one virtual output queue per ingress adapter) is selected, while keeping the algorithm simple enough to allow its implementation in fast state machines. For determining a set of virtual output queues that are each authorized to send a packet, the algorithm is based upon degrees of freedom characterizing states of ingress and egress adapters. For example, the degree of freedom, derived from the collapsed virtual output queuing array, could represent the number of egress ports to which an ingress port may send packet, or the number of ingress ports from which an egress port may receive packets, at a given time.

Abstract: Systems, methods, and media for providing remote wake-up and management of systems in a network are disclosed. More particularly, hardware and/or software for a server to receive feedback from a client as to the status of its wake-on-LAN functionality is disclosed. Embodiments include hardware and/or software for determining a client to be managed, determining whether the client is active on the network, transmitting a first network packet comprising a wake-on-LAN packet, and receiving a return wake-on-LAN packet, which comprises an indication of the address of the client and an indication of the status of the wake-on-LAN functionality of the client. Embodiments may also include transmitting a command to start a management session on the client.

Abstract: Methods to capture a digital image are disclosed. Embodiments include methods for taking multiple color data readings with a series of sensing elements in one collecting location during a single exposure, associating the collecting location with a pixel, and calculating a color value for the pixel based on the multiple color data readings. The method may include directing light successively to the sensing elements of the series of sensing elements within one exposure via reflective optics. The method may include determining that a sensing element of the series of sensing elements is defective. The method may include redirecting light to align a non-defective sensing element of the series of sensing elements with the collecting location. The non-defective sensing element and the defective sensing element may be associated with the same color.

Abstract: A device is disclosed for providing compensation current continuously to compensate for leakage current at the node of an electrical circuit, such as a chip. The device includes a dummy storage cell, a single staged current mirror circuit and a non reconfigurable keeper circuit. The keeper can be used to compensate for a wide range of leakage corners where the internal storage is located. The adaptive keeper circuit not only increases the robustness of the storage node against leakage caused by process variation but also improves the overall performance of the static storage device connected to the node.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Systems, methods and media for simulation of integrated hardware and software designs are disclosed. More particularly, hardware and/or software for synchronizing cycle timers of an integrated hardware and software design are disclosed. One embodiment provides a system for simulating an integrated design. Embodiments may include one or more software components each having a single cycle timer and one or more hardware components each having a single cycle timer. Embodiments may also include a cycle synchronizer in communication with the one or more software components and the one or more hardware components that is adapted to call once per cycle the single cycle timers of the one or more software components and the one or more hardware components. In a further embodiment, the cycle synchronizer may be further adapted to call the single cycle timers of the components on the falling edge of the cycle.

Abstract: Systems and methods for scheduling data packets in a network processor are disclosed. Embodiments provide a network processor that comprises a best-effort scheduler with a minimal calendar structure for addressing schedule control blocks. In one embodiment, a four-entry calendar structure provides for rate-limited weighted best effort scheduling. Each of a plurality of different flows has associated schedule control blocks. Schedule control blocks are stored as linked lists in a last-in-first-out buffer. Each calendar entry is associated with a different linked list by storing in the calendar entry the address of the first-out schedule control block in the linked list. Each schedule control block has a counter and is assigned a rate limit according to the bandwidth priority of the flow to which the corresponding packet belongs.

Abstract: Systems and methods for controlling electro-migration, and reducing the deleterious effects thereof, are disclosed. Embodiments provide for reversal of an applied voltage to an integrated circuit when a measurement indicative of an extent of electro-migration indicates that a healing cycle of operation is warranted. During the healing cycle, circuits of the integrated circuit function normally, but electro-migration effects are reversed. In one embodiment, micro-electro-mechanical switches are provided at a lowest level of metallization to switch the direction of current through the levels of metallization of the integrated circuit. In another embodiment, if the measurement indicative of the extent of electro-migration exceeds a reference level by a specifiable amount, then the voltage applied to the integrated circuit is reversed in polarity to cause current to switch directions to counter electro-migration.

Abstract: Methods and arrangements to establish power rails for a computer system in accordance with a sequence requirement are disclosed. Embodiments may interconnect voltage regulators for components of a platform in accordance with a sequence requirement for establishing power rails for proper operation of the platform. The voltage regulators may comprise enable inputs for enabling the establishment of power rails and power good signal outputs to indicate establishment of power rails. Some embodiments include interconnections to couple voltage regulators in a series of stages. Power good signals output by voltage regulators in one stage may enable inputs of voltage regulators in a subsequent stage. In many embodiments, such interconnections advantageously implement power sequence requirements with little or no need for glue logic and/or programmable logic devices, reducing costs and space requirements associated with implementing the power sequence. Other embodiments are disclosed and claimed.