Abstract: A network interface device with resource reservation protocol-traffic engineering capability and improved hot redundancy. A first interface card is provided for receiving a request, which specifies a data session between two host devices in a network, from an adjacent node in the network, and for storing a session parameter based on the request. A standby interface card is provided for receiving a request from the active interface card, based on the request received by the active interface card, and for storing another session parameter, concurrently with a storing of the session parameter by the active interface card, based on the request. Failure detection circuitry is provided for detecting a failure within the active interface card, and for coupling the second interface card to the adjacent node depending on whether or not a failure is detected.
Abstract: An integrated circuit (IC) device including a substrate, a plurality of device layers formed over the substrate, and a plurality of multi-level revision (MLR) structures that generate a revision code indicative of device revisions. Each MLR group structure includes a number of MLR cells and includes a parity circuit having a number of inputs coupled to the outputs of the MLR cells and having an output to generate a corresponding bit of the revision code. The MLR cells in each MLR group structure are assigned to different device layers, and each device layer is assigned to one MLR cell in each MLR group structure. Each revision code bit is controllable by any MLR cell in the corresponding MLR group structure.
Type:
Grant
Filed:
June 15, 2007
Date of Patent:
September 15, 2009
Assignee:
NetLogic Microsystems, Inc.
Inventors:
Dimitri Argyres, Bindiganavale S. Nataraj
Abstract: Controlling a searchable range within a network search engine. A CAM array is provided within the network search engine to store data values in entries having respective addresses and to compare the data values with a search key. First address and a second addresses that define a range of the addresses are received at an interface of the network search engine, and range-control circuitry is provided within the network search engine to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key.
Abstract: Techniques for facilitating efficient local search using acronym are disclosed. According to one aspect of the techniques, a graphic user interface is provided to accept inputs from a user; letters successively entered as the inputs from the user are received; and titles are then progressively reduced and displayed in accordance with the letters, wherein the titles have words each beginning with one of the letters.
Abstract: A method and system are provided for using the contents of voice files as a basis for enabling search and other selection operations for data items that are associated with those voice files. Voice files may be received having associations with other data items, such as images or records. A corresponding text file is generated for each of the one or more voice files using programmatic means, such as a speech-to-text application. Each text file is provided an association with a data item based on the association of the voice file that served as the basis of its creation. Each text file is then made available for the performance of search and selection operations that result in the identification of associated data items.
Type:
Grant
Filed:
January 3, 2006
Date of Patent:
August 11, 2009
Assignee:
Orb Networks, Inc.
Inventors:
Luc Julia, Alexandre Guion, Johan Le Nerriec, Rafael Cortina, Stephen Marth
Abstract: Network devices, storage mediums and methods for updating a memory structure in a data plane of the network device when route updates are received in the control plane of the network device. The methods described herein can be used to perform one of the following algorithms: a Basic Incremental Split-Merge (BISM) algorithm, a Lazy Incremental Split-Merge (LISM) algorithm, and a Down-support Split-Merge (DSM) algorithm. Each of the algorithms described herein may be used to incrementally update portions of a forwarding database stored within the memory structure, where the updated portions correspond to only those portions affected by the route updates.
Abstract: Embodiments described herein provide numerous applications and implementations of a social network to facilitate individuals to resolve various life issues. These issues may include issues that arise when individuals or families relocate, including logistic problems, assimilation of family members in a community, and roommate pairings. As will be described, embodiments described herein greatly facilitate corporations in relocating their employees logistically, and also assist employees and their families with life issues that may determine whether the employees' relocation will be a success.
Abstract: In a dynamic random access memory device, refreshing each normal-retention row of storage cells once per refresh interval, refreshing each low-retention row of storage cells more than once per refresh interval and refreshing each high-retention row of storage cells that is associated with a low-retention row of storage cells once every nth refresh interval.
Abstract: A method of modifying a finite state machine (FSM) wherein the FSM is accessed by a plurality of entries, with each entry comprised of a substring and a next-state pointer, and the FSM is modified so that each entry comprises a length, which is less than or equal to a maximum size boundary placed on a memory device configured for storing the FSM.
Abstract: Embodiments described herein provide numerous applications and implementations of a social network to facilitate individuals to resolve various life issues. These issues may include issues that arise when individuals or families relocate, including logistic problems, assimilation of family members in a community, and roommate pairings. As will be described, embodiments described herein greatly facilitate corporations in relocating their employees logistically, and also assist employees and their families with life issues that may determine whether the employees' relocation will be a success.
Abstract: A memory controller having a time-staggered request signal output. A first timing signal is generated with a phase offset relative to a first clock signal in accordance with a first programmed value, and a second timing signal is generated with a phase offset relative to the first clock signal in accordance with a second programmed value. An address value is transmitted in response to the first timing signal and a control value is transmitted in response to the second timing signal, the address value and control value constituting portions of a first memory access request.
Type:
Grant
Filed:
June 25, 2007
Date of Patent:
July 7, 2009
Assignee:
Rambus Inc.
Inventors:
Ian P. Shaeffer, Bret Stott, Benedict C. Lau
Abstract: In a method and apparatus for encoding a bit field within a memory device, the bit field is encoded in a manner that requires fewer memory device entries and fewer encoded bits per entry than conventional encoding schemes.
Abstract: A CAM device having two execution pipelines includes control logic and a CAM core. The CAM core includes a plurality of independently searchable CAM arrays for storing CAM words. The control logic receives a first request that selects any number of the CAM arrays for a first compare operation, and receives a second request that selects any number of the CAM arrays for a second, separate compare operation. The control logic determines whether the same CAM array is selected by both requests. If not, the control logic schedules the first and second compare operations to be executed simultaneously in the CAM core. Otherwise, the control logic schedules the first and second compare operations for sequential executionuses a suitable arbitration technique to determine the order in which the first and second compare operations will be executed in the CAM core.
Abstract: A cover for an opening in the housing of a portable electronic device that provides a function in addition to that of protecting the opening from dirt. The cover can be coupled to the housing so that it can move between a closed position within the housing's surface recess and an open position that allows access to the opening in the housing. In the closed position, the cover becomes part of the housing and the of the device is generally unchanged. The cover can function as an antenna for wireless communication between the device and a network or access point, and it can contain circuitry for devices such as transmitter/receivers. The cover can also function as a display device, a speaker, or an alarm. Thus an existing cover that occupies space within the volume of a handheld device can be utilized for expanding the functionality of the device while generally retaining the current form factor of the device.
Abstract: A content addressable memory (CAM) device having CAM cells arranged in rows and columns. A plurality of pairs of data lines extend along respective columns of the CAM cells, each pair of data lines including at least one data line that is formed by conductive segments disposed in two different conductivity layers of the CAM device.
Abstract: An index is provided that holds information about each image content item in a collection of items, For each image content item, a first information item identifying the image content item and its location on a network, and at least one of (i) a second information item identifying a signature value of an object in the image content, or (ii) identification of a recognized object in the image content.
Abstract: An analog video receiver implemented in an integrated circuit device. The analog video receiver includes first and second mixing circuits to generate a complex baseband signal by mixing a carrier-frequency analog video signal with respective sinusoids of a quadrature sinusoid pair; and a filtering circuit to subtract a scaled complex conjugate of the complex baseband signal from the complex baseband signal.
Abstract: A network system includes a content search system for determining whether an input string matches a regular expression comprising an exact pattern and an inexact pattern, the content search system including a first search circuit dedicated to perform an exact string match operation to determine whether the input string contains a first portion that matches the exact pattern, and a second search circuit dedicated to perform an inexact string match operation to determine whether the input string contains a second portion that matches the inexact pattern.
Type:
Grant
Filed:
September 19, 2006
Date of Patent:
May 26, 2009
Assignee:
NetLogic Microsystems, Inc.
Inventors:
Michael E. Ichiriu, Martin Fabry, Larry A. Wall, Sanjay Sreenath
Abstract: A search circuit for determining whether an input string including a plurality of input characters matches an inexact pattern including a number of pattern characters that are members of a specified character set, the search circuit including an input for receiving a bitcheck command, the bitcheck command containing a bitmap including a plurality of compliance bits each indicating whether a corresponding one of a plurality of reference characters of a general character set is a member of the specified character set, and a circuit for referencing each of the input characters to a corresponding compliance bit in the bitmap to determine whether the input character are members of the specified character set.