Abstract: The disclosed device is directed toward a delivery system comprising a source of pressurized fluid. A discharger is coupled to the source of pressurized fluid. A barrel is coupled to the discharger. A loading mechanism is coupled to the barrel, wherein the loading mechanism includes a chamber disposed in the barrel and a loader is coupled to the chamber and a reloader is coupled to the loader. An elevator is coupled to the barrel. A direction swivel is couple to the source of pressurized fluid.

Abstract: A system and method for identifying media content presented over a media playing device. The media content, such as, such as audio and/or video, is either available digitally or digitally sampled. The media content is sampled to generate a media sample or analytical representation of the media content. The media sample is compared to a collection of sampled (or represented) media content to identify it and to ascertain information related to the sample. This media content-related information is then presented to the user via a display means on the media player. The media player then presents the user specific and related actions that are based upon the information presented and allows the user to directly execute their choice of actions.

Abstract: Various methods for ensuring compatibility between devices utilizing the IEEE 1394-1995 serial bus standard and new implementations of the standard are disclosed. Methods are disclosed which a allow border nodes to speed filter a Legacy cloud. Methods are disclosed which allow a BOSS node to speed filter a Legacy cloud. A method for ensuring compatibility is disclosed which comprises the acts of determining whether the B PHY desires to communicate at a speed on a bus having a peer device not capable of communicating at the speed; and speed filtering the peer device if the B PHY determines that the peer device cannot communicate at the speed. Various data packets and methods for transmitting data packets are also disclosed to satisfy the needs discussed herein.

Abstract: An n-channel MOS transistor negative-voltage charge pump is disclosed in which the bulks of the n-channel MOS transistors are biased in such a manner as to prevent turning on the parasitic bipolar transistor inherent in the CMOS environment of the charge pump structure.

Abstract: In a computer system including a central processing unit and a transducer for providing data input to the system from a source having controllable operational features and parameters for adjusting characteristics of the data independently of the source and where the system's operating system manages data requests from an application program with one or more data entry fields and associated data entry criteria, a method for responding to a data request by the application program includes tagging the input data with an input source identification; packaging the data and the input source identification as a data module, the data module being associated with a predetermined data entry field in the application software; transferring the data module from the transducer to the application via the operating system; and associating the data module to one or more predetermined data entry fields of the application software based on the input source identification and the associated data entry criteria.

Abstract: A clock tree distribution network for a field programmable gate array comprises an interface that has a root signal chosen from at least one of an external clock signal, an internal clock signal, a plurality of phase lock loop cell output signals and programmable elements. The FPGA includes a logic array that has programmable elements coupling the logic array to a programmable routing architecture and the interface. A routed clock network selects a signal from between a clock signal from the interface, a local signal from the logic array through the routing architecture, Vcc or ground, and routes the selected signal to the logic array through the clock tree distribution network. A hardwired clock network that selects a signal from between a clock signal from the interface and a local signal from the routing architecture, and routes the selected signal to a plurality of flip-flops in the logic array through the clock tree distribution network.

Abstract: A method of playing a casino table version of cribbage using at least one deck of conventional playing cards, having at least one player making a wager and a dealer that deals the cards. The method includes having at least one player making a wager to receive a plurality of cards. Next, the cards are dealt to each player and the dealer is dealt a plurality of cards, wherein four random cards are dealt to create the dealer hand. The players discard either one or two cards depending on the method chosen. The dealer then exposes his cards and discards two cards. Next, the starter card is exposed. Finally, the players' cards are exposed and values of the hands are computed and compared to the dealer's hand. The method includes determining whether the players win or lose their wager.

Abstract: The disclosure describes a magnetorheological fluid control valve. The magnetorheological fluid control valve comprises an electromagnetic coil having a first end and a second end. A first arm is magnetically coupled to the first end of the electromagnetic coil. A second arm is magnetically coupled to the second end of the electromagnetic coil. The second arm has a passage. A ferromagnetic rod having a diameter less than that of the passage is disposed in the passage and magnetically coupled to the first and second arms. A first manifold is coupled to the second arm at one end of the passage. A second manifold is coupled between the second arm and the first arm at an end of the passage opposite the first manifold. A magnetorheological fluid is disposed in the passage.

Abstract: A diamond foam article comprises diamond deposited material on a substrate having an open contiguous structure at least partially filled with a filler material. Methods for forming a diamond foam article comprise providing a foam substrate; preparing the foam substrate for diamond deposition; depositing diamond material on the foam substrate by one of several diamond deposition methods; and at least partially filling the diamond foam article with a filler material. Diamond foam articles are bonded to other components.

Abstract: A method and apparatus for presenting a plurality of link devices as separate nodes within a single serial bus module by generating individual or a distinct configuration ROM image for each link device in the module. Each configuration ROM includes an entry for a distinct identifier representing the corresponding link device thereby creating a one to one mapping of link device to node via the distinct configuration ROM.

Abstract: A low standby current power-on reset circuit is described. A first NMOS transistor's drain is coupled to a first PMOS transistor's drain; source coupled to ground line; and gate coupled to a first capacitor coupled to ground line. The first PMOS transistor's source is coupled to power line; gate coupled to second capacitor coupled to ground line; and drain provides a power-on reset indication. A second PMOS transistor's source is coupled to power line; drain is coupled to drain of second NMOS transistor, gates of first PMOS, second PMOS, and second NMOS transistors, and second capacitor. The second NMOS transistor's source is coupled to gate of first NMOS transistor and first capacitor. A discharge circuit is coupled to power line, ground line, and first and second capacitors for discharging the capacitors when a voltage on power line drops below a level determined by the second PMOS transistor's threshold voltage.

Abstract: Control circuitry for applying voltages to a memory circuit. In accordance with this invention, row circuitry applies either a high voltage or a low voltage to a memory cell based on the operation to be performed and column circuitry applies a high or a low voltage to the memory cell based on the operation to be performed.

Abstract: A loudspeaker enclosure is disclosed. The loudspeaker enclosure comprises a base panel, a first side panel configured to attach to the base panel, a second side panel configured to attach to the base panel, a top panel configured to attach to the first side panel and the second side panel, a front panel configured to attach to the base panel, the first side panel, the second side panel, and the top panel, the front panel defining at least one loudspeaker opening configured to receive a loudspeaker, and a rear panel configured to attach to the base panel, the first side panel, the second side panel, and the top panel.

Abstract: A circuit comprises an amplifier having first output node comprising a first n-channel MOS transistor and a second output node comprising a second n-channel MOS transistor. A first p-channel MOS transistor is coupled to a supply potential, and the second output node. A first PNP bipolar transistor is coupled to the first p-channel MOS transistor through a first resistor and to the second n-channel MOS transistor and to ground. A second PNP bipolar transistor is coupled to the first p-channel MOS transistor through a second resistor in series with a third resistor and to ground. The first n-channel MOS transistor is coupled to a common node between the second and third resistors. A third n-channel MOS transistor is coupled to the first p-channel MOS transistor, to ground through a fourth resistor, and to either a reference potential or to the common node between the second and third resistors.

Abstract: A metal-to-metal antifuse according to the present invention is compatible with a Cu dual damascene process and is formed over a lower Cu metal layer planarized with the top surface of a lower insulating layer. A lower barrier layer is disposed over the lower Cu metal layer. An antifuse material layer is disposed over the lower barrier layer. An upper barrier layer is disposed over the antifuse material layer. An upper insulating layer is disposed over the upper barrier layer. An upper Cu metal layer is planarized with the top surface of the upper insulating layer and extends therethrough to make electrical contact with the upper barrier layer.

Abstract: An anti-terrorist aircraft pilot sensor system is disclosed. The anti-terrorist pilot sensor system comprises a pilot sensor and an aircraft central processor unit operatively coupled to the pilot sensor. The aircraft central processor unit includes a transceiver operatively coupled to the aircraft central processor unit. An autopilot of the aircraft is operatively coupled to the aircraft central processor unit. A ground control remote from the aircraft is operatively coupled to the aircraft central processor unit and the ground control includes a transceiver coupled to the ground control. An aircraft override is operatively coupled to the ground control and is operatively coupled to the aircraft central processor unit. A divert element is operatively coupled to the central processor unit and the divert element includes a transceiver. The ground control is in operative communication with the divert element.

Abstract: A stun gun system includes a stun gun having a housing with a first end and a second end, and an electronics package for generating a high voltage or other discharge. The first end is configured to form a handle which has a first pair of contacts and the said second end has a second pair of contacts. The stun gun system includes a first switch configured in a first position and the electronics package, is electronically connected through the switch to the first pair of contacts.

Abstract: A double-slope MOS active pixel sensor disposed on a semiconductor substrate has a first light-to-output-voltage transfer gain up to a first charge accumulation threshold, has a second light-to-output-voltage transfer gain lower than the first light-to-output-voltage transfer gain above the light accumulation threshold, and comprises first and second photodiodes each having a first terminal coupled to a fixed potential and a second terminal. The second photodiode is smaller than the first photodiode. First and second semiconductor reset switches each have a first terminal coupled respectively to the second terminal of the first and second photodiodes and a second terminal coupled respectively to first and second reset potentials that reverse bias the photodiodes. First and second semiconductor amplifiers each have an input coupled respectively to the second terminals of the first and second photodiodes and have their outputs coupled together.

Abstract: A method for eliminating false failures saved by redundant paths during critical area analysis of an integrated circuit layout is described. Monte Carlo simulation generates simulated defects for an integrated circuit layout. Vertices significantly encroached by the simulated defects are identified. Information of predefined sets of vertices associated with individual nets including at least one of the identified vertices is retrieved. Failures resulting from the simulated defects are indicated only if all elements of at least one of the predefined sets of vertices are one of the identified vertices. The predefined sets of vertices are determined prior to circuit area analysis by extracting nets from an integrated circuit layout, and determining the predefined sets of vertices for individual nets such that the net fails only if all elements of individual of the predefined sets of vertices are significantly encroached by simulated defects.

Abstract: The present invention, generally speaking, provides a firewall that achieves maximum network security and maximum user convenience. The firewall employs “envoys” that exhibit the security robustness of prior-art proxies and the transparency and ease-of-use of prior-art packet filters, combining the best of both worlds. No traffic can pass through the firewall unless the firewall has established an envoy for that traffic. Both connection-oriented (e.g., TCP) and connectionless (e.g., UDP-based) services may be handled using envoys. Establishment of an envoy may be subjected to a myriad of tests to “qualify” the user, the requested communication, or both. Therefore, a high level of security may be achieved. The usual added burden of prior-art proxy systems is avoided in such a way as to achieve full transparency—the user can use standard applications and need not even know of the existence of the firewall.