Abstract: Real time vehicle guidance by central traffic unit is provided by a system which includes a central traffic unit, a plurality of vehicles equipped with mobile guidance units, and communication system based on GSM/GPS technology. The central traffic unit maintains the perpetually updated database of travel times for all sections of roads, while mobile guidance units include mobile cell phone handset units communicatively linked to the central traffic unit computer server. Mobile guidance units also comprise smart card capable to detect when a mobile cell phone unit is located in the mounting receptacle. To detect a bottleneck situation when it arises and to estimate a current travel time for a corresponding section of road, the central traffic unit maintains a list of probe vehicles that have recently exited that section.

Abstract: A system and method for real time vehicle guidance by Central Traffic Unit are presented. The proposed vehicle Guidance System includes a plurality of vehicles equipped with Individual Mobile Units including GPS units (position determining systems adapted to determine their present position) and communicatively linked to the Central Traffic Unit computer server. The Central Traffic Unit broadcasts the updated traffic patterns in real time thereby enabling the Individual Mobile Units to dynamically calculate the desired optimal travel paths. In response to a request from a driver for a route update from his present position to a desired destination, the Individual Mobile Unit searches for an optimal (usually fastest) route and shows it to the driver. In route searching by the minimal time criterion, the Individual Mobile Unit relies on estimated travel times stored in its database, and may also use current real time information on bottleneck situations received from Central Traffic Unit.

Abstract: A die contacting substrate establishes ohmic contact with the die by means of raised portions on contact members. The raised portions are dimensioned so that a compression force applied to the die against the substrate results in a limited penetration of the contact member into the bondpads. The arrangement may be used for establishing electrical contact and with a burn-in oven and with a discrete die tester. This permits the die to be characterized prior to assembly, so that the die may then be transferred in an unpackaged form. A Z-axis anisotropic conductive interconnect material may be interposed between the die attachment surface and the die.

Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed with the CPU with its operation modified. As a result, it is unnecessary to decrypt the program into standard op codes prior to execution. The keyed program operation permits secure transfer of program data through open channels such as the Internet. A programmable instruction decoder programmable decodes encrypted instruction op codes, without decrypting them into standard op codes. Logic is used to accomplish network handshaking. The network handshaking further used to provide additional key information for continued operation the CPU.

Abstract: Delay correction in a dual-channel analog-to-digital converter (ADC) is accomplished by insertion of coarse and fine delay correction registers prior to and after a frequency reduction element in a voltage channel. A dual-channel ADC includes first and second delta-sigma modulators and a digital filter, subject to multiple sampling rates for optimizing coarse and fine adjustments of delay. An energy calculation is performed in a sampled data domain, which is implemented using digital multiplication techniques in a delay compensation scheme performed in the digital domain. The digital data subject to filter processing is delayed by predetermined amounts. The dual-channel ADC is provided with a programmable channel delay adjustment in the voltage channel thereof. A delay differential equal to &Dgr;I−&Dgr;V is calibrated and compensated subject to an acceptable time delay for production of a correct energy value.

Abstract: A digitally tuned and linearized low voltage crystal oscillator integrated circuit requires only an oscillator crystal as external circuitry. The inventive circuit operates at voltages of 3.3V and below and requires no other off-chip components. A crystal oscillator, such as a Pierce crystal oscillator uses an inverting gain stage and a phase shift network composed of an array of switchable capacitors and the crystal. The design offers improvements in power consumption, area, manufacturability and cost.

Abstract: A cassette chemical immobilization and treatment method enables the performance of various complex chemistries with minimal human intervention, near-zero dead volume, and flow-through protocols pursuant to a predetermined instruction set encoded on a multiple-address chemical treatment cassette assembly. The cassette assembly comprises a plurality of analyte sample columns ("mini-columns"), having a high-pressure interface capability to permit direct insertion of the mini-column into a high-pressure solvent line for use as a support column for HPLC analysis. A sample loader loads analyte samples either singly or simultaneously into the multiple, addressable mini-columns without the need to load the sample funnel/column assembly into a separate reaction chamber.

Abstract: Apparatus, methods, systems and computer program products are disclosed that provide an efficient mechanism for invoking a programmed operation at the first active use of the OOP object or data structure. The programmed operation can be used to initialize an object-oriented programming (OOP) object or data structure. The first active use of the data structure or OOP object is detected because the initial access mechanism is constrained to cause a misaligned memory access fault (trap) by attempting a non-byte access-mode memory access to an odd byte address. As the fault is processed, the access mechanism is converted so that the initial and subsequent non-byte access-mode memory accesses will succeed. In addition, the OOP object or data structure is initialized. Then the initial access attempt is repeated on the just initialized OOP object or data structure using the converted access mechanism.

Abstract: A software patch method and apparatus using a content addressable memory (CAM) to produce a code change enable signal when a program memory address matches a patch memory address, to cause program execution of modem operation to be diverted to the patch code when an address comparison hit is achieved. The patching apparatus includes a program memory for applying program instructions onto a data bus for execution, unless an address comparison of a program address and a patch address causes application of a substitute address onto the data bus.

Abstract: A method and apparatus for coupling an External Device to a Host Computer, such that program code to be executed by the external device may be stored in the Host Computer memory and yet be essentially independent of the Host Computer. Hardware and software enable the logical displacement of a program and address bus across inter-processor interfaces. An External Device preferably provides direct access to program code stored within Host Computer memory by means of a conventional DMA function. Program code which is to be executed by the External Processor within the External Device is transferred from the Host Memory to an Instruction Buffer memory within the External Device. The External Processor determines when to request additional instructions from the Host Memory over the DMA channel on a timed interrupt basis.

Abstract: A machine translates torque applied to the input shaft at an input speed (RPM), first into kinetic energy, and finally to torque on an output shaft. The input power is first converted to kinetic energy by accelerating a mass or masses, so that the reaction force to this acceleration is an oscillating bi-directional torque or force. This torque or force is then converted to a unidirectional torque applied to an output shaft. This arrangement provides a continually variable automatic transmission, or torque converter in which output shaft speed is proportional to the input shaft speed and inversely proportional to the load applied, and in which transmitted torque corresponds to the input shaft speed.

Abstract: An electronic timing system for controlling the injection angle of a fuel pump, comprising an input sleeve (12), an output drum (36), an intermediate drive sleeve (30), a drive plate (60), a drive yoke (76), and a stepper motor (90). Drive sleeve (30) includes a pair of radially inwardly and outwardly projecting drive pins (32), and drum (36) and input sleeve (12) both include helical slots (38) and (16), respectively, through which pins (32) project. Vertical movement of yoke (76) causes axial movement of drive plate (60) and drive sleeve (30), which causes a relative rotational adjustment of angle between input sleeve (12) and output drum (36), for retarding and advancing the timing of the fuel injection system.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single dice or separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: Integrated circuit devices on a wafer are tested by the use of test circuit on the integrated circuit devices which is connected by means of a grid. The grid is used to enable the test circuitry, and provides an ability to test the devices while still on the wafer. This facilitates burning in the wafer prior to singulating the parts, since it is not necessary to separately establish electrical connections at contact points on the individual integrated circuit devices. In one embodiment, an oscillator may be adjusted in speed so that further tests may be effected by changing a test speed through the test circuit. Response of the integrated circuits at different operating speeds is determined by the adjustment of the oscillator speed so that a timing signal used for the testing may be varied.

Abstract: A test circuit is provided for an integrated circuit device, whereby an oscillator is provided on-chip and is activated by a test circuit. The test circuit provides an ability to test the devices while still on the wafer and facilitates burning in the wafer prior to singulating the parts, since it is not necessary to separately establish electrical connections at contact points on the individual integrated circuit devices. The oscillator may be adjusted in speed so that further tests may be effected by changing a test speed through the test circuit. Response of the DUT at different operating speeds is determined by the adjustment of the oscillator speed so that a timing signal used for the testing may be varied.

Abstract: A reusable burn-in/test fixture for discrete die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. Electrical contact with bondpads or bumps on the die is established through an intermediate substrate. When the two halves are assembled, electrical contact with the die is established. The fixture establishes the electrical contact and with a burn-in oven and with a discrete die tester. The test fixture need not be opened until the burn-in and electrical tests are completed. The fixture permits the die to be characterized prior to assembly, so that the die may then be transferred in an unpackaged form. The intermediate substrate may be formed of semiconductor material or of a ceramic insulator. A Z-axis anisotropic conductive interconnect material may be interposed between the intermediate substrate and the die.

Abstract: Disclosed is a technique for testing a singularized semiconductor die prior to packaging the die, thereby allowing for the packaging or other use of only known good die. The invention employs a carrier tray which preferably supports several die carriers which individually support a plurality of dies. Bridge clamps press against rigid covers which bias the dies against the contact members. The die carriers include a housing of ceramic or other workable material. Contact pads on the interior of the package are coupled to exterior leads with conductive traces. The back side of a semiconductor die to be tested is removably mounted to a lid, and the bond pads on the die are aligned with the contact pads on the interior of the package. The lid is attached to the package thereby electrically coupling the contact pads with the bond pads on the die. The package has a configuration which facilitates the handling of the carrier so that the carrier can be conveniently used during burn-in and test procedures.

Abstract: A LOCOS process is enhanced by enhancing the depth of field oxide in regions having a narrow field oxide width. Subsequent to forming a pattern of nitride to define the field oxide and active area, photoresist is applied to selected areas of the wafer. An impurity is then applied to the underlying semiconductor substrate in areas not protected by photoresist and nitride. The impurity results in an enhanced oxidation rate and therefore compensates for a thinning effect in selected field oxide areas, such as those having a narrow width. Subsequent formation of the field oxide results in the doped material being consumed by the oxide.

Abstract: In order to provide pretested bare semiconductor integrated circuit die, a temporary mechanical connection is effected by the use of a soluble material. A semipermanent electrical connection is effected, in which the parameters of the connection are controlled, so that the die remains functional subsequent to burnin and test. Subsequent to testing and burnin, the die are removed from the package body. The technique is useful in providing known good die.

Abstract: Local Encroachment Reduction (LER) is described, in which a fraction of field oxide is selectively etched. A high energy boron implant is used to maintain adequate active area isolation after the removal. This implant also doubles as a LER high capacitance and provides a carrier to minority substrate electrons. After the high energy boron implant, an N-type bottom plate capacitor is implanted. At that point, the wafer is completed by existing techniques.