Abstract: Some embodiments of the invention provide an configurable integrated circuit (“IC”). This IC has at least fifty configurable nodes arranged in an array that several rows and columns. The IC also has several direct offset connections, where each particular direct offset connection connects two offset nodes that are neither in the same column nor in the same row in the array. In some embodiments, several direct connections do not include any intervening circuits. On the other hand, in some embodiments, several direct connections have intervening circuits, which differ from the nodes in the array.

Abstract: Some embodiments provide a method of performing mode selection in a video compression and encoding system. The method encodes with several encoding modes from a set of encoding modes. The method computes a distortion value for each encoding mode from the several encoding modes. The method computes a bit rate value for each encoding mode from the several encoding modes. The method computes a Lagrangian value for each encoding mode from the several encoding modes, using the distortion value, the bit rate value, and a Lagrangian multiplier. The method selects an encoding mode based on the Lagrangian values. In some embodiments, computing the distortion value includes using a function that reduces the effects of outliers. In some embodiments, the Lagrangian multiplier is a slow varying Lagrangian multiplier that varies at a slower rate than a varying reference Lagrangian multiplier for a reference encoding mode. In yet some embodiments, the method clusters the Lagrangian values.

Abstract: A technique generates a pyramid of image tiles to represent a source image at different resolutions. A base image tile stores, in a plurality of elements, an “on” state or an “off” state to represent the source image at a first resolution. Additional image tiles, with image resolutions lower than the resolution of the base image tile, are generated. The base image tile is divided into groupings of elements, such that each level of the pyramid of image tiles is generated by mapping a grouping of elements from the base image tile to an image tile at different levels of the pyramid. A threshold density of elements in the grouping elements is selected. If the grouping of elements in the base image tile for a level has a threshold density of “on” elements, the image data for the element in the current level is set to an “on” state. Conversely, the image data for the element is set to an “off” state if the threshold density of “on” elements in the base image tile grouping is less than the threshold density.

Abstract: To allow users to compensate for different and dynamically changing lighting conditions, the present invention introduces a graphical user interface shading system. The graphical user interface shading system provides a very simple intuitive interface to the user. In one embodiment, the user is presented with an adjustable user interface widget such as a slider that allows the user to select any shading setting along a shading continuum. The graphical user interface shading system reacts to the users control by adjusting a number of different graphical user interface elements in response to the new shading setting. In one embodiment, the graphical user interface shading system adjusts singled colored areas with a linear interpolation, text with a font color selection, icons with an icon bitmap selection, textured areas with a texture blend, and decals with a decal blend.

Abstract: A discrete inductive-capacitive (LC) filter selects between at least two inductor banks to tune the LC filter. The filter receives an input signal that includes one or more bands of frequencies. A control signal selects a band of frequencies for processing. A first inductor bank is selected to filter a first band of frequencies, and a second inductor bank is selected to filter a second band of frequencies. A switch circuit couples the input signal to either the first inductor bank or the second inductor bank. The switch circuit selects the first inductor bank if the first band of frequencies is selected, and selects the second inductor bank if the second band of frequencies is selected. The switch circuit electrically isolates the switching of the input signal to the first and the second inductor banks, so as to enhance the Q factor of the LC filter. Circuit and techniques are disclosed to reduce parasitic capacitance in a capacitive bank that employs MOS transistors.

Abstract: Determining a route between a start to the target geometry by producing potential route segments and testing the segments to determine whether they create acute angles in the route. If a potential route segment produces an acute angle in the route, it is prevented from being included in the route. Some embodiments define at least one border region about each start or target geometry. Associated with each border region are one or more routing rules that specify valid routing configuration that do not produce acute angles in the route within the border region. To avoid acute angles in the routing pathway between the start and target geometries, some embodiments test for acute angles at connection points between route segments using pretabulated tables that define connection configurations between route segments that do not contain acute angles.

Abstract: Some embodiments of the invention provide a method of identifying global routes for nets in a region of a layout with multiple layers, where each net has a set of routable elements. The method partitions each layer of the region into several sub-regions. For each net, the method then identifies a route that connects the sub-regions that contain the net's set of routable elements. Some of the identified routes have at least one non-Manhattan edge and traverse sub-regions on multiple layers.

Abstract: An unlicensed wireless service is adapted to generate the interface protocols of a licensed wireless service to provide transparent transition of communication sessions between a licensed wireless service and an unlicensed wireless service. In one embodiment, a mobile station includes level 1, level 2, and level 3 protocols for licensed wireless service and an unlicensed wireless service. An indoor base station and indoor network controller provide protocol conversion for the unlicensed wireless service into a standard base station controller interface of the licensed wireless service.

Abstract: Some embodiments of the invention provide a first configurable integrated circuit (IC) that has a first configurable IC design. The first configurable IC implements a second IC design that is specified for a second IC that is to operate a particular design rate. The first configurable IC includes several configurable logic circuits. Each configurable logic circuit can configurably perform a set of functions. The IC also includes several configurable interconnect circuits that configurably couple the logic circuits. At least several configurable circuits can reconfigure faster than the particular design rate.

Abstract: A method for routing of some embodiments defines global routes for nets in an arbitrary region of a circuit layout in which each net has a set of pins. The method uses a first set of lines of measure the length of the global routes, a second set of lines to measure congestion of the global routes, and a third set of lines to partition the arbitrary region into a first set of sub-regions. For each net, the method identifies a global route that connects a group of first-set sub-regions that contain the net's set of pins.

Abstract: Some embodiments of the invention provide a method for processing a hierarchical data structure that includes a parent data set and first and second child data sets of the parent data set. The parent and first and second child data sets includes several data tuples. From the second child data set, the method identifies a first data tuple that is not in the first child data set and that is relevant for the processing of the data tuples within the first child data set. The method then assigns the first data tuple to the first child data set and then processes the first child data set based on the data tuples included in the first child data set and assigned to the first child data set. In some embodiments, the method also identifies, from the parent data set, a second data tuple that is not in the first child data set and that is relevant for the processing of the data tuples within the first child data set.

Abstract: Some embodiments provide an IC with a configurable node array that has (1) two similar nodes within the interior of the array, and (2) two different connection schemes. The first connection scheme specifies a set of connections between the first node and a set of nodes in the array, while the second connection scheme specifies a second set of connections between the second node and a set of nodes in the array. The two nodes cannot connect to any nodes on the boundary of the array with any connection that is specified in any connection scheme.

Abstract: Some embodiments of the invention provide a method for synchronizing an audio stream with a video stream. This method involves searching in the audio stream for audio data having values that match a distinct set of audio data values and synchronizing the audio stream with the video stream based on the search. In some embodiments, the distinct set of audio data values is defined by a predetermined distinct tone. In other embodiments, the distinct set of audio data values is defined by audio data contained in the video stream.

Abstract: Some embodiments of the invention provide a method of pre-computing routes for nets a region of a design layout. These routes are used by a router that uses a set of partitioning lines to partition the region into a plurality of sub-regions. For each particular set of potential sub-regions, the method initially identifies a set of routes that traverse the particular set of potential sub-regions. For each particular route identified for each particular set of sub-regions, the method then determines whether the particular route is stored in a storage structure. If not, the method stores the particular route in the storage structure.

Abstract: The present invention introduces a method for implementing a gridless non Manhattan router by modifying an existing gridless Manhattan router. In the method of the present invention, a tile based router that uses tiles to represent circuit geometry or free space between circuit geometry is first selected. Next, at least one tile routing layer of the tile based router is rotated to implement a diagonal wiring layer. The code of the router is then adjusted to ensure that a via that will connect a Manhattan layer to a non Manhattan layer (a diagonal layer) will fit within a tile on both layers.

Abstract: An apparatus comprising a substrate; and a platform elevated above the substrate and supported by curved flexures. The curvature of the flexures results substantially from variations in intrinsic residual stress within the flexures. In one embodiment the apparatus is a deformable mirror exhibiting low temperature-dependence, high stroke, high control resolution, large number of degrees of freedom, reduced pin count and small form-factor. Structures and methods of fabrication are disclosed that allow the elevation of mirror segments to remain substantially constant over a wide operating temperature range. Methods are also disclosed for integrating movable mirror segments with control and sense electronics to a produce small-form-factor deformable mirror.

Abstract: Some embodiments provide a method of pre-computing routes for nets in a region of an integrated circuit (“IC”) layout. The method initially defines a set of partitioning lines for partitioning the region into a plurality of sub-regions during a routing operation. For a particular set of potential sub-regions, the method then identifies a set of routes that traverse the particular set of potential sub-regions, where at least one of the identified routes has at least one diagonal edge. The method then stores the identified routes.

Abstract: As Internet packet flow increases, the demand for high speed packet filtering has grown. The present invention introduces a high-speed rule processing method that may be used for packet filtering. The method pre-processes a set of packet filtering rules such that the rules may be searched in parallel by a set of independent search units. Specifically, the rules are divided into N orthogonal dimensions that comprise aspects of each packet that may be examined and tested. Each of the N dimensions are then divided into a set of dimension rule ranges. Each rule range is assigned a value that specifies the rules that may apply in that range. The rule preprocessing is completed by creating a search structure to be used for classifying a packet into one of the rule ranges in each of the N dimensions. Each search structure may be used by an independent search unit such that all N dimensions may be searched concurrently.

Abstract: The invention is directed towards assemblies of electrical or electronic circuit boards. More specifically, the present invention relates to an assembly for housing multiple computer circuit boards. The assembly include a housing that has several railing coupled to the housing. A connector is structurally and electrically coupled to the railings for hanging the computer circuit boards. Structural coupling between the connector and the railing is accomplished by placing the connector in contact with the railing in a file hanging method. This contact also creates an electrical coupling and establishes an electrical connection between the connector and the railing.

Abstract: Some embodiments of the invention provide a configurable logic circuit. The logic circuits has inputs for receiving input data. It also has a first connecting circuit for receiving configuration data and at least a portion of the input data. Based at least partially on the received portion of the input data, the first connecting circuit selects configuration data sub-sets. The logic circuit also includes a second core-logic circuit for receiving configuration data sub-sets from the first connecting circuit and for providing the output data. At least two configuration data sub-sets configure the configurable logic circuit to perform at least two different functions on the input data to produce output data.