Abstract: A three modulus prescaler for a phase-locked loop frequency synthesizer includes a N.sub.0 modulus prescaler inputting into a divide-by-two circuit. A microprocessor and internal logic control a three modulus prescaler synchronizer to receive signals from the divide-by-two circuit and output control commands to the N.sub.0 modulus prescaler so as to cause the N.sub.0 modulus prescaler to divide solely by a first or second modulus, or alternately between said first and second modulus, between output pulses of the divide-by-two circuit to extend the synthesizer's bandwidth.

Abstract: A touch-sensitive overlay (20) for cooperative, optically proximate engagement with a visual display (22) of luminous character information (38) latently occupying one or more of a plurality of character locations (26) defined with a position-multiplexed coordinate array one from another, is comprised of a mask (44) of a photoreactive transducer (52) having at least one photoelectric parameter which varies as a function of incident light from the display of character information striking the transducer, and a signal circuit element (92) responsive to a variation in the photoelectric parameter in communication with the mask for developing a characteristic logic pulse indicative of the position of one or more character locations within the array upon a touch thereof and the coincident presence of character information thereat (48).

Abstract: A dual slope analog to digital (A/D) converter starts by auto zeroing and making a number of high speed A/D samples before auto zeroing again. A microprocessor causes output of the high speed samples for a bar graph and applies predetermined correction factors to allow accumulation of the high speed samples to provide a high accuracy numerical output.

Abstract: In a recirculation of remainder type analog to digital converter, successive remainders recirculated to develop an output digital signal are overlapped to cancel common error components.

Abstract: A stable voltage reference is connected to a two channel digital to analog converter connected to a range setting amplifier which provides the calibrator output. A microprocessor zeroes the calibrator by shorting the inputs of a zero amplifier to provide a reference zero towards which the calibrator is adjusted. It establishes the relative weighing of the two channels by adjusting one channel one increment up from zero and measuring the number of increments required by the other channel to return to zero. The microprocessor determines the gain change in the converter by establishing a bridge with known components and relating changes in the bridge voltage to the shift in gain.

Abstract: The ladder network of a recirculation of remainder analog to digital converter has pairs of controlled switches connected alternately to a voltage source and a ground, to establish unidirectional current flow through the switches. Unidirectional current flow eliminates ladder error caused by current flow direction resistances inherent in the switches.

Abstract: A calibration circuit for a recirculation of remainder analog-to-digital (A/D) converter heuristically solves a multiple variable conversion equation. Input analog calibration and analog reference signals are compared in a comparator, and when the two signals have a predetermined relationship, the comparator generates an indicator signal. A microprocessor determines a first pattern of digital reference signals that, together with digital calibration signals generated by the microprocessor, causes the comparator to generate the indicator signal and a second pattern of digital reference signals that, together with the input analog calibration signals, causes the comparator to generate the indicator signal. The difference between the first and second patterns of digital reference signals is stored as conversion coefficients.

Abstract: A measuring instrument provides a reading only when a desired measurement is taken by making successive measurements and waiting until two successive measurements are within a predetermined low range, the measurements are above a predetermined floor range, and the difference between a reading and successive measurements exceed a predetermined high range.

Abstract: A circuit for supplying regulated first and second supply voltages to the amplifier/comparator of a recirculation of remainder analog to digital converter, comprises a series pair of transistors connected as emitter followers between unregulated voltage sources. Outputs of the emitter followers carry the regulated supply voltages and are applied to the supply terminals of the amplifier/comparator. A pair of diodes connected in series between the bases of the emitter followers establish the magnitudes of the two regulated supply voltages. The junction voltage between the two Zener diodes is controlled by a difference amplifier that in turn is responsive to an analog input voltage and the output of the amplifier/comparator. The output of the difference amplifier causes the regulated supply voltages to track a common mode signal component inherent in the converter and thereby improves component accuracy.

Abstract: A system for tailoring the frequency response of the amplifier of an AC volt meter during calibration, comprising an adjustable filter consisting of a primary resistor and a number of differently valued capacitors connected together through a corresponding number of switches within an array. During a calibration mode, a test voltage is applied to the input of the amplifier, and the microprocessor switches different values of the capacitors in circuit with the amplifier. The combination of capacitors that causes the frequency response of the amplifier to match most closely with a predetermined response is selected for calibration.

Abstract: Stray capacitance is reduced in a wideband tunable oscillator network by arranging the resonant circuit as one or more series circuit branches wherein a variable capacitance such as a varactor diode is interposed between two substantially identical inductors. In the disclosed VHF-UHF oscillator, the inductors are realized by TEM transmission lines of the stripline variety. The stripline is formed by a multilayer printed circuit board arrangement and two resonant circuit branches are interconnected in a manner that permits biasing of the varactor diodes without the use of blocking capacitors in the resonant circuit path.

Abstract: A method of, and an apparatus for, high speed resistance (R), inductance (L) and capacitance (C) measurement is disclosed. A voltage or current based excitation signal having a very low voltage level and a predetermined waveform is applied to the item whose R, L or C parameter(s) is (are) to be measured; and, voltage measurements are made at predetermined points in the time domain of the output voltage waveform. Whether the excitation signal is voltage based or current based, the particular shape of the waveform (preferably trapezoidal or dual polarity rectangular wave) and the voltage measurement points in the time domain of the output voltage waveform are determined by: (i) the nature of the parameter (R, L or C) to be measured; (ii) the magnitude of the parameter (small or large) in the case of R and C parameters; and, (iii) the series/parallel nature of the parameters in situations where significant amounts of two parameters coexist in the item being measured.

Abstract: A test system for functionally testing and troubleshooting microprocessor-based systems and assemblies is disclosed wherein the test system is connected in place of the microprocessor circuit of the unit being tested (UUT). The test system is itself a microprocessor-based system and includes a microprocessor circuit which is supplied with the UUT clock signal and is the same type of microprocessor circuit as is utilized by the UUT. The test system periodically switches this microprocessor into signal communication with the UUT for a single UUT bus cycle to perform UUT read or write operations. During remaining time periods, the test system microprocessor circuit is in signal communication with the remaining portion of the test system to analyze data obtained from the UUT bus during the previous UUT write or read operation and to establish the signals to be used in the next UUT write or read operation. Various test sequences are provided for testing the UUT bus, RAM, ROM, and write-responsive I/O registers.

Abstract: Bi-polar electronic signal converters, such as analog-to-digital or digital-to-analog converters, with a single polarity accurate reference source are disclosed. In one polarity direction, the accurate reference source is used in a conventional manner to transform the signal to be converted from one form (e.g., analog) to the other form (e.g., digital). In the other polarity direction, an inaccurate reference source is used in a similar conventional manner to convert the signal from one form to the other form. Periodically, the accurate and the inaccurate reference sources are compared to determine a correction multiplier. The correction multiplier is used during conversions using the inaccurate reference source to compensate for the inaccuracy of the inaccurate reference source.