Abstract: A multimedia system includes a multimedia device control program having a plurality of application program selectable controls for controlling operation of a like plurality of different classes of multimedia devices. Each class has a different set of controllable device functions or attributes. In response to selection of a class by an application program, a unique control panel is created in a user interface for controlling operation of a device. The selected control performs all of the processing actions necessary to control the device in response to user selections on the interface, without involvement of the application program in such actions. The multimedia control program includes a plurality of panel templates from which control panels are created in a control screen. Each panel has a plurality of controllers that can manipulated by a user to control a corresponding function of a multimedia device. The templates provide a consistent interfaces having a common look and feel.

Abstract: Synthetic dental compositions comprise an inorganic filler and a resin formed by polymerization of at least one bis-acrylate of the formula ##STR1## wherein R is selected from the group consisting of alkyl groups having 1 to 6 carbon atoms and aryl substituted alkyl groups in which the alkyl portion has 1 to 6 carbon atoms, or by polymerization of at least one multifunctional oligomer of the formula ##STR2## wherein X is the group ##STR3## with R.sub.1 being H or CH.sub.2 OH, and Y is a hydrocarbon group having about four to about twenty carbon atoms. Diacids or diacid salts of the hydrolyzed bis-acrylates are also useful in methods for bonding a variety of substrates to teeth.

Abstract: An improved testing apparatus and method for testing the kernel of a microprocessor based unit under test (UUT) in which connection to the UUT is made at both the memory connection socket and at the microprocessor with the microprocessor being in place and active in the UUT. The apparatus and method permits substantially full diagnostics of the kernel to be carried out in a systematic and automated manner in which the requirement of manual probing of the UUT is minimized. Connections at the microprocessor permit the development of high resolution sync signals for verification and evaluation of test results. The testing protocol implemented in the method includes the use of testing primitives which permit the development of a signature for each address and data bus line for the identification of the type as well as the location of any faults discovered by the apparatus.

Abstract: A phase modulator for use in a two-oscillator phase noise measurement sys is placed in the line from either the reference oscillator or the device under test. The phase modulator couples a small portion of the input signal to an amplitude modulator and phase shifter to shift the small signal by exactly 90 degrees. The small signal portion is then coupled back into the input signal such that small variations in the coupled signal result in phase modulation and not amplitude modulation which would undermine the calibration of the instrument. The phase modulator described can also be used with known devices of many types to correct the added phase noise of components, e.g., power amplifiers. The phase modulator, when used with a given fixed or variable frequency source, also forms a frequency calibration standard in a single portable instrument.

Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises multiple bistable devices which are clocked up and down respectively by input and references digital signals to generate square waves. The duty ratio corresponds to the phase/frequency difference and sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square waves are combined logically and additively in the output. The output is integrated to obtain an every increasing output over many cycles of the phase/frequency difference until the maximum is reached depending on the number of bistable devices which are used. Added circuitry is used to avoid coincidence problems in the clocking input and reference digital signals, to minimize resultant irregularities, and hold the bistable devices at maximum or minimum, as appropriate, until the direction of phase/frequency difference reverses.

Abstract: Arrangements are provided for generation of dual-tone waveforms utilizing direct digital waveform synthesis techniques and architecture and retaining the advantageous characteristics of direct digital waveform synthesis. Preferred embodiments feature combination of generated waveforms at an analog adder, a digital adder using a single digital-to-analog converter and at a single wave table, respectively, each providing particular hardware economies and operational advantages with respect to other preferred embodiments.

Abstract: Methods and apparatus are set forth for utilizing the restricted token operations on an FDDI network. Two service primitives are defined to facilitate the control of restricted dialog. The first defines what class of token can be captured for the purpose of transmitting asynchronous data. Secondly, a primitive is defined for use at the end of each transmit request to give control over the token type that will be issued at the end of a given transmission. A hardware protocol is defined which provides reliable control over these two parameters, together with methodology for linking frames in a buffer memory during restricted operation. The combination of the hardware protocol and methodology allows restricted dialog to be realized without real-time software interaction.

Abstract: A phase modulator for use in a two-oscillator phase noise measurement system is placed in the line from either the reference oscillator or the device under test. The phase modulator couples a small portion of the input signal to an amplitude modulator and phase shifter to shift the small signal by exactly 90 degrees. The small signal portion is then coupled back into the input signal such that small variations in the coupled signal result in phase modulation and not amplitude modulation which would undermine the calibration of the instrument. The phase modulator described can also be used with known devices of many types to correct the added phase noise of components, e.g., power amplifiers.

Abstract: Fine particles, of predetermined composition and sized to be within a predetermined size range, are deposited on, and thereafter adhere in random distribution to, one of two adjacent surfaces, serving to keep the surfaces uniformly spaced apart except when an external force causes them to make local contact. The particles are conveniently applied in the form of a spray of a suspension of particles and a fluid carrier material, preferably water with alumina particles, or an aqueous solution of a chloride salt of an alkaline earth metal such as calcium, potassium or sodium when small glass beads are used as the particles. Brown alumina particles (approximately 96% Al.sub.2 O.sub.3) in the size range 3-50 microns, so utilized, are found well suited as parallel surface spacers in optically transparent touch sensitive overlay (TSO) panels.

Abstract: A ballast having a converter for converting input power into DC at a high frequency and a commutator for converting the DC to AC at a low frequency to cause light emission from a gas discharge lamp. The converter also contains a transformer for converting the input AC to a low voltage AC for heating the filaments in the lamp. Current and Voltage sensors associated with the commutator provide feedback to control circuitry which allows power conversion after the filaments heat and the voltage to the lamp to increase to the voltage required to start the lamp even when different starting voltage requirement lamps are used. After the lamp starts, the lamp is soley current mode controlled. By frequency modulation of the commutator, both power and crest factor can be controlled.

Abstract: An apparatus, method and data structure for validating the data bus of a microprocessor-based unit under test in which bit patterns having half as many bits as the width of the data bus are applied to the data bus along with another bit pattern which is either the complemented or true replication of the bit pattern. Evaluation of the resulting bit patterns on the data bus permits a validation of the entire width of the data bus which, if no faults are reported, obviates not only probing of the data bus by the operator but data bus diagnosis, as well. A particular data structure of a preferred bit pattern sequence avoids any fault on any data line being reported as a pass.

Abstract: An instrument housing comprises an upper housing portion and a lower housing portion together enclosing instrumentation circuitry. An outer surface of one of the lower housing portion is formed, circumferentially, with a series of gasket locking elements. A gasket injection molded on the series of dovetail-shaped gasket locking elements forms a seal between the upper and lower housing portions. Mechanical locking between the gasket and dovetail-shaped elements retains the gaskeet in place between the housing portions so that the gasket tends not to dislodge from the instrument even if it is dropped.

Abstract: Methods and apparatus are set forth for transferring data to and from a first bus, to which a first set of high performance devices, including at least one central processing unit ("CPU") is attached, and a second bus, to which a second set of relatively lower performance devices is attached. The aforesaid transfer is accomplished in a manner that facilitates communication between the first and second set of devices while insulating the performance of the first set of devices from the comparatively lower performance of the second set of devices. According to the preferred embodiment of the invention, an input/output controller i.e., ("IOC") is disclosed that includes a set of address mapped I/O ports. The I/O ports may be used to transfer data between the high performance channel (hereinafter referred to as the "Local Bus") coupled to the CPU in a reduced instruction set computer (RISC) system and a typically lower performance, peripheral bus (hereinafter referred to as a "Remote Bus").

Abstract: A bipolar analog voltage is converted into a digital signal by sensing the polarity of the voltage and selectively supplying a bias voltage to an analog-to-digital converter, which can preferably be a charge balanced voltage to frequency converter, as a function of the sensed polarity. The voltage to frequency converter has a double valued variable frequency output with a discontinuity at zero volt such that the converter derives a maximum output frequency for a maximum positive voltage and also for a negative value slightly displaced from zero; the voltage to the frequency converter minimum output frequency is derived from positive voltages slightly greater than zero and for maximum negative voltages. The converter output frequency and the sensed polarity are supplied to a frequency to digital converter which derives an output signal having a bit representing the polarity of the analog voltage and additional bits indicative of the magnitude of the analog voltage.