Patents Represented by Attorney Stephen A. Becker
  • Patent number: 4940204
    Abstract: A flexible stand permits an instrument housing or holster to which it is attached to be supported on a horizontal surface at any of a number of different viewing angles, to be hooked to a pipe or conduit, or to be suspended from a nail or the like. The stand comprises a skeletal member that is formed of a pair of annealed cartridge brass wires separated from each other and maintained parallel by a pair of plastic bridge members. The skeletal member is coated with thermoplastic polyester material, to form an assembly that is flexible, is non-brittle and exhibits substantially no mechanical memory so that it retains the shape to which the stand is manually formed by the user. One end of the stand is pivotally attached to the meter housing or holster, and an abutment member on the stand contacts a portion of the housing or holster to prevent further pivoting when the stand is pivoted to a particular angle.
    Type: Grant
    Filed: September 28, 1989
    Date of Patent: July 10, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Michael D. Nelson, Heimen Wong, Roger M. Trana
  • Patent number: 4929935
    Abstract: Apparatus for aligning a raster scanned display uses a microprocessor to control timing for horizontal and vertical synchronizing signals. An additional delay device may be provided to improve alignment resolution. When the aligning apparatus is used with a touch panel, an alignment screen is displayed, including aligning touchkeys. By depressing the touch panel at the displayed touchkeys, a user provides image position information to the microprocessor. The microprocessor corrects image alignment to the touch panel by varying timing interval counts stored in registers of a video controller for front and back porch intervals of horizontal and vertical signals. Where resolution is to be improved, delay parameter settings are provided to the additional delay device. Alternatively, the counts in the registers may be fixed and alignment may be controlled completely by the delay.
    Type: Grant
    Filed: May 2, 1986
    Date of Patent: May 29, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Peter B. Rysavy, Maurice J. Fuller
  • Patent number: 4907341
    Abstract: This invention relates to a proces of manufacturing and adjusting a compound resistor. The compound resistor is formed of a resistive material forming a predominant portion of the resistance and having a small negative temperature coefficient of resistance coupled with an adjustment material having an extremely low resistance and a very high positive temperature coefficient of resistance. After forming the resistive and adjustment portions, a portion of the adjustment material is removed to adjust the composite TCR of the compound resistor substantially to zero without significantly affecting resistance.
    Type: Grant
    Filed: December 31, 1987
    Date of Patent: March 13, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Roy W. Chapel, Jr., David N. Duperon
  • Patent number: 4906311
    Abstract: A cermic substrate supports a thin or thick film electronic circuit hermetically enclosed by a vitreous glass covering sealed to the ceramic substrate by a heat fused vitreous sealing glass. The vitreous sealing glass is screened onto the vitreous glass covering in a composition comprising a binder material and a liquifier. The electronic circuit is trimmed by a laser beam directed through the vitreous glass covering as one of the final process steps after completion of those process steps which tend to affect the resistivity of the resistive element; process steps such as high temperature baking and soldering of component parts.
    Type: Grant
    Filed: March 23, 1988
    Date of Patent: March 6, 1990
    Assignee: John Fluke Co., Inc.
    Inventor: I. Macit Gurol
  • Patent number: 4906996
    Abstract: There is provided according to the invention a method and apparatus for eliminating or minimizing the error due to amplifier offset or drift error in an integrating dual slope analog-to-digital converter. The converter is provided with a switching and control arrangement whereby the integrating capacitor is charged for one-half of the predetermined charging time as a function of the sum of the levels of the unknown signal and the error signal. The integrating capacitor is charged for the remaining half of the predetermined time period as a function of the difference of the levels of the unknown signal and the error signal so that the capacitor reaches a level of charge which is a function of the level of the unknown signal substantially unaffected by the level of the error signal.
    Type: Grant
    Filed: December 2, 1988
    Date of Patent: March 6, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Richard E. George
  • Patent number: 4906993
    Abstract: A digital keypad input device comprises a controller for driving a plurality of I/O signal lines selectively in input, output, and high impedance states. Each line operated in the output state presents an output logic signal that is detected, via a corresponding switch when closed, by another I/O line operated in the input state. Other lines are operated in the high impedance state. The method of the invention enables the number of manual switches to exceed the number of I/O lines.
    Type: Grant
    Filed: April 4, 1988
    Date of Patent: March 6, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Mark S. Freeman, Brian S. McElhinney
  • Patent number: 4893115
    Abstract: A flat panel visual display system having orthogonally disposed display electrodes which are provided by display command signals from a computer to cause activation of portions of the display is provided with additional electrodes. The additional electrodes are orthogonally disposed in a plane parallel to the display electrodes and are interconnected so that an operator touching the additional electrodes will shunt at least a portion of the display command signals to ground or back to the computer. The computer is provided with sensor circuitry for sensing the shunting and providing an indication of the location of the simultaneous occurrence of the display command signals and the operator's touch.
    Type: Grant
    Filed: December 4, 1987
    Date of Patent: January 9, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Randall D. Blanchard
  • Patent number: 4884035
    Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises a logic gate interconnected with a pair of bistable devices clocked respectively by input and reference digital signals to generate a square wave having a duty ratio corresponding to the phase/frequency difference between the two signals. The duty ratio of the square wave sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square wave is integrated to obtain a repetitive sawtooth. To increase the range, circuitry is provided to provide a constant level signal when the peak of a sawtooth is approached and to reset the bistable devices to provide a multiple of the earlier range.
    Type: Grant
    Filed: May 15, 1989
    Date of Patent: November 28, 1989
    Assignee: John Fluke Mfg. Co. Inc.
    Inventors: Steven P. Cok, Robert J. Lewandowski
  • Patent number: 4878231
    Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises multiple bistable devices which are clocked up and down respectively by input and references digital signals to generate square waves. The duty ratio corresponds to the phase/frequency difference and sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square waves are combined logically and additively in the output. The output is integrated to obtain an ever increasing output over many cycles of the phase/frequency difference until the maximum is reached depending on the number of bistable devices which are used. Added circuitry is used to avoid coincidence problems in the clocking input and reference digital signals, to minimize resultant irregularities, and hold the bistable devices at maximum or minimum, as appropriate, until the direction of phase/frequency difference reverses.
    Type: Grant
    Filed: March 1, 1988
    Date of Patent: October 31, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Steven P. Cok
  • Patent number: 4876684
    Abstract: A semiconductor memory such as a read only memory (ROM) is tested and faults are diagnosed and identified by examining data stored therein for patterns that could not exist if the memory is faulty, proving the memory to be functional by counterexample. Diagnosis is carried out using probabilistic algorithms that terminate quickly if the memory is not faulty, with any pathological contents of the memory masked to minimize the likelihood of misdiagnosis. Faults diagnosed in accordance with the invention include stuck or tied data or address lines.
    Type: Grant
    Filed: February 11, 1988
    Date of Patent: October 24, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Kurt Guntheroth
  • Patent number: 4876002
    Abstract: A domestic reverse osmosis water purification system utilizing few parts in the controller valve mechanism enhances reliability and economic feasibility. All surfaces of the controller valve mechanism in contact with water are non-metallic and are constructed of FDA approved materials. In addition to its normal function of metering the reject water flow, the controller valve mechanism allows the homeowner to easily rinse the reverse osmosis membrane and conserves water by automatically stopping influent water flow when the product storage tank is full.
    Type: Grant
    Filed: June 13, 1988
    Date of Patent: October 24, 1989
    Assignee: Schlumberger Industries, Inc.
    Inventors: John D. Marshall, Thomas N. Mclain
  • Patent number: 4873705
    Abstract: A method of and system of high-speed, high-accuracy functional testing of memories in microprocessor-based units or boards under test includes a test system that is effectively permanently coupled to the unit under test bus structure during test execution and operates at the unit under test's clock rate. The test program may be stored in the unit under test's own memory, or may be electrically transferred from the test system's memory to the memory under test using a memory overlay technique.Memory testing speed may be further incresed by taking advantage of block move and compare features of newer microprocessors. An algorithm which exploits the block move and compare features is provided.
    Type: Grant
    Filed: January 27, 1988
    Date of Patent: October 10, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Craig V. Johnson
  • Patent number: 4870327
    Abstract: A ballast for controlling the light emitted by fluorescent lamps (25) is disclosed. DC power derived from either a DC source or a rectified AC source is switched on and off at a high frequency rate by a switch (15) to control the flow of current through the primary winding of the transformer of a flyback converter (27). The switched output is rectified and applied by the flyback converter to the filaments of the fluorescent lamps (25) to be controlled. The rectified, switched output is also applied by a .pi. filter (17) to a commutator circuit (21) that controls the starting of the fluorescent lamps (25). The commutator circuit (21) is switched at a lower frequency rate. The bridge input voltage and current are sensed and fed back to a control circuit (23), which includes a regulating pulse width modulator and a bridge switching circuit. The control circuit (23) also receives a pulse current feedback signal from the switch (15) and an external dimming control signal.
    Type: Grant
    Filed: July 27, 1987
    Date of Patent: September 26, 1989
    Assignee: Avtech Corporation
    Inventor: Jeffrey A. Jorgensen
  • Patent number: 4868822
    Abstract: A method and system for testing and troubleshooting microprocessor-based electronic systems employs memory emulation techniques as well as other techniques to provide complete functionality tests and fault location. Fine-resolution sync pulses may be generated at preselected time positions during a bus cycle of interest to facilitate full troubleshooting fault isolation. Other features include bus testing using memory emulation techniques, using the chip select line of ROMs to encode test results, and techniques that keep a target microprocessor functioning in a system in which the kernel is dead.
    Type: Grant
    Filed: February 19, 1988
    Date of Patent: September 19, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Marshall H. Scott, Robert E. Cuckler, John D. Polstra, Anthony R. Vannelli, W. Douglas Hazelton
  • Patent number: 4864512
    Abstract: A measuring device includes a microprocessor controller programmed for performing any of a plurality of mathematical functions on a measured value of a parameter under test. The measuring device is provided with two displays, for displaying to a user both the parameter value and its mathematical function. Annunciators are provided to identify the displayed function of the parameter. Thus, together with the measured parameter value, offset, scaling, peak-to-peak values, or the uncertainty of a reading may be displayed, as well as statistical functions of the measurement, including an average, standard deviation, median or mode of the parameter under test. The methematical function display is updated concurrently with the display of the measured parameter value.
    Type: Grant
    Filed: August 20, 1986
    Date of Patent: September 5, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Kenneth A. Coulson, Warren H. Wong, Tod K. Johnson
  • Patent number: 4861640
    Abstract: A molded circuit board is formed with a nonconductive molded polymer substrate base having at least one channel in a surface thereof. A sputtered conductive film is disposed in the channel on a virgin polymer surface thereof to establish a circuit line in the channel.
    Type: Grant
    Filed: February 3, 1988
    Date of Patent: August 29, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Ismail M. Gurol
  • Patent number: 4860289
    Abstract: A simplified master controller or outguard circuit monitors and controls a plurality of separate slave, or inguard, circuits. Only a single watchdog circuit is provided on the outguard arrangement, with simplified timers being provided on each inguard arrangement to generate a direct hardware reset signal for local microprocessors in the inguard circuits using existing serial communication lines. A break signal generated by the watchdog in the outguard circuit is detected and, without interpretation, converted to the reset signal for the inguard circuit in synchronism with operation of the outguard circuit.
    Type: Grant
    Filed: October 19, 1987
    Date of Patent: August 22, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Kenneth A. Coulson
  • Patent number: 4859936
    Abstract: Calibrating errors of a variable gain amplifier used in an AC calibrator or a meter for measuring AC is determined for a gamut of frequencies. The gain of the variable gain amplifier is varied by adjusting the value of a variable resistor in discrete steps. A variable amplitude signal is applied to the amplifier while the resistor is adjusted in discrete steps so the amplifier derives a gamut of variable amplitude signals that are supposed to have predetermined values. The amplitudes of the gamut of variable amplitude signals derived by the amplifier are detected and compared with the values that the signals are supposed to have to derive a calibrating error signal of the amplifier for each variable resistor value. A gamut of variable frequency, constant amplitude signals is applied to the amplifier while the amplifier gain is constant. The amplifier has a tendency to derive an AC output signal having a different amplitude in response to different ones of the frequencies.
    Type: Grant
    Filed: May 19, 1987
    Date of Patent: August 22, 1989
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Larry E. Eccleston
  • Patent number: D307264
    Type: Grant
    Filed: May 20, 1986
    Date of Patent: April 17, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Jeffrey C. Brown, Terry G. Morey
  • Patent number: D308645
    Type: Grant
    Filed: February 26, 1987
    Date of Patent: June 19, 1990
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Cheryl A. Hughes, Edmond C. Eng