Patents Represented by Attorney, Agent or Law Firm Stephen A. Gratton
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Patent number: 8324082Abstract: A method for fabricating a conductive substrate for an electronic device includes the steps of providing a semiconductor substrate; forming a plurality of grooves part way through the semiconductor substrate; filling the grooves with a polymer insulating material to form a plurality of polymer filled grooves; thinning the substrate from the back side to expose the polymer filled grooves; and singulating the semiconductor substrate into a plurality of conductive substrates. An optoelectronic device includes a conductive substrate; a polymer filled groove configured to separate the conductive substrate into a first semiconductor substrate and a second semiconductor substrate; a first front side electrode on the first semiconductor substrate and a second front side electrode on the second semiconductor substrate; and a light emitting diode (LED) chip on the first semiconductor substrate in electrical communication with the first front side electrode and with the second front side electrode.Type: GrantFiled: September 15, 2011Date of Patent: December 4, 2012Assignee: SemiLEDS OPTOELECTRONICS Co., Ltd.Inventors: Wen-Huang Liu, Yung-Wei Chen
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Patent number: 8283652Abstract: A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer.Type: GrantFiled: July 28, 2010Date of Patent: October 9, 2012Assignee: SemiLEDs Optoelectronics Co., Ltd.Inventors: Chen-Fu Chu, Feng-Hsu Fan, Hao-Chun Cheng, Trung Tri Doan
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Patent number: 8282907Abstract: Hydrogen generators and processes for operating hydrogen generators using partial oxidation/steam reforming of fuel are provided that can achieve desirable Net Hydrogen Efficiencies over a range of fuels and hydrogen product production rates and purities. Superheated steam for the reformer feed is provided through indirect heat exchange with the reformate and through indirect heat exchange with a flue gas. The relative portions of superheated steam from each heat exchange is adjusted to enhance Net Hydrogen Efficiency as a demand condition such as hydrogen product production rate or purity changes, and cooler oxygen-containing gas is used to avoid precombustion temperatures in the reformer feed.Type: GrantFiled: July 6, 2007Date of Patent: October 9, 2012Assignee: Hyradix, Inc.Inventors: Kishore J. Doshi, Robert J. Sanger
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Patent number: 8258006Abstract: A semiconductor component includes a carrier and multiple semiconductor substrates stacked and interconnected on the carrier. The carrier includes conductive members bonded to corresponding conductive openings on the semiconductor substrates. The component can also include terminal contacts on the carrier in electrical communication with the conductive members, and an outer member for protecting the semiconductor substrates. A method for fabricating the component includes the steps of providing the carrier with the conductive members, and providing the semiconductor substrates with the conductive openings. The method also includes the step of aligning and placing the conductive openings on the conductive members, and then bonding the conductive members to the conductive openings.Type: GrantFiled: November 5, 2008Date of Patent: September 4, 2012Assignee: Micron Technology, Inc.Inventor: Alan G. Wood
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Patent number: 8217510Abstract: A semiconductor module system includes a module substrate and first and second semiconductor components stacked on the module substrate. The stacked semiconductor components include through wire interconnects that form an internal signal transmission system for the module system. Each through wire interconnect includes a via, a wire in the via and first and second contacts on the wire.Type: GrantFiled: October 31, 2011Date of Patent: July 10, 2012Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Alan G. Wood
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Patent number: 8210375Abstract: A pour cap for a fluid container includes a cap body, a gasket mounted to the cap body, and a threaded ring attached to the cap body. The cap can be positioned on the container in a closed position wherein the container is hydraulically sealed with a high pressure seal, or in an open position wherein fluid flow occurs through flow passages on the gasket and the cap body with first and second low pressure seals preventing unwanted leakage between joining parts on the cap.Type: GrantFiled: April 4, 2008Date of Patent: July 3, 2012Assignee: REV 8 Inc.Inventor: Robert A. Heiberger
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Patent number: 8193646Abstract: A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI) includes a via through the substrate contact and the substrate, a wire in the via bonded to the substrate contact, and a contact on the wire. A stacked semiconductor component includes the semiconductor substrate, and a second semiconductor substrate stacked on the substrate and bonded to a through wire interconnect on the substrate. A method for fabricating a semiconductor component with a through wire interconnect includes the steps of providing a semiconductor substrate with a substrate contact, forming a via through the substrate contact and part way through the substrate, placing the wire in the via, bonding the wire to the substrate contact, and then thinning the substrate from a second side to expose a contact on the wire.Type: GrantFiled: June 28, 2010Date of Patent: June 5, 2012Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, David R. Hembree
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Patent number: 8187983Abstract: A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated circuits and circuitry on the circuit side; thinning the substrate from the back side to a selected thickness; laser processing the back side of the thinned substrate to form at least one lasered feature on the back side; and dicing the substrate into a plurality of components having the lasered feature. The lasered feature can cover the entire back side or only selected areas of the back side, and can be configured to change electrical properties, mechanical properties or gettering properties of the substrate. A semiconductor component includes a thinned semiconductor substrate having a back side and a circuit side containing integrated circuits and associated circuitry. The semiconductor component also includes at least one lasered feature on the back side configured to provide selected electrical or physical characteristics for the substrate.Type: GrantFiled: April 16, 2009Date of Patent: May 29, 2012Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, Tim Corbett
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Patent number: 8174105Abstract: A stacked semiconductor package includes a substrate and a plurality of semiconductor dice stacked on the substrate. Each semiconductor die includes a recess, and a discrete component contained in the recess encapsulated in a die attach polymer. The stacked semiconductor package also includes interconnects electrically connecting the semiconductor dice and discrete components, and an encapsulant encapsulating the dice and the interconnects.Type: GrantFiled: May 18, 2011Date of Patent: May 8, 2012Assignee: Micron Technology, Inc.Inventors: Chua Swee Kwang, Chia Yong Poo
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Patent number: 8120167Abstract: A method for fabricating a semiconductor component with an encapsulated through wire interconnect includes the steps of providing a substrate having a first side, a second side and a substrate contact; forming a via in the substrate contact and the substrate to the second side; placing a wire in the via; forming a first contact on the wire proximate to the first side and a second contact on the wire proximate to the second side; and forming a polymer layer on the first side leaving the first contact exposed. The polymer layer can be formed using a film assisted molding process including the steps of: forming a mold film on tip portions of the bonding members, molding the polymer layer, and then removing the mold film to expose the tip portions of the bonding members. The through wire interconnect provides a multi level interconnect having contacts on opposing sides of the semiconductor substrate.Type: GrantFiled: October 14, 2010Date of Patent: February 21, 2012Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Alan G. Wood
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Patent number: 8092778Abstract: A method for producing a hydrogen enriched fuel and carbon nanotubes includes the steps of providing a flow of methane gas, and providing a catalyst mixture comprising a Fe based catalyst and carbon. The method also includes the steps of pretreating the catalyst mixture using microwave irradiation and exposure to CH4, heating the catalyst mixture and the methane gas using microwave irradiation at a selected microwave power, directing the flow of methane gas over the catalyst mixture, and controlling the microwave power to produce a product gas having a selected composition and the carbon nanotubes. For producing multi walled carbon nanotubes (MWNTs) only a flow of methane gas into the reactor is required. For producing single walled carbon nanotubes (SWNTs), a combination of hydrogen gas and methane gas into the reactor is required.Type: GrantFiled: March 1, 2008Date of Patent: January 10, 2012Assignee: Eden Energy Ltd.Inventors: Zhonghua John Zhu, Jiuling Chen, Gaoqing Max Lu, Gregory Solomon
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Patent number: 8084780Abstract: A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC) on the substrate, and at least one light emitting diode (LED) on the substrate in electrical communication with the application specific integrated circuit (ASIC). The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated system having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.Type: GrantFiled: August 13, 2009Date of Patent: December 27, 2011Assignee: Semileds Optoelectronics Co.Inventors: Trung Tri Doan, Tien Wei Tan, Wen-Huang Liu, Chen-Fu Chu, Yung Wei Chen
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Patent number: 8075869Abstract: A method for producing a hydrogen enriched fuel includes the steps of providing a flow of methane gas, and providing a catalyst. The method also includes the steps of heating the catalyst instead of the reactor walls and the methane gas using microwave irradiation at a selected microwave power, directing the flow of methane gas over the catalyst, and controlling the microwave power to produce a product gas having a selected composition. A system for producing a hydrogen enriched fuel includes a methane gas source, a reactor containing a catalyst, and a microwave power source configured to heat the catalyst.Type: GrantFiled: January 24, 2007Date of Patent: December 13, 2011Assignee: Eden Energy Ltd.Inventors: Zhonghua John Zhu, Jiuling Chen, Gaoqing Max Lu, Gregory Solomon
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Patent number: 8053909Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact.Type: GrantFiled: January 17, 2011Date of Patent: November 8, 2011Assignee: Micron Technology, Inc.Inventor: David R. Hembree
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Patent number: 8021448Abstract: A method for producing a hydrogen enriched fuel includes the steps of providing a flow of methane gas at a selected flow rate, providing a catalyst, producing a methane plasma at a negative pressure using microwave irradiation at a selected microwave power, directing the methane plasma over the catalyst, and controlling the flow of methane gas and the microwave power to produce a product gas having a selected composition. A system for producing a hydrogen enriched fuel includes a methane gas source, a reactor having a reaction chamber containing a catalyst, a microwave power source configured to form a methane plasma, and a vacuum pump configured to maintain the reaction chamber at a negative pressure.Type: GrantFiled: January 25, 2007Date of Patent: September 20, 2011Assignee: Eden Energy Ltd.Inventors: Zhonghua John Zhu, Jiuling Chen, Gaoqing Max Lu, Gregory Solomon
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Patent number: 7998860Abstract: A method for fabricating semiconductor components includes the steps of: providing a semiconductor substrate having a circuit side, a back side and conductive vias; removing portions of the substrate from the back side to expose terminal portions of the conductive vias; depositing a polymer layer on the back side encapsulating the terminal portions; and then planarizing the polymer layer and ends of the terminal portions to form self aligned conductors embedded in the polymer layer. Additional back side elements, such as terminal contacts and back side redistribution conductors, can also be formed in electrical contact with the conductive vias. A semiconductor component includes the semiconductor substrate, the conductive vias, and the back side conductors embedded in the polymer layer. A stacked semiconductor component includes a plurality of components having aligned conductive vias in electrical communication with one another.Type: GrantFiled: March 12, 2009Date of Patent: August 16, 2011Assignee: Micron Technology, Inc.Inventors: Jin Li, Tongbi Jiang
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Patent number: 7964946Abstract: A semiconductor package includes a substrate having contacts, and a discrete component on the substrate in electrical communication with the contacts. The package also includes a semiconductor die on the substrate in electrical communication with the contacts, and a die attach polymer attaching the die to the substrate. The die includes a recess, and the discrete component is contained in the recess encapsulated in the die attach polymer. A method for fabricating the package includes the steps of: attaching the discrete component to the substrate, placing the die attach polymer on the discrete component and the substrate, pressing the die into the die attach polymer to encapsulate the discrete component in the recess and attach the die to the substrate, and then placing the die in electrical communication with the discrete component. An electronic system includes the semiconductor package mounted to a system substrate.Type: GrantFiled: August 26, 2010Date of Patent: June 21, 2011Assignee: Micron Technology, Inc.Inventors: Chua Swee Kwang, Chia Yong Poo
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Patent number: 7951702Abstract: A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a circuit side, a backside, and a substrate contact on the circuit side. The method also includes the steps of forming a substrate opening from the backside to the substrate contact, and then bonding the conductive interconnect to an inner surface of the substrate contact.Type: GrantFiled: February 10, 2010Date of Patent: May 31, 2011Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, William M. Hiatt, David R. Hembree
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Patent number: 7952170Abstract: A system includes a supporting substrate and at least one semiconductor substrate. The semiconductor component includes a semiconductor substrate having a circuit side with integrated circuits and substrate contacts and a back side, a plurality of through interconnects in the substrate, and redistribution conductors on the back side of the substrate. Each through interconnect includes a via aligned with a substrate contact, and a conductive layer at least partially lining the via in physical and electrical contact with the substrate contact. Each redistribution conductor is formed by a portion of the conductive layer.Type: GrantFiled: July 16, 2010Date of Patent: May 31, 2011Assignee: Micron Technology, Inc.Inventor: David S. Pratt
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Patent number: RE43597Abstract: An adapter for a “LUER LOK” receptacle includes a housing having an internal recess configured to engage a hub of the receptacle. The adapter also includes a fitting attached to the housing, and to a medical instrument such as a cannula or a needle. The fitting includes a tapered recess configured to engage a tapered post of the receptacle. The fitting also includes a male end portion configured to engage female threads on the hub of the receptacle. The male end portion can include threads or alternately a flange. The adapter strengthens and rigidifies the receptacle, and allows the medical instrument to be aggressively manipulated, with less chance of damage to the receptacle and fluid leakage therefrom. In an alternate embodiment adapter, the tapered post of the receptacle is removed to provide an enlarged opening for the receptacle. The enlarged opening permits fluids, tissue and cells to be transferred with less damage and less resistance.Type: GrantFiled: March 6, 2008Date of Patent: August 21, 2012Assignee: Mary Lucille Pilkington TrustInventors: Johnnie M. Johnson, Marc Pilkington