Abstract: An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect.

Abstract: A hydrogen-fueled internal combustion engine utilizes either internal or external exhaust gas recirculation (EGR), while providing an overall stoichiometric fuel/air ratio. An EGR system provides recirculated exhaust gas to the engine, and an engine controller regulates fuel flow to control torque and achieve a stoichiometric fuel/air ratio. A three-way catalyst can be applied to the exhaust gas to produce near-zero emissions. In addition, turbocharging or mechanical supercharging can also be used to increase power.

Abstract: A pass through test system for testing an electronic module includes an interface board, and test contactors movably mounted to the interface board for electrically engaging terminal contacts on the module with a zero insertion force on the modules. The interface board is configured for mounting to an automated or manual pass through test handler in electrical communication with test circuitry. In a first embodiment the interface board includes test pads in electrical communication with the test circuitry, and rotatable test contactors having spring contacts configured to simultaneously engage the test pads and the terminal contacts on the module. In a second embodiment the interface board includes test pads in electrical communication with the test circuitry, and slidable test contactors having beam leads configured to simultaneously engage the test pads and the terminal contacts on the module.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: A semiconductor component includes a stiffener, a circuit decal attached to the stiffener, and a semiconductor die attached to the stiffener. The circuit decal includes conductors which function as an internal signal transmission system for the component, and a mask layer which functions as a solder mask and an outer insulating layer for the component. An adhesive layer in physical contact with the conductors attaches the circuit decal to the stiffener, and electrically insulates the conductors from the stiffener. The component also includes an area array of terminal contacts on the conductors electrically isolated by the mask layer. A method for fabricating the component includes the steps of attaching the circuit decal to the stiffener, attaching the die to the stiffener, interconnecting the die and the circuit decal, encapsulating the die, and forming the terminal contacts.

Abstract: A contact system for electrically engaging semiconductor components includes an interface board mountable to an automated test handler, and a floating substrate on the interface board. The interface board includes interface contacts in electrical communication with external test circuitry. The substrate includes flexible segments, and contactors having contact pads on opposing sides of the flexible segments configured to simultaneously electrically engage terminal contacts on the components, and the interface contacts on the interface board. The contact pads include conductive polymer layers that provide an increased compliancy for the contactors. This increased compliancy allows the contactors to accommodate variations in the dimensions and planarity of the terminal contacts on the component. In addition, the substrate includes grooves between the contactors which provide electrical isolation and allow the contactors to move independently of one another.

Abstract: A semiconductor component includes a leadframe, a die, upper and lower body segments encapsulating the die, and dummy segments on the leadframe. The dummy segments are configured to vent trapped air in a molding compound during molding of the body segments, such that corners of the body segments do not include the trapped air.

Abstract: A test system for testing semiconductor components includes an interconnect having a substrate and contacts on the substrate for electrically engaging terminal contacts on the components. The interconnect also includes one or more cavities in the substrate which form flexible segments proximate to the interconnect contacts. The flexible segments permit the interconnect contacts to move independently in the z-direction to accommodate variations in the height and planarity of the terminal contacts. In addition, the cavities can be pressurized, or alternately filled with a polymer material, to adjust a compliancy of the flexible segments. Different embodiments of the interconnect contacts include: metallized recesses for retaining the terminal contacts, metallized projections for penetrating the terminal contacts, metallized recesses with penetrating projections, and leads contained on a polymer tape and cantilevered over metallized recesses.

Abstract: A semiconductor component includes adjustment circuitry configured to adjust selected physical and electrical characteristics of the component or elements thereof, and an input/output configuration of the component. The component includes a semiconductor die, a substrate attached to the die, and terminal contacts on the substrate. The adjustment circuitry includes conductors and programmable links, such as fuses or anti-fuses, in electrical communication with the die and the terminal contacts. The adjustment circuit can also include capacitors and inductance conductors. The programmable links can be placed in a selected state (e.g., short or open) using a laser or programming signals. A method for fabricating the component includes the steps of forming the adjustment circuitry, and then placing the programmable links in the selected state to achieve the selected adjustment.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: A test carrier for a semiconductor component includes a base for retaining the component, and an interconnect on the base having contacts configured to electrically engage component contacts on the component. The base includes conductors in electrical communication with the contacts on the interconnect, which are defined by grooves in a conductive layer. In addition, the conductors include first portions of the conductive layer configured for electrical transmission, which are separated from one another by second portions of the conductive layer configured for no electrical transmission. The test carrier is configured for mounting to a burn in board in electrical communication with a test circuitry configured to apply test signals through the contacts on the interconnect to the component.

Abstract: A method for fabricating a semiconductor component includes the steps of providing a semiconductor die, forming a plurality of redistribution contacts on the die, forming a plurality of interconnect contacts on the redistribution contacts, and forming an insulating layer on the interconnect contacts while leaving the tip portions exposed. The method also includes the step of forming terminal contacts on the interconnect contacts, or alternately forming conductors in electrical communication with the interconnect contacts and then forming terminal contacts in electrical communication with the conductors.

Abstract: A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing outer layer. The external contacts are smaller and more uniform than conventional solder balls, and can be fabricated using low temperature deposition processes, such that package warpage is decreased. Further, the external contacts can be shaped by etching to have generally planar tip portions that facilitate bonding to electrodes of a supporting substrate. Die contacts on the substrate can also be formed as multi layered metal bumps having generally planar tip portions, such that the die can be flip chip mounted to the substrate.

Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A semiconductor component includes a substrate and multiple stacked, encapsulated semiconductor dice on the substrate. A first die is back bonded to the substrate and encapsulated in a first encapsulant, and a second die is back bonded to the first encapsulant. The first encapsulant has a planar surface for attaching the second die, and can also include locking features for the second die. The component also includes a second encapsulant encapsulating the second die and forming a protective body for the component. A method for fabricating the component includes the steps of attaching the first die to the substrate, forming the first encapsulant on the first die, attaching the second die to the first encapsulant, and forming the second encapsulant on the second die.

Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: A semiconductor package includes a substrate, and a semiconductor die flip chip mounted to the substrate. The package also includes substrate circuitry on a circuit side of the substrate, die circuitry on a back side of the die, terminal contacts on the die circuitry, bonded connections between the substrate circuitry and the die circuitry, and an encapsulant on the bonded connections and edges of the die. The die can include an image sensor on the circuit side configured to receive electromagnetic radiation transmitted through the substrate. A method for fabricating the package includes the step of providing a wafer with multiple dice, forming the die circuitry on the dice, and simulating the wafer into individual dice.

Abstract: A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing outer layer. The external contacts are smaller and more uniform than conventional solder balls, and can be fabricated using low temperature deposition processes, such that package warpage is decreased. Further, the external contacts can be shaped by etching to have generally planar tip portions that facilitate bonding to electrodes of a supporting substrate. Die contacts on the substrate can also be formed as multi layered metal bumps having generally planar tip portions, such that the die can be flip chip mounted to the substrate.

Abstract: A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing outer layer. The external contacts are smaller and more uniform than conventional solder balls, and can be fabricated using low temperature deposition processes, such that package warpage is decreased. Further, the external contacts can be shaped by etching to have generally planar tip portions that facilitate bonding to electrodes of a supporting substrate. Die contacts on the substrate can also be formed as multi layered metal bumps having generally planar tip portions, such that the die can be flip chip mounted to the substrate.