Abstract: A low cost antenna in a base station suitable for deployment where high density of wireless users are present in specific directions (e.g., cross roads in urban areas). A lens is used associated with antenna elements to collimate the beam for a longer distance in the desired directions. By using the lens, the need for complex electronics is minimized, thereby reducing the cost of a base station. Another aspect of the present invention enables the lens to be designed precisely by first determining the radiation pattern of each array element according to a corresponding coordinate system, transforming the radiation pattern to a common coordinate system, and determining a composite radiation pattern using the value determined for the common coordinate system. Inverse scattering technique is applied using the composite radiation pattern and the desired collimation pattern to determine the precise shape of the lens.
Abstract: Methods are presented for phase estimation and compensation in Orthogonal Frequency Division Multiplex systems. The methods include the step of extracting training tones from a received digitized data burst. Some of the methods further include the steps of determining a channel impulse response based on the extracted tones; estimating phase shift caused by common phase noise; correcting the impulse response and performing a Fast Fourier transform to provide a channel estimate. Some of the methods include estimating the phase shift caused by common phase noise before an average impulse response is updated with the current impulse impulse. Some of the methods include frequency shifting the spectrum of the channel impulse response and providing partial estimates.
Type:
Grant
Filed:
June 14, 2002
Date of Patent:
February 20, 2007
Assignee:
Texas Instruments Incorporated
Inventors:
Henry Stephen Eilts, Srinath Hosur, David Patrick Magee
Abstract: A method of decoding in layers data received in a communication system, comprising receiving a codeword containing a plurality of elements and translating the plurality of elements into probability values by dividing the rows of at least one column of a parity check matrix associated with the codeword into groups and processing at least some of the groups separately.
Abstract: A system and method to measure the clock skew between transmitting and receiving devices operating with independent clock sources over a packet network is described. To provide adaptive playout in an IP telephony device without a sequencing scheme in the packets, the clock skew is measured and recorded. Using a PCM resampler that is implemented with an interpolation filter bank of FIR subfilters, the change in depth of the playout buffer during transmission is analyzed, and this change infers the clock rate associated with the transmission.
Abstract: A low density parity check (LDPC) code that is particularly well adapted for hardware implementation of a belief propagation decoder circuit is disclose& The LDPC code is arranged as a macro matrix (H) whose rows and columns represent block columns and block rows of a corresponding parity check matrix (Hpc). Each non-zero entry corresponds to a permutation matrix, such as a cyclically shifted identity matrix, with the shift corresponding to the position of the permutation matrix entry in the macro matrix. The block columns of the macro matrix are grouped, so that only one column in the macro matrix group contributes to the parity check sum in any given row. The decoder circuitry includes a parity check value estimate memory which may be arranged in banks that can be logically connected in various data widths and depths. A parallel adder generates extrinsic estimates that are applied to parity check update circuitry for generating new parity check value estimates.
Abstract: Ensuring sufficient bias current is provided to a portion of a circuit containing low voltage transistors operating with a high supply voltage. Such a sufficient bias current may be ensured by generating a primary bias current from a low supply voltage and a backup bias current from a high supply voltage, and providing the backup bias current as the bias current if the primary bias current is not present. The primary bias current may be provided as the bias current when the low supply voltage is available. Thus, the backup bias current is provided as bias current in case of undesirable supply sequencing.
Type:
Grant
Filed:
September 24, 2004
Date of Patent:
February 13, 2007
Assignee:
Texas Instruments Incorporated
Inventors:
Bhupendra Sharma, Sudheer Prasad, Sandeep K. Oswal
Abstract: A receiver, implemented with low noise and low distortion, to process an input signal containing signals of interest and unwanted interference signal. In an embodiment, the receiver contains a mixer which generates an intermediate signal in the form of an electric current, and a filter which filters the unwanted interference signals from the intermediate signal. The intermediate signal is centered around a lower frequency compared to a carrier frequency of the input signal. Due to the current mode interface between the mixer and the filter circuit, low noise and low distortion may be attained.
Abstract: A system to enable TTY communication between a legacy TTY phone and an IP phone over a packet network using a TTY relay protocol established between the IP phone and a media gateway at a central office of the PSTN. The system may also use a voice over Internet Protocol gateway to connect a personal computer to the packet network instead of an IP phone to accomplish TTY communication between software on the computer and a legacy TTY phone.
Type:
Grant
Filed:
February 3, 2005
Date of Patent:
February 13, 2007
Assignee:
Texas Instruments Incorporated
Inventors:
Satish Kumar M. Mundra, David A. Lide, Edward N. George
Abstract: A method of communicating speech across a communication link using very low digital data bandwidth is disclosed, having the steps of: translating speech into text at a source terminal; communicating the text across the communication link to a destination terminal; and translating the text into reproduced speech at the destination terminal. In a preferred embodiment, a speech profile corresponding to the speaker is used to reproduce the speech at the destination terminal so that the reproduced speech more closely approximates the original speech of the speaker. A default voice profile is used to recreate speech when a user profile is unavailable. User specific profiles can be created during training prior to communication or can be created during communication from actual speech. The user profiles can be updated to improve accuracy of recognition and to enhance reproduction of speech. The updated user profiles are transmitted to the destination terminals as needed.
Type:
Grant
Filed:
December 21, 2001
Date of Patent:
February 13, 2007
Assignee:
Texas Instruments Incorporated
Inventors:
Kieth Krasnanski, Doug Wescott, William Taboada
Abstract: An ADSL transceiver hybrid circuit uses one or more isolated couplers (optical couplers, capacitors, or the like) configured to minimize the transmit signal component in the receive signal path by providing an isolated transmit signal feedback, thereby providing echo cancellation, isolating the telephone loop from the analog front end, and eliminating the need for a complex high-pass filter. The ADSL transceiver provides isolation and echo cancellation by: (a) generating a signal within the analog loop (e.g., telephone loop, or “local loop”) corresponding to a differential transmit signal; (b) receiving a composite signal from the analog loop corresponding to the sum of the transmit signal generated on the analog loop and the receive signal; (c) producing an isolated transmit signal (e.g.
Abstract: A system for synchronizing sender sliding windows and receiver sliding windows employed in wireless packet communication is provided. The sender sliding window buffers outgoing packets to be sent to a receiver that employs a receiver sliding window to buffer incoming packets. A sender window manager manages the sender sliding window through positive acknowledgement, negative acknowledgement and/or timeout processing to facilitate synchronizing the sender sliding window with the receiver sliding window without employing synchronization messages or master/slave control. Similarly, a receiver window manager manages the receiver sliding window through sequence number analysis to facilitate synchronizing the receiver sliding window with the sender sliding window without employing synchronization messages or master/slave control.
Type:
Grant
Filed:
December 31, 2001
Date of Patent:
January 9, 2007
Assignee:
Texas Instruments Incorporated
Inventors:
Xiaolin Lu, Ping Tao, Michael O. Polley
Abstract: A power management system (12) in an electronic device (10). The system comprises circuitry (14x), responsive to at least one system parameter, for providing data processing functionality, where the circuitry for providing data processing functionality comprises a data path (CPx). The system alternatively or cumulatively also comprises circuitry (22x) for indicating a potential capability of operational speed of the data path and/or circuitry (24x) for indicating an amount of current leakage of the circuitry for providing data processing functionality. The system also comprises circuitry (26) for adjusting the at least one system parameter in response to either or both of the circuitry for indicating a potential capability and the circuitry for indicating an amount of current leakage.
Type:
Grant
Filed:
December 18, 2003
Date of Patent:
January 9, 2007
Assignee:
Texas Instruments Incorporated
Inventors:
Sami Issa, Uming Ko, Baher Haroun, David Scott
Abstract: System and method for correcting an inaccurate clock with the use of an accurate reference clock. A preferred embodiment comprises repeatedly counting clock cycles in a clock signal generated by the inaccurate clock for a specified period of time, after the completion of each specified period of time, computing a delta value based on the clock cycle counts of the clock signal of the inaccurate clock, accumulating a delta sum value, and computing a clock adjustment value for the inaccurate clock based upon the delta sum value. The reference clock is used to mark the end of each specified period of time.
Abstract: A full-duplex transceiver using a method immunizing itself against self-jamming. The transceiver includes a receiver and a transmitter. The receiver includes a frequency immunization converter and a high pass IF filter. The transmitter transmits a TX signal. The receiver receives an RX signal and simultaneously receives a portion of the power of the TX signal as an undesired TX jamming signal. The frequency immunization converter uses the center frequency of the TX signal for downconverting the RX signal to an IF signal and simultaneously downconverting the TX jamming signal to near zero frequency. The high pass IF filter passes the IF signal and blocks the signal at near zero frequency. As a consequence of the downconversion using the TX frequency, a second LO frequency is controlled for avoiding image frequencies.
Abstract: A method is provided to automatically identify noise events in a channel of a communication system comprising the steps of: receiving an input signal from the channel; determining the mean energy of the input signal; determining the recent energy of the input signal; identifying a beginning of the noise event when the recent energy is greater than the product of the mean energy and a predefined first threshold; identifying an end of a noise event when the recent energy is less that the product of the mean energy and a predefined second threshold; and providing for output the beginning of the noise event and the end of the noise event. Other systems and methods are disclosed.
Type:
Grant
Filed:
October 18, 2002
Date of Patent:
December 19, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Itay Lusky, Daniel Wajcer, Yosef Bendel, Yigal Bitran, Naftali Sommer, Ofir Shalvi, Zvi Reznic, Ariel Yagil, Eli Haim
Abstract: A distributed conferencing system having a plurality of conferencing nodes to connect groups of participants to a conference. Each of the conferencing nodes provides for the connection of one or more participants to the conference. Each node includes a DSP for distributed signal processing. The node DSP includes: A signal measuring device for measuring features of the signals from each of the participants, such as power, zero crossing rate and short term energy and voice activity determination and feature extraction from the signals of the participants connected to each node. Each node has a single core speaker tracking algorithm for determining the relative features of each of the number of participant input signals. The speaker tracking compares the characteristics of the speakers of the core and determines which speakers are to be included and which speakers are to be excluded from presentation to the other nodes in the conference.
Abstract: A method of communicating a data bit between memory devices is disclosed, having the steps of: indicating a first value of the data bit by transitioning, between state values, a first signal applied to a first communication line interconnecting the devices; and indicating a second value of the data bit by transitioning, between the state values, a second signal applied to a second communication line interconnecting the devices. Only one of the first and second signals may transition between the state values at any one time.
Abstract: A low density parity check (LDPC) code that is particularly well adapted for hardware implementation of a belief propagation decoder circuit (38) is disclosed. The LDPC code is arranged as a parity check matrix (H) whose rows and columns represent check sums and input nodes, respectively. The parity check matrix is grouped into subsets of check sum rows, in which the column weight is a maximum of one. The decoder circuitry includes a parity check value estimate memory (52). Adders (54) generate extrinsic estimates, from immediately updated input node probability estimates, and the extrinsic estimates are applied to parity check update circuitry (56) for generating new parity check sum value estimates. These parity check sum value estimates are stored back into the memory (52), and after addition with the extrinsic estimates, are stored in a column sum memory (66) of a corresponding bit update circuit (60) as updated probability values for the input nodes.
Abstract: Method and apparatus for OFDM synchronization and channel estimation. In a temporal embodiment, received embedded system pilot symbols are inverse Fourier transformed at expected index locations and correlated with computed complex conjugates of inverse Fourier transforms of pilot symbols for providing a correlation function for the channel impulse response. In a frequency domain embodiment, embedded system pilot symbols are augmented with pilot-spaced inferred guard band symbols, multiplied by scaled complex conjugates of computed pilot systems, and inverse Fourier transformed into the channel impulse response. Time and frequency are synchronized in feedback loops from information in the channel impulse response. The channel impulse response is filtered, interpolated, and then Fourier transformed for determining channel estimates for equalization.
Type:
Grant
Filed:
October 11, 2001
Date of Patent:
November 21, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Manoneet Singh, Arvind Lonkar, Jerry Krinock
Abstract: In a cable television (CATV) data communication network, channel throughput and communications robustness are increased in a manner that improves speed of data transmission while maintaining compatibility with existing specifications and equipment. Enhanced throughput can be realized using the return channel of the CATV network. Alternatively, data retransmission and/or diversity techniques can be used to improve throughput.