Abstract: Detecting a boundary between training sequences in a transmission is an important operation. In many communications systems, there are no special boundaries or markers to denote the end of one sequence and the beginning of another. Correlation has been a commonly used technique to detect sequences and a fall in the correlation can be used to indicate such boundaries, but classical correlation can be slow and a significant portion of the new sequence is received prior to the boundary being detected. A method and apparatus is presented that allows rapid detection of the boundary and only a small amount of the new sequence needs to be received prior to the detection of the boundary. Additionally, the method and apparatus can be used to detect the presence of a transmission on the communications medium.

Abstract: A method for implementing a plurality of backoff counters on a hardware backoff counter for use in implementing a prioritized message transmission network is presented. A message with a smallest backoff time is selected and placed into the hardware backoff counter. When the hardware backoff counter expires, the message is transmitted. Whenever the communications medium becomes busy, the backoff time for every message is updated.

Abstract: A spatial diversity receiver and method for determining a multichannel combined symbol timing marker that identifies an energy concentration for a combination of channel delay spreads in order to reduce the complexity of equalization. The receiver includes two or more receiver chains having spatially diverse antennas; a multichannel combined timer; and a multichannel combined equalizer for receiving wireless signals through two or more signal channels. The multichannel combined timer combines energies corresponding to the channel impulse response coefficients for all the channels for determining a series of multichannel combined metrics having associated index cursors, and then determines the multichannel combined symbol timing marker from the index cursor for the largest of the metrics. The symbol timing marker synchronizes the received symbols issued to the equalizer jointly to the energy concentration for the delay spreads combined for all the channels.

Abstract: A DMT modem (40) is disclosed, in which a combined time domain equalizer and per-tone equalizer is applied to a received DMT signal. The combined equalizer includes a first FFT function (44) that is applied to a set of samples in a time-domain signal after the application of a time domain equalizer (42). The first FFT function (44) produces an initial FFT result, that is accumulated with a sliding FFT (46) performed upon difference values in the time domain samples. The sliding FFT results are applied to a per-ton equalizer (48) which applies a set of complex coefficients determined in training of the modem. A simple 1-tap FEQ (50) then can recover the signal. The combined equalizer enables per-tone equalization, in a manner that is compatible with conventional DSL training standards. According to a second embodiment, the per-tone equalization is performed only on selected tones of the multitone signal.

Abstract: An analog-to-digital (A/D) converter system is provided that compensates for operating variations associated with one or more passive components of the A/D converter. In one aspect of the present invention, the A/D converter system comprises a sigma delta modulator having at least one passive component and a feedback path that includes at least one switched digital-to-analog converter (DAC), and a tracking reference generator that provides compensated reference signals to the at least one switched DAC for providing feedback to the sigma delta modulator. The compensated reference signals include inverse variations that cancel operating variations associated with the at least one passive component.

Abstract: A multi-line ADSL modem (12) and network (10) whereby the multi-line ADSL modem (12) has connections to several ADSL modems (14) at a central office (CO) (16) through a master loop (18), shared loops (20, 22), and/or broadcast loops (84). The master loop (18) provides the basic connection between the multi-line ADSL modem (12) and the CO modem (14) at the central office (16) while maintaining regular telephone service. The shared loops allow the multi-line ADSL modem to share the transmission capacity with other modems. The multi-line ADSL modem is able to receive broadcast data from the central office where several loops are configured as a broadcast loop for downstream transmission only, but which can also be configured for upstream communication transmission only or in combination with downstream transmission to provide bi-directional broadband communications.

Abstract: A line driver apparatus includes a peak detector operable to receive a data signal and output a first logic signal when the data signal is below a threshold value and output one of a plurality of alternate logic signals when the data signal exceeds the threshold value. The peak detector includes a signal magnitude calculator operable to calculate an amount by which the data signal exceeds the threshold value. The line driver apparatus also includes an amplifier operable to receive a filtered analog data signal and one of a time-delayed first logic signal and one of a time-delayed alternate logic signal, wherein the amplifier operates at a first voltage level upon receiving the time-delayed first logic signal, and the amplifier operates at a voltage level that is increasing toward one of an alternate voltage level upon receiving the time-delayed second logic signal.

Abstract: A computer programmed to specify a design of a circuit for indicating a potential speed capability of a data path in a predetermined circuit. The data path comprises a plurality of logic functions to be performed by a first number of logic gates. The computer specifies the design by steps. In one step, the program specifies a second number of logic gates to be included in the circuit for indicating a potential speed capability. The second number of logic gates is less than the first number of logic gates and provides voltage and delay characteristics comparable to the data path. The computer also specifies additional circuitry to be included in the circuit for indicating a potential speed capability, wherein the additional circuitry is for representing parasitic characteristics in the data path.

Abstract: A technique is described to change the codec or MAC (message authentication code) size in a packet security unit for PacketCable communications during realtime voice transmissions is described. An algorithm that provides fast RC4 key advancing to prevent MIPS (millions of instruction cycles per second) overflow is used to perform codec or MAC size changes. The invention is performed without changing the keying material, where the sender and receiver must continue the RC4 encryption process from its state prior to the codec or MAC size change. A sender needs to preserve continuity of the timestamp across a codec change, since the timestamp reflects realtime. Changing the codec or MAC size is likely to change the frame parameters. To preserve continuity of the RC4 state and the timestamp across the codec/MAC size change, the sender TX and receiver RX generates a new frame number. The new frame number is applied to the first frame generated by the new codec or MAC size.

Abstract: A method of discriminating voice, data, and facsimile calls communicated through a voice-over-packet network. The gateway is provided with software which can identify the existence of an answer signal (ANS) or a modified answer signal (ANSam) communicated between an answering modem and an originating modem over a packet network during a voice state call. The originating gateway can generate an ANS tone according to the protocols of the originating modem, using an originating-side gateway, when the existence of the ANS signal is identified by the receiving-side gateway. The originating gateway also generates an ANSam tone according to the protocols of the originating modem, using the originating-side gateway, when the existence of the ANSam signal is identified by the receiving-side gateway.

Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.

Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.

Abstract: The present invention provides automatic gain control (AGC) for a wide variety of conditions encountered in DSL scenarios. In particular, the proposed AGC approach addresses the problem of analog front end saturation in which a plurality of gain stages (i.e., programmable gain amplifiers) and filter stages are interleaved with inaccessible intermediate points. The gain settings of each of the PGAs is increased (614) until the received signal exceeds a given threshold (620) or until the maximum setting for that PGA has been reached (624). If the current PGA setting has been maximized, the next PGA is considered (628) and the process is repeated until no additional gain is needed or until the available PGAs are exhausted. This process is iterated (630) with different maximum PGA settings for each iteration to enable a more uniform gain distribution.

Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.

Abstract: A system and method for determining an optimal antenna position of a directional antenna in a wireless communication system are described. The optimal antenna position is determined by calculating a steering metric value for possible antenna positions and the antenna position with the highest steering metric value is selected as the optimal antenna position.

Abstract: A resynchronization method for use in a data communication system having a first device configured to transmit data at a symbol rate to a second device. The second device includes a Reed Solomon (RS) decoder having a RS lock indicator and a Moving Picture Experts Group (MPEG) Protocol Interface (MPI) having a MPI lock indicator, wherein the RS and the MPI lock indicators are monitored. Four different states, defined by the values of the RS and MPI lock indicators, determine whether the data communication system will wait for the RS decoder and the MPI hardware block to resynchronize, whether an intermediate-subset of the channel acquisition algorithm is performed or whether the entire channel acquisition algorithm is performed. The method for resynchronization described herein recovers synchronization within a predetermined time without the layers above the physical link layer having knowledge.

Abstract: A system and method enhance observability of IC failures during burn-in tests. Scan automatic test pattern generation and memory built-in self-test patterns are monitored during the burn-in tests to provide a mechanism for observing selective scan chain outputs and memory BIST status outputs.

Abstract: The present application describes a method of implementing a Viterbi algorithm (VA) for trellis coded modulation (TCM) decoding in communication equipment. According to an embodiment, a branch metric is calculated by adding the absolute value of the real and imaginary parts of a complex vector resulting from the subtraction of a received symbol and a constellation point that is the closest to the symbol in each subset.

Abstract: The invention generally provides a method of intelligent frequency hopping such as in Bluetooth and Home RF networks. The method (400) includes the acts of generating windows (410), sampling an original frequency (430), determining if the original frequency is of a desired frequency type (440), using the original frequency when the original frequency is the desired frequency type (460), and mapping the frequency to the desired frequency type when the original frequency is not the desired frequency type (450). Accordingly, the method increases the reliability and throughput of wireless networks.

Abstract: The present invention provides a method and apparatus for selectively updating an adaptive element in a communications receiver based on a determination that the received data is accurate. When inaccurate data is received, the system determines that using that data to update the adaptive element will not be beneficial and excludes the data from being sent to the adaptive element. One mechanism for determining that data has been incorrectly received is the calculation of syndromes as part of a Forward Error Control (FEC) system. Detection of errors through use of the syndrome calculation can be supplemented through windowing to make a determination as to whether a number of received bits should be used or disregarded by the adaptive element. The adaptive element can comprise any number of decision-directed loops including adaptive processors and carrier and timing recovery loops.