Abstract: A separated synchronizing scrambler/descrambler pair that removes the possibility of catastrophic error due to improper transmission of initial condition information without disrupting the OFDM modulation scheme of a system that includes error-correction coding circuitry and replay variation. A transmitting device within the pair includes a first and a second data scrambler wherein the first data scrambler couples to receive the incoming data stream and filters the incoming data stream to provide a first filtered signal using a key signal. The second data scrambler, having an initial condition, couples to receive the first filtered signal and converts it into a scrambled signal using a scrambling seed. The second data scrambler comprises a random series generator for generating the scrambling seed to convert the first filtered signal into a scrambled signal. The scrambled signal is transmitted to the receiving device.

Abstract: The present invention provides a system, method, and apparatus for providing improved quality of service in a wireless local area network transmission system, the network comprising at least two devices, the quality of services defined at least in part by data communicated by a first of the devices to other devices in the network through one or more quality of service parameters. In accordance with the present invention, a change indicator is initialized at the start of a monitoring period. Then, during the monitoring period, the stored parameters are monitored for changes in those of thee stored parameters that define the quality of service. When a change is detected, the change indicator is updated in response and other devices in the network are periodically notified of the current value of the change indicator. The other devices are operable to update locally stored quality of service parameters in response to detecting a change in the change indicator.

Abstract: A single-inductor dual-output buck converter facilitates power conversion by converting a single DC power source/supply into two separate DC outputs, each of which can be configured to provide a selected/desired voltage. The converter includes a single inductor and three power switches, which control operation of the converter. The converter has four basic stages of operation in which power is initially supplied to a first output that also stores charge. Subsequently, the stored charge of the first output is employed to provide power to a second output.

Abstract: A method for estimating carrier frequency offset (CFO) and sampling frequency offset (SFO) in an Orthogonal Frequency Division Multiplexing (OFDM) system having a plurality of pilot tones. The absolute phase angle for each pilot tone is measured, and estimates of the CFO and the SFO are derived using a weighted least-squares methodology. More particularly, the phase of each pilot tone is measured for a number (n) of symbol times; for each of the pilot tones, the slope of a phase angle change from symbol time to symbol time is estimated using a best least-squares fit of the measured phases to a straight line; and a weighted least-squares best-fit straight line is determined to find an estimated phase angle differential value (?(i)) for each pilot tone; wherein a slope of the best-fit straight line yields an estimate of the SFO, and an intercept with the best-fit straight line yields an estimate of the CFO.

Abstract: A wireless network is disclosed in which individual wireless stations can be configured to implement any of a plurality of physical configurations including antenna configurations. Such antenna configurations may include, without limitation, multiple input multiple output (MIMO) and single input single output (SISO). Different types of MIMO configurations can also be implemented such as open loop MIMO and closed loop MIMO.

Abstract: An efficient way to generate the address sequence for the RAM implementation of Forney's (P, D, m) interleavers requires only A+1+2P memory locations, which is close to the theoretical minimum. Here A is the average delay of the symbols through the interleaver. The address generation circuit (with simple adders and registers) works for variable P,D,m. This is achieved by decomposing the (P,D,m) interleaver into a concatenation of a multiplexed interleaver (implemented with A+1 memory locations), followed by a block interleaver (implemented with 2P memory locations). In many applications, these 2P memory locations can be treated as part of the memory for controlling the data flow of the system.

Abstract: A method is provided for accomplishing asymmetric digital subscriber loop classification and the design of passive hybrid networks for each of the classes. The resulting hybrids are suitable for implementation in a switchable hybrid architecture.

Abstract: A method and apparatus for deriving the channel estimation within a packet based transmission system having a predetermined number of tones (N), wherein each channel has a channel order (L). A first method includes precomputing, from the long sequence (X) of a received signal, a channel estimation matrix (R?1) having a dimension of width and length equal to the channel order (L) and storing one fourth of the channel estimation matrix (R?1) since the channel estimation matrix (R?1) is centrosymmetric. Advantageously, precomputing and storing a fourth of the channel estimation matrix (R?1) saves time and complexity. In a second method, the bit-width requirement for fixed precision requirements regarding implementation in hardware is reduced wherein a channel estimation matrix (G) having dimension of width equal to the number of tones (N) and length equal to the channel order (L) is precomputed and stored.

Abstract: A wireless transmitter (TX1). The transmitter comprises circuitry for providing a plurality of control (CONTROL) bits and circuitry for providing a plurality of user (USER) bits. The transmitter also comprises circuitry for modulating (16) the plurality of control bits and the plurality of user bits into a stream of complex symbols and circuitry (18) for converting the stream of complex symbols into a parallel plurality of complex symbol streams. The transmitter also comprises circuitry (20) for performing an inverse fast Fourier transform on the parallel plurality of complex symbol streams to form a parallel plurality of OFDM symbols and circuitry (22) for converting the parallel plurality of OFDM symbols into a serial stream of OFDM symbols. Each OFDM symbol in the serial stream of OFDM symbols comprises a plurality of data points, and selected (SF2.x) OFDM symbols in the serial stream of OFDM symbols carry modulation information (AMOD).

Abstract: Testing of modules (such as Intellectual property (IP) cores) in integrated circuits (such as system on a chip units (SOCs)) in situations when different modules operate with different characteristics of a control signal. In an embodiment, another module (“subsystem module”) may be implemented to be tested with any of a multiple characteristics of a control signal, and a register which is programmable to generate a derived control signal of a desired characteristic from an original control signal, is provided. The derived control signal is provided to test the subsystem module. According to an aspect of the invention the desired characteristic may be determined, for example, to test a path between the two modules at the same speed as at which the path would be operated in a functional mode.

Abstract: A wireless network, including a plurality of network elements such as a wireless access point (9), and computer stations (2, 4, 6), is disclosed. The wireless network operates so that each network element (2, 4, 6, 9) waits for a pseudo-randomly selected duration, after the end of a frame on the channel, before initiating transmission. One of the network elements, such as the wireless access point (9), measures the performance of the network over a measurement period (T), and adjusts a minimum value of the upper limit of the range from which the random duration is selected, according to the performance of the network over the measurement period. The times measured may be the successful transmission time (Ts), which is maximized in adjusting the minimum value, or the idle and collision times (T1, Tc), which are equated in the optimization of the minimum value.

Abstract: A method and apparatus provide phase, frequency and gain characterization and mitigation in a synchronized code division multiple access (SCDMA) burst receiver via use of dedicated phase and frequency correction loops that implemented to deal with the unique characteristics of a SCDMA signal. The way coded and un-coded bits are interleaved within a given frame requires that all symbols related to that frame be captured in a dedicated storage medium such as a RAM prior to the beginning of the data processing. The method and apparatus substantially eliminate gain, phase, and frequency, among other impairments caused by the transmitter, channel and analog parts of the SCDMA burst receiver.

Abstract: A distributed intelligence conferencing system is disclosed, having a plurality of conferencing nodes to connect groups of participants to a conference. Each of the conferencing nodes provides for the connection of one or more participants to the conference. Each node includes a DSP for distributed signal processing, eliminating the need for a central processor.

Abstract: An electronic device (10). The device comprises an input (16I) for receiving successive data words, wherein each data word of the successive data words comprises a plurality of bits. The device also comprises a memory structure (12) comprising a plurality of memory word addresses, wherein each memory word address corresponds to a storage structure operable to store a data word having the plurality of bits. The device also comprises control circuitry (14, 16), operable during a non-overflow condition of the memory structure, for writing successive ones of received data words into respective successive ones of the memory word addresses. Finally, the device also comprises control circuitry (14, 16), operable during an overflow condition of the memory structure, for writing each data word in successive ones of received data words across multiple ones of the memory word addresses.

Abstract: The present invention provides proxy browsing on the Internet 16 whereby the user interface of one device, such as a personal computer 10 with a Web browser, causes servers 14 to interact with alternate client devices 20, 24 linked to the Internet 16 that are remotely located from the personal computer. A user may activate a proxy browser on a PC 10, select one or more files or commands from a Web server 14, and download the files or commands directly from the servers to client devices 20, 24. A user of a Web browser 26 may locate and download by proxy a digital sound file stored on a Web server 40 to play on a series of networked digital speakers 54. The user of a Proxy Browser 26 may select a recipe stored on an Web server 40 and send the recipe that has embedded commands to configure networked home appliances 52 to the correct cooking modes.

Abstract: Enhancing the throughput rate of a memory access system by using store and forward buffers (SFB) in combination with a DMA engine. According to an aspect of the present invention, the worst case throughput rate (without use of SFBs) is computed, and maximization factor equaling a desired throughput rate divided by the worst case throughput rate is computed. A number of SFBs is determined as equaling one less than the maximization factor. By placing the SFBs at appropriate locations in the data transfer path, the desired throughput rate may be attained when transferring large volumes of data.

Abstract: A gain control system in a Direct Conversion Receiver or similar receiver, includes an automatic gain control circuit which determines whether a low noise amplifier, which amplifies signals from an antenna prior to mixing with signals from a local oscillator, should be set to a high gain or a low gain. The output of the mixer is analyzed by a blocker detect circuit to determine whether a blocker signal is present. Based on the presence of a blocker signal and the power level of the useful signal, the gain of the low noise amplifier may be reduced from the high gain to an intermediate gain in order to reduce self mixing between the radio frequency and local oscillator ports of the mixer, which may lead to dynamic DC offsets.

Abstract: Methods and apparatus for optimizing wireless communications channels by employing multi-channel modulation techniques in wireless communication systems is disclosed. The wireless communications channel may comprise tones, and data may be allocated differently among the different tones according to the channel characterization measurements. In one embodiment, a method may include: transmitting data over a wireless channel using a first station (e.g., an access point), receiving the data using a second station, performing calculations on the received data, and allocating subsequent data transmissions among the tones according to the calculations. Other embodiments may utilize superfluous data transmissions—for example, data coming from the access point that is intended for other stations—in order to calculate channel characterization. Preferably, any portion of the transmitted data (e.g., preamble, header, data, etc.) may be used to calculate channel characterization.

Abstract: The present invention provides a solution that eliminates both the voltage-controlled oscillator (“VXCO” 105) and its associated D/A converter (120) from the timing recovery scheme, thereby significantly reducing manufacturing costs for modems, such as asymmetric digital subscriber loop (“ADSL”) modems. The present invention also enables tracking of a wider frequency offset. The present invention provides this with a novel timing recovery scheme implemented entirely in the digital domain. The present invention includes a free running clock (205) as the sampling clock for the A/D (110) and D/A (115) converters, and interpolators (210, 220, 615 and 635) to correct timing errors for both the receive and transmit samples. The desired sample can be obtained based on its timing offset and its neighboring samples.

Abstract: A sampling method implements direct RF sampling of the down-stream DOCSIS and Euro-DOCSIS cable plant signals present at the customer premises equipment (CPE).