Abstract: Structure ir provided for assisting a person in keeping track of appointments, times for taking medication or the times for turning on electrical equipment or such. The structure comprises an electronic circuit capable of generating signals representing up to N different pre-set times at which specific events are to occur where N is a selected positive integer such as 20. Switches are then provided, each switch corresponding on a one-to-one basis to a unique pre-set time, such that the user can set those switches corresponding to the pre-set times at which the user desires events to take place. An alarm is provided to indicate in sequence when the actual time corresponds to the pre-set time corresponding to each set switch.

Abstract: A CMOS push-pull output buffer (171) is constructed utilizing a plurality of N channel transistors (74, 75, 76) and a plurality of P channel transistors (71, 72, 73) connected in series. The voltages applied to the gates of the N channel transistors and P channel transistors are selected to divide the high voltage (+V) substantially equally across the P channel transistors, when the P channel transistors are turned off, and substantially evenly divide the high voltage across the N channel transistors, when the N channel transistors are turned off.In another embodiment of this invention, selected ones of the N channel and P channel transistors are formed in order to have a high drain to bulk breakdown voltage.In another embodiment of this invention, a plurality of N channel and a plurality of P channel transistors are connected in series and driven by a single ended control voltage (C.sub.

Abstract: A disk drive assembly includes an internal air filter which is placed adjacent to but downstream from, the actuator assembly area thereby to pass air which has been decelerated from the rotating disk and passed through the actuator assembly area to the rotating disk while simultaneously filtering this air to remove particles. By passing through the actuator assembly area the air cools the actuator assembly and removes certain particles from this area as it is filtered.

Abstract: A touch tablet for use in entering data into a computer or graphics display device comprises a first four-sided sheet containing a resistive material on one surface thereof, a second four-sided sheet containing a resistive material on one surface thereof and a spacer for holding the first sheet apart from the second sheet. The first sheet is oriented relative to the second sheet such that the resistive material on one of the two sheets faces the resistive material on the other sheet. Each sheet contains conductive strips formed on two of the four sides of the sheet in contact with the resistive material. A potential is applied across the conductive strips on one of the two sheets. The input lead to an output amplifier is connected to the two conductive strips formed on the other of the two sheets. A user presses the first sheet into conduct with the second sheet and the output voltage from the output amplifier is representative of one of the two coordinates of the point of contact between the two sheets.

Abstract: Exercise apparatus has a handle attached to a cable which is extended when tension on the cable exceeds a preset value. A release allows the cable to be moved effortlessly to the starting position of the exercise. The cable is retracted when the cable is slack, and the cable is clamped at a desired position and a signal emitted when the tension in the cable exceeds a preset value. The exercise apparatus has an isometric mode which allows a force to be applied to the cable without motion of the cable.

Abstract: A programmable transversal filter utilizes a plurality of programmable multiplying means. The result of each multiplication is summed by a summing circuit, thus providing an output signal. The delay network comprises a plurality of signal sample and hold circuits which are selectively connected to the input bus in sequence, in order that one sample and hold circuit may store an analog signal sampled during the present time instant, with other sample and hold circuits storing a plurality of analog signals each of which has been sampled during a corresponding one of a plurality of preceding sample periods. The filter also includes a plurality of reference sample and hold circuits which store error voltages equal to the error voltage component of the voltages provided by the signal sample and hold circuits.A first analog cross-point switch is utilized wherein each of said plurality of time delayed analog signals may be selectively applied to a selected multiplying means.

Abstract: A substance to be treated is brought into a treatment column (10) and kept in suspension (11) in the latter by the injection (A) of a fluidizing gas into the bottom part of the column.According to the invention, a plasma is injected (D) into the column in at least one direction within a radial plane relative to the column.Preferably, the plasma is produced by high-frequency induction and injected at a pressure of the order of atmospheric pressure, so as not to perturb the fluidization of the bed and so as to permit good interpenetration of the various gas streams.Applications to the synthesis of nitrogen oxides, to the gasification of a carbonaceous substance and to the reduction of ores, as well as to the roasting or drying of materials.

Abstract: A communications system includes a transmission medium for carrying signals divided into frames, with each frame being divided into time slots. At least three interface units interface selected equipment to the transmission medium. Each of the at least three interface units is capable of receiving selected signals carried on the transmission system and of delivering intermediate signals derived from these selected signals to a corresponding one of the selected equipment, and of transmitting second signals to the transmission medium. Each of the interface units is connected in parallel to the transmission medium such that the failure of one or more of the interface units does not prevent the remaining interface units from operating. To make possible the parallel connections, common timing references are provided for the transmit line and common timing references are also provided for the receive line.

Abstract: A programmable transversal filter (10) utilizes a plurality of programmable multiplying means (M.sub.1 -M.sub.4). The result of each multiplication is summed by a summing circuit (7), thus providing an output signal (y(t)). The delay network of this invention comprises a plurality of sample and hold circuits (S.sub.1 -S.sub.4) which are selectively connected to the input bus in sequence, in order that one sample and hold circuit may store an analog signal sampled during the present time instant, with other sample and hold circuits storing a plurality of analog signals each of which has been sampled during a corresponding one of a plurality of preceding sample periods.An analog cross-point switch (51) is utilized wherein each of said plurality of time delayed analog signals may be selectively applied to a selected multiplying means.

Abstract: A switched capacitor filter is designed utilizing two switched capacitor charge pumps connected in series. These two charge pumps operate with different clock frequencies thereby allowing charging of a storage capacitor at a higher frequency, thereby decreasing incremental voltage steps during the charging of the storage capacitor, resulting in the generation of a smoother exponential voltage rise.

Abstract: A method for fabricating an integrated circuit semiconductor device comprised of an array of MOSFET elements having self-aligned or self-registered connections with conductive interconnect lines. The method involves the formation on a substrate of a thick oxide insulation layer (30) surrounding openings (99) therein for the MOSFET elements. A gate electrode (38) within each opening is utilized to provide self-registered source (42) and drain (44) regions and is covered on all sides and on its top surface with a gate dielectric layer (46). After the formation of the source-drain regions a relatively thin dielectric protective layer (38) is applied to the entire chip prior to the application of an upper insulative layer (50).

Abstract: A Tri-State circuit element is constructed which is uniquely suited for use in large scale integrated circuit devices wherein a relatively large number of such Tri-State circuits are utilized to drive other circuitry contained within the integrated circuit device. One embodiment of a Tri-State circuit is constructed utilizing a single NAND gate (73), a single inverter (74), a single P channel transistor (76), and two N channel transistors (77, 78) yielding a circuit having a propagation delay of only two gate delays and requiring a total of only nine transistors. Another embodiment of this invention is a Tri-State circuit constructed utilizing a single NOR gate (84), a single inverter (83), a single N channel transistor (88), and two P channel transistors (86, 87). In this embodiment of my invention, a total of nine MOS transistors are required, and the propagation delay between the input terminal and the output terminal is equal to two gate delays.

Abstract: A portable device for locating a wall stud or similar object positioned behind a wall surface comprises means for detecting a change in the dielectric constant of the wall due to the presence of a stud or similar object and, in combination therewith, means for detecting the presence in the wall of a source of alternating current. In addition, a display is provided for visually indicating the presence of a source of alternating current in the wall in response to a signal from the means for detecting. The circuit also includes an amplifier to compensate for variations in characteristics of the electrical components used in the structure and an improved circuit for bleeding a bias charge used to calibrate the device when the device is shut off while preventing this charge from being bled when the device is turned on, and structure for indicating to the user that the device is being calibrated.

Abstract: An operational amplifier has one noninverting input lead (116), and two inverting input leads (117a, 117b). One of these inverting input leads (117a) is utilized to compensate for the effects of the inherent offset voltage (V.sub.off) of the operational amplifier, and the second inverting input lead (117b) receives an input signal to be amplified or compared.

Abstract: An exercise apparatus comprising structure for performing exercises which includes a handbar for being grasped by the hands of a user, a bar for restraining the feet of the user and a padded member for restraining the thighs of the user, the padded member being adjustable in location relative to the structure for restraining the feet of the user such that said structure allows the user to stress the user's muscles in the range of motion where the greatest stress is imposed by an activity such as sprinting.

Abstract: A freeze protection system allows the working fluid contained in the communicating tubes of the solar collector to drain from both the input and output tubes of the collector when a first predetermined temperature of the working fluid is detected and to fill the collector via both the input and output tubes when a second predetermined temperature is detected. The invention includes valve mechanisms, of the spool valve variety, that communicate the working fluid to be heated to the collector and therefrom to a storage tank, a valve actuator and a sensor.

Abstract: A unique fabrication method allows the formation of regions of opposite conductivity types in a semiconductor substrate 100 utilizing a single masking step. A first mask is formed on the surface of the semiconductor substrate and patterned to define the regions (110) which are to be doped to a first conductivity type. Subsequent to the doping of these first regions, a protective layer (111) is formed over these first regions. The mask is then removed, thus exposing the regions (112) which are to be doped to the second conductivity type opposite to said first conductivity type. These exposed regions are then doped to said opposite conductivity type, with the first regions which have been doped to said first conductivity type protected by said protective layer.

Abstract: A dynamic RAM memory cell comprises an MOS read transistor whose conductivity state is determined by the state of charge on a first electrode overlying the read transistor channel region. The first electrode is connected through a buried contact opening to a diffused region in the substrate. This diffusion serves as a junction isolated storage node. This storage node can be charged or discharged through an MOS write transistor. The first electrode is capacitively coupled to a field plate held at a first potential. A control gate formed in a second electrode controls conduction through the write transistor and also allows selective reading in an array of read transistors. Nondestructive read can be achieved together with transistor amplification of the charge stored on the first electrode.

Abstract: MOS dynamic logic/shift registers employing as load elements either a parasitic bipolar transistor whose emitter is the drain of the MOS element, or the drain-substrate diode charged via bi-polar signals on the clock lines capacitively coupled to the drain. Uses for logic, memory, and imaging applications.

Abstract: An electronic comparator circuit (10) adapted for implementation as an integrated circuit semiconductor device provides high resolution and high speed performance. The circuit comprises a first differential amplifier (12) with clamping diodes (50, 52) that allow a fast response; a source-follower stage (14) connected to the first differential amplifier for buffering its output to enable it to be broadbanded; a second differential amplifier (16) driven by the source-follower stage for handling large signal swings while providing additional gain, a level shift stage (18) for driving the output stage in a class A-B mode, and a cascode output stage (20) which provides increased circuit gain and an output signal which ranges from the positive supply voltage (V.sub.DD) to the negative supply voltage (V.sub.SS).