Abstract: A support member is used to mount a heat motor and at least one electrical resistance heating element for actuating said heat motor. The support member is made of a thermally conductive material with cylindrical openings which receive the motor and heating element(s). Heat from the resistance element actuates the motor by heat conductance through the support.

Abstract: In accordance with this invention, a dynamic RAM cell comprises a substrate of one conductivity type in which is formed a first region of a second and opposite conductivity type and a first pocket of this second conductivity type. The first pocket has formed therein a second pocket of the same conductivity type as the substrate but of a higher doping concentration than the substrate. By forming a channel between the first region and the first pocket, the charge in this first pocket can be controlled to represent a selected bit of information. The magnitude of charge stored in this first pocket can then be determined by forming a channel across this first pocket to the second pocket from the substrate. The time rate of change of the potential in the second pocket then is representative of the stored charge of information in the first pocket due to the fact that the impedance of the channel formed across the first pocket is directly related to the amount of charge stored in the first pocket.

Abstract: An integrator circuit utilizing an operational amplifier (19) and switched capacitor elements (11, 13 and 16) in place of resistors in such a manner as to provide compensation for voltage offsets present in the operational amplifier resulting in an output voltage (V.sub.OUT) free from the effects of voltage offsets inherent in operational amplifiers.

Abstract: In an analog to digital converter circuit for a CODEC a single reference voltage is used for comparing both positive and negative input signals. The circuit comprises a capacitor array to define the decision levels corresponding to the end points of companding elements with the top plates of all capacitors in the array being connected in parallel through a single switch from an incoming analog signal source and to one input of a comparator. The bottom plate of each capacitor is connected to one of a series of three-way switches, all of which have separate terminals connected to the output of a voltage reference, to separate switches on a linear resistor string connected to the voltage reference output, and to ground. All switches are controlled by control logic connected to the comparator output.

Abstract: An integrated circuit digital to analog converter comprised of MOS current mirrors and utilizing additional MOS devices to provide transmission gates and control means. Each transmission gate 36 is connected to a source of digital data to be converted and the mirroring device for each transmission gate 36 has a channel width with some predetermined proportional relationship to the channels of input transistors 12 and mirroring output MOS transistors 14 to 44 with the input transistor 12 connected to a constant current source, the total output mirroring current of the output mirroring transistors is in quantized analog form and varies according to the cumulative currents from the mirroring MOS transistors as the transistors are activated. The invention may be embodied in linear multiplying, non-linear and companding converters.

Abstract: In the present invention, analog voice information is sampled at a first sampling rate, during periods when voice information is to be transmitted at a frequency which provides a digitized voice rate equal to the transmission rate capability of the transmission channel. During periods when both voice and data are to be transmitted, the analog voice information is sampled at a second sampling rate less than the first sampling rate, thus allowing the merged voice and data information to have a total digitized transmission rate equal to the transmission rate capability of the transmission channel.

Abstract: A cutting tool for stripping insulation from a cable comprises a shank and a blade, the blade possessing one cutting edge formed at the intersection of a back face and a front face, the front face being concave, and the back and front faces together forming a wedge. In one embodiment, an additional wedge-shaped protuberance is formed out of the front face of the blade at its end substantially perpendicular to the back face of the blade to assist in wedging the insulation being removed from the cable.

Abstract: Extremely cold gaseous nitrogen is used as a cooling medium in the highly exothermic reaction between a chemical etch solution and silicon. This greatly increases the throughput of silicon material through the etchant over prior art techniques, particularly where it is desired to maintain the temperature of the etchant solution below 25.degree. C.

Abstract: A semiconductor memory device is provided comprised of an integrated array of cells formed on a substrate in conjunction with parallel spaced-apart bit lines and conductive word lines that are perpendicular to the bit lines. A plurality of V-shaped recesses are located between and extend perpendicular to adjacent parallel bit lines. Two cells share each recess and each cell includes a VMOS transistor formed by one end portion of the recess and an isolated buried source region located under the adjacent bit line. A channel stop region is located between and isolates the VMOS transistors and their respective buried source regions at opposite ends of each recess. Thus, the VMOS pass gate is shared between adjacent bit lines and bit line capacitance is minimized. Also, the VMOS pass gates are self-aligned to eliminate alignment tolerances and minimize bit line capacitance. The invention also includes an efficient method for producing a semiconductor memory device with such an array of cells.

Abstract: A system for forming a reaction product such as calcium silicate comprises an autoclave for receiving the reaction constituents and for reacting these constituents to form a reaction product, a holding vessel for receiving the reaction product and a flow passage connecting the autoclave to the holding vessel and for allowing the passage of the reaction product from the autoclave to the holding vessel. The flow passage includes a heat exchanger for transferring heat from the reaction product during its passage through the flow passage to another medium. The system includes an electronic control system for maintaining the pressure in the holding vessel a controlled amount beneath the pressure in the autoclave during the transfer of the reaction product from the autoclave to the holding vessel. This minimizes the structural damage to the reaction product during its transfer to the holding vessel. The holding vessel can, if desired, be used to mix additional material into the reaction product.

Abstract: An integrator circuit utilizing an operational amplifier and switched capacitor elements in place of resistors in such a manner as to provide compensation for voltage offsets present in the operational amplifier resulting in an output voltage free from the effects of voltage offsets inherent in operational amplifiers.

Abstract: The floating gate in an N channel EPROM cell extends over the drain diffusion and over a portion of the channel thereby to form a "drain" capacitance between the drain and the floating gate and a "channel" capacitance between the channel and the floating gate. A control gate overlaps the floating gate and extends over the remainder of the channel near the source diffusion thereby to form a "control" capacitance between the channel and the control gate. These three capacitances form the coupling for driving each cell. The inversion region in the channel directly under the control gate is established directly by a "write or read access" voltage applied to the control gate. The inversion region in the channel directly under the floating gate is established indirectly through the drain and control capacitances and the channel capacitance by the control gate voltage and by another write access voltage applied to the drain.

Abstract: An autozero loop for eliminating offsets in the analog to digital converter section of a voice frequency coder-decoder (CODEC) utilizing an array of capacitors and a linear resistor string. The autozero loop functions with a relatively small time constant to null offsets quickly during the power-up phase of CODEC operation and with a higher time constant after the power-up phase. A dual bandwidth sub-circuit in the loop is connected to a voltage generator and controlled by signals from a logic circuit to operate at different bandwidths and thus provide different offset cancelling feedback signals during the power-up and normal operating phases.

Abstract: A switched capacitor filter is designed utilizing two parallel switched capacitor charge pumps. These two, parallel charge pumps operate out of phase with each other, thereby allowing charging of a storage capacitor at a rate equal to twice the clock frequency, thereby decreasing incremental voltage steps during the charging of the storage capacitor.

Abstract: An operational amplifier (10a) comprised of MOSFET elements is disclosed which provides for a variable drive for an output stage that results in lower power dissipation and increased gain factor over comparable circuits using constant bias drive for the output stage. A bias section (14) comprised of complementary MOS elements (24, 26) is connected to a single MOSFET (40) that furnishes constant current to the signal input section of a differential amplifier section (20). The output of this differential amplifier is furnished by one path (70) directly to one complementary MOSFET element (72) of an output stage (18) and by another path (114) to a level shift section (16) which provides an output to a second complementary MOSFET element (80) of the output stage. Thus, the circuit functions under class A-B operation at low power dissipation and provides high open loop gain.

Abstract: An interpolation or smoothing filter circuit for a switched-capacitor system which transforms the sampled-and-held output signals from a switched-capacitor filter into sampled-and-held signals with a doubled sample rate. The circuit comprises an operational amplifier whose noninverting input lead is connected to a switched capacitor network which receives the sampled-and-held input signals at the normal sample rate. The network includes two separate capacitors controlled by switches operable at two alternating clock phases and connected to provide the desired summation and holding of charges. Feedback leads connected between the amplifier output lead and its noninverting input lead and containing additional capacitors cooperate with the input network to produce an output signal that is sampled-and-held at twice the sample rate of the input signal.

Abstract: A switched-capacitor cosine filter for a sampled-data system functions to reject extraneous frequency components of an incoming analog signal around the sampling frequency, thereby avoiding aliasing. The filter comprises an operational amplifier whose inverting input receives input signals through a switched input capacitor controlled by a four-switch network controlled by alternating clock phases and feedback signals from the amplifier output through a feedback capacitor. The transfer function of the circuit provides a zero of transmission at the sampling frequency, thereby eliminating unwanted frequency components. A self-contained version of the cosine filter is provided by the addition of another grounded switched capacitor with appropriately timed switches in the feedback network.

Abstract: The floating gate in an N channel EPROM cell extends over the drain diffusion and over a portion of the channel thereby to form a "drain" capacitance between the drain and the floating gate and a "channel" capacitance between the channel and the floating gate. A control gate overlaps the floating gate and extends over the remainder of the channel near the source diffusion thereby to form a "control" capacitance between the channel and the control gate. These three capacitances form the coupling for driving each cell. The inversion region in the channel directly under the control gate is established directly by a "write or read access" voltage applied to the control gate. The inversion region in the channel directly under the floating gate is established indirectly through the drain and control capacitances and the channel capacitance by the control gate voltage and by another write access voltage applied to the drain.

Abstract: An operational amplifier is designed to eliminate the effects of inherent voltage affects when used as a voltage comparator, while maintaining a high slew rate and a fast response time by providing a feedback capacitor which can be connected and disconnected between the output terminal and the noninverting current mirror input leg.

Abstract: A novel, low-friction, low-inertia flexible diaphragm containing a magnet formed as an integral part of the diaphragm is mounted in a chamber (preferably cylindrical). The chamber comprises part of the flow meter in a flow control system. One or more sensing devices are mounted on the walls of the chamber to sense the instantaneous position of the diaphragm. A novel electronic control circuit processes the data from the one or more sensing devices to provide measures of the flow rate during the displacement of the diaphragm along the cylinder. Signals are generated by the electronic control circuitry for switching a pair of three-way valves (one valve comprising the input valve and the other valve comprising the output valve) such that during one-half of a cycle the intput valve transfers fluid into the cylinder on one side of the diaphragm and, during the other half of the cycle, transfers fluid into the cylinder on the other side of the diaphragm.