Abstract: A method and apparatus for masking the effects of latency within an information distribution system. The apparatus comprises a set top terminal that requests and receives information from an information server within the information distribution system. The information is generally displayed upon a conventional television that is coupled to the set top terminal. The set top terminal contains a central processing unit and an information stream decoder that are programmed to implement the method. The method is a routine which is executed when a subscriber selects certain functions, usually via a remote control, that are available for the set top terminal to perform. Upon execution, the method recalls a predefined image from memory and begins to fade the presently displayed image into a predefined image, e.g., a white screen. Simultaneously, the presently playing sound is also faded into the predefined sound, e.g., no sound.

Abstract: Apparatus for supporting a wafer in a semiconductor wafer processing system. The apparatus contains a pedestal assembly, a ring assembly circumscribing the pedestal and an insulator between the pedestal assembly and ring assembly. The insulator electrically isolates the pedestal assembly from the ring assembly thereby preventing unwanted power coupling through the ring assembly.

Abstract: Apparatus and concomitant method for performing priority based scheduling of wafer processing within a multiple chamber semiconductor wafer processing system (cluster tool). The sequencer assigns priority values to the chambers in a cluster tool, then moves wafers from chamber to chamber in accordance with the assigned priorities. The sequencer is capable of determining the amount of time available before a priority move is to be performed and, if time is sufficient, the sequencer performs a non-priority move while waiting. The sequencer also dynamically varies assigned priorities depending upon the availability of chambers in the tool. Lastly, the sequencer prioritizes the chambers based upon the minimum time required for the robot to move the wafers in a particular stage.

Abstract: A method and apparatus forming a subterranean barrier wall that is substantially impervious to liquids. The barrier wall and method of forming the same comprises interlocking a plurality of sheet piles. Each sheet pile has interlocking edges that form a sealed joint. The interlocking edges consist of two semi-circular portions, a first semi-circular groove and a first radial edge, and a quarter-circular part, a second radial edge. Interlocking the sheet piles by a first inner locking edge, a second interlocking edge and an outer locking edge at the interlocking edges forms a barrier wall forming a substantially moisture-impervious seal.

Abstract: A method and apparatus for minimizing the cumulative seek time required to complete a plurality of sequential disk accesses within a parallel processing computer system. The method and apparatus orders the disk access requests in an order that ensures that all access requests are fulfilled using two passes of the disk arm across the disk. The method requires the disk controllers or the processing elements to store in memory a queue of N disk access requests and issue each request to the disks asynchronously with respect to disk controllers associated with other processing elements. As such, in a SIMD computer, N disk accesses require a total worst case time of N.times..tau..sub.r/w +.tau..sub.seek to complete all the accesses.

Abstract: An electrostatic chuck containing apparatus, and a concomitant method, for balancing the electrostatic force that the chuck imparts upon a workpiece. More specifically, the electrostatic chuck contains a chuck body having a pair of coplanar electrodes embedded therein and a wafer spacing mask containing a plurality of conductive support members deposited upon a support surface of the chuck body. The support members maintain a wafer, or other workpiece, in a spaced-part relation with respect to the support surface of the chuck body. Each electrode within the chuck is respectively connected to a terminal dual voltage power supply having a center tap. The center tap of the power supply is connected to the wafer spacing mask.

Abstract: Multi-layered, ceramic electrostatic chuck for retaining a substrate in a process chamber is provided. The chuck comprises a first layer having a top surface, a second layer disposed on the top surface of the first layer, and a third layer disposed on top of the second layer. The second layer alters the resistivity of the third layer during the fabrication process of the chuck. As such, the resistivity of the chuck is reduced to a value that facilitates establishment of the Johnsen-Rahbek effect and promotes wafer processing at room temperature.

Abstract: A system for acquiring and displaying which represents a two-dimensional array of data in an intuitive graphical display, where the graphical display is controlled through a plurality of display interfaces. Specifically, the system acquires data representing a phenomenon such as a plasma, processes that data and displays the data, in real-time, in one of a number of user selectable graphical formats. The data, once acquired, can be further processed by editing, filtering and smoothing. Such processed data can then be "replayed" such that a user can compare various sets of data acquired under various test scenarios. Additionally, the system is used to control and optimize a plasma within plasma generating equipment.

Abstract: Apparatus, positioned at an inlet port to a pump, for shielding the pump from a process chamber of a semiconductor wafer processing system, where the apparatus has a variable effective throughput area. Specifically, the apparatus is a restrictor shield having a first effective throughput area during processing and a second effective throughput area during bakeout, where the first effective throughput area is typically less than the second effective throughput area. The selection of the effective throughput area is directly responsive to the temperature within the process chamber.

Abstract: Method and apparatus for retaining a workpiece in a process chamber of a semiconductor wafer processing system. The apparatus has a mechanical clamp for clamping the periphery of the workpiece to a pedestal and an electrostatic clamp for clamping the center of the workpiece to the pedestal.

Abstract: An electrostatic chuck including a body of ceramic material, a pair of electrodes embedded in the body of ceramic material, and two feedthroughs connected to each of the electrodes for receiving DC chucking voltage, RF biasing power, and electric heating current. The electrode structure simultaneously provides biasing, chucking and heating of a wafer that is retained by the chuck.

Abstract: A method and apparatus for determining the state of contamination of an electrostatic chuck. The method consists of applying a voltage to at least one of the chuck electrodes and measuring a leakage current to any of the chuck electrodes. The measured current is compared to a first threshold value. If the measured current is greater than the first threshold value, the chuck is deemed contaminated.

Abstract: A method of dechucking a workpiece from an electrostatic chuck. The method adaptively produces a dechucking voltage for canceling any unpredictable residual electrostatic fields between a workpiece and the electrostatic chuck. The method contains the steps of (a) applying a lifting force to the workpiece; (b) altering the chucking voltage; (c) measuring the lifting force; (d) comparing the measured lifting force to a threshold level; and, depending on the result of the comparison, either (e) maintaining the chucking voltage at its present level for a predefined period of time and physically dechucking the workpiece or (f) repeating steps (b), (c), (d) and (e).

Abstract: An automated method for aligning wafer surface scan maps and locating defects such as particle contaminant distributions on a wafer surface. More specifically, the invention is an automated method for locating added and removed contaminants and other defects on a semiconductor wafer surface after the wafer has undergone wafer-handling and/or processing. A second data set of a second scan of a wafer surface is misalignment-corrected to a first coordinate system of a first scan of the wafer surface. Thereafter, a final match is made between a first data set of the first scan and the misalignment-corrected data of the second scan. Non-matching locations in the misalignment-corrected data of the second scan represent added defects on the surface of the wafer. Non-matching locations in the base data of the first scan represent removed defects from the surface of the wafer.

Abstract: Apparatus for limiting the rotation of a deposition ring relative to a substrate support. Specifically, the deposition ring is rotatably affixed to the substrate support. In a first embodiment of the apparatus, an anti-rotation pin is affixed to a deposition ring that circumscribes a substrate support such as an electrostatic chuck. An anti-rotation bracket is attached at a first end to the substrate support. A second end is coupled to the anti-rotation pin. As such, the deposition ring has some degree of freedom to adjust to thermal expansion of the deposition ring and the substrate support; however, the deposition ring is prevented by the interaction of the anti-rotation pin and bracket from rotating to a point where the deposition ring becomes stuck to the substrate support. In an alternative embodiment of the apparatus, a anti-rotation pin or bump is formed on the underside of the deposition ring.

Abstract: A method and apparatus for fabricating a wafer spacing mask on a workpiece support chuck. Such apparatus is a plate containing a plurality of apertures that is positioned atop the workpiece support chuck while material is deposited onto the plate and through the apertures onto chuck. Upon completion of the deposition process, the plate is removed from the workpiece support chuck leaving deposits of the material to form the wafer spacing mask.

Abstract: An improved apparatus for CVD processing is described wherein a wafer mounted on a vertically movable susceptor beneath a gas outlet or showerhead is raised into contact with a shield ring which normally rests on a ring support in the chamber. The shield ring engages the frontside edge of the wafer, lifting the shield ring off its support, when the susceptor and the wafer are raised to a deposition position in the chamber. The shield ring, by engaging the frontside edge of the wafer, shields the edge of the top surface of the wafer, as well as the end edge and the backside of the wafer, during the deposition. Matching tapered edges, respectively, on the susceptor and the shield ring permit alignment of the shield ring with respect to the susceptor, and alignment of the wafer to the susceptor and the shield ring. Alignment means are also disclosed to circularly align the shield ring to its support in the chamber.

Abstract: An insulated wafer spacing mask for supporting a workpiece in a spaced apart relation to a workpiece support chuck. More specifically, the wafer spacing mask contains a plurality of support members deposited upon an insulating material located between the wafer spacing mask and the support surface of the chuck. The support members maintain a wafer, or other workpiece, in a spaced apart relation to the support surface of the chuck. The distance between the underside surface of the wafer and the chuck is defined by the thickness of the support members. This distance should be larger than the expected diameter of contaminant particles that may lie on the surface of the chuck. In this manner, the contaminant particles do not adhere to the underside of the wafer and current leakage through the wafer is minimized.