Patents Represented by Attorney Timothy J. Keefer
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Patent number: 6866949Abstract: The present invention provides a gas barrier film comprising a composite film provided with a gas barrier layer having a laminated structure including at least a metal oxide thin layer on a substrate film having a (1) 80 ppm/° C. or less coefficient of thermal expansion at 50° C. to 150° C. and/or a 10 ppm/% RH or less coefficient of humidity expansion at 25° C., and a (2) 150 C. ° or more glass transition temperature, and a display with a display element covered with the same.Type: GrantFiled: March 6, 2003Date of Patent: March 15, 2005Assignee: Dai Nippon Printing Co., Ltd.Inventors: Yurie Ota, Toshio Yoshihara, Keiji Tokunaga, Minoru Komada
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Patent number: 6836313Abstract: The present invention provides an optical element capable of keeping the accuracy even in the case of use in an optical device such as an image display apparatus, without the risk of fluctuation of the optical characteristics even in the case a load is applied at the time of being assembled in the optical device. In order to achieve the object, an optical element comprising a supporting member, and an optical functional layer of a polymerizable liquid crystal material hardened on the supporting member with a predetermined liquid crystal regularity, wherein the optical functional layer has a 20 or more Vickers hardness value, is provided.Type: GrantFiled: December 2, 2002Date of Patent: December 28, 2004Assignee: Dai Nippon Printing Co., Ltd.Inventor: Koji Ishizaki
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Patent number: 6836174Abstract: A new transistor structure with thermal protection is provided. A type of the new transistor structure of the present invention includes a main depletion-mode NMOSFET and a control PMOSFET, with the drain terminal of the control PMOSFET connected to the gate terminal of the main NMOSFET and the gate terminal of the control PMOSFET connected to a thermal protection unit. The two-MOSFET structure as a whole emulates a normal NMOSFET. The source terminal of the control PMOSFET that's not connected to the gate terminal of the main NMOSFET acts as the gate terminal of the new transistor structure, and the drain and source terminals of the new transistor structure are the drain and source terminals of the main NMOSFET. The thermal protection unit prevents thermal failures of the MOSFETs of the new transistor structure by sensing heat, terminating current through and switching the two MOSFETs.Type: GrantFiled: June 17, 2003Date of Patent: December 28, 2004Assignee: Arima Computer CorporationInventor: Chung-Hsing Chang
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Patent number: 6833232Abstract: Disclosed is a micro-pattern forming method for a semiconductor device comprising: sequentially forming first and second insulation films on a semiconductor substrate; forming a photosensitive film on the second insulation film; dry etching the second insulation film; removing the photosensitive film; forming a third insulation film on the substrate; forming a fourth insulation film on a resultant structure; etching the third and fourth insulation films using a proper formal solution; etching the third insulation film using the fourth and second insulation films as masks to form a third insulation film pattern; and filling a conductive film into spaces between the second and third insulation films and second flattening the conductive film to form conductive lines.Type: GrantFiled: January 8, 2003Date of Patent: December 21, 2004Assignee: Dongbu Electronics Co., Ltd.Inventor: Cheol Soo Park
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Patent number: 6831365Abstract: A method and a pattern for reducing interconnect failures are described. The method and pattern are used for a multilevel structure of metal/dielectric/metal. At least one assistant pattern is attached to one metal layer of the multilevel structure. A thermal stress gradient resulting from the assistant pattern can collect vacancies of the metal layer, so as to prevent stress-induced voids from generating at the bottom of a via plug which connects the two metal layers.Type: GrantFiled: May 30, 2003Date of Patent: December 14, 2004Assignee: Taiwan Semiconductor Manufacturing, Co.Inventors: Chih-Hsiang Yao, Wen-Kai Wan, Tai-Chun Huang, Chin-Chiu Hsia
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Patent number: 6824605Abstract: An additive for elaboration of ecological permeable concretes. The additive containing from about 24.5% to 28.2% by weight of a mixture made of dispersing agents, from about 3.3% to 3.8% by weight of a humectant agent, from 0 to about 1% by weight of a nonionic surfactant, from 0 to about 3% by weight basis of a bactericidal agent, from about 3.3% to 3.8% by weight of hydroxypropylethyl or methylcellulose from 0 to about 0.3% by weight of an antifoaming agent and from about 55.8% to 64.2% by weight of a highly reactive non-crystalline calcinated silica aluminant.Type: GrantFiled: March 11, 2003Date of Patent: November 30, 2004Inventors: Nestor De Buen-Unna, Luis German Guevara-Nieto, Jaime Grau-Genesias
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Patent number: 6811945Abstract: A method of producing a pattern-formed structure, comprising: preparing a substrate for a pattern-formed structure having a characteristic-modifiable layer whose characteristic at a surface thereof can be modified by the action of photocatalyst; preparing a photocatalyst-containing-layer side substrate having a photocatalyst-containing layer formed on a base material, the photocatalyst-containing layer containing photocatalyst, arranging the substrate for a pattern-formed structure and the photocatalyst-containing-Iayer side substrate such that the characteristic-modifiable layer faces the photocatalyst-containing layer with a clearance of no larger than 200 &mgr;m therebetween; and irradiating energy to the characteristic-modifiable layer from a predetermined direction, and modifying characteristic of a surface of the characteristic-modifiable layer, thereby forming a pattern at the characteristic-modifiable layer.Type: GrantFiled: March 13, 2003Date of Patent: November 2, 2004Assignee: Dai Nippon Printing Co., Ltd.Inventor: Hironori Kobayashi
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Patent number: 6810927Abstract: Device for supplying additives (A, B, C) and machine for filling containers (4) with a fluid product (6) supplied to delivery heads (5) by means of a header (7; 7; 107) and distribution ducts (7a; 7b) comprising means (10a, 10b, 10c, 11; 110A, 110B, 110C, 11) for supplying said additives (A, B, C) to the said header (7; 7; 107) receiving the base product (6).Type: GrantFiled: May 8, 2003Date of Patent: November 2, 2004Assignee: Ronchi Mario S.p.A.Inventor: Cesare Ronchi
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Patent number: 6805780Abstract: Electrochemical biosensor test strip, fabrication method thereof and electrochemical biosensor are disclosed. The electrochemical biosensor test strip is fabricated by cutting a groove in a first insulation base in the breadth direction, forming two electrodes parallel to length direction on the first insulation base by sputtering using shadow mask, fixing a reaction material comprising an enzyme which reacts an analyte and generates current corresponding to the concentration of analyte across the two electrodes on the groove of the insulation base, and affixing a cover to the first insulation base. The groove of the first insulation base and the cover make a capillary at the position where the reaction material is fixed. The fabrication method can lower the cost for fabricating the test strip by forming thin electrodes.Type: GrantFiled: October 5, 2001Date of Patent: October 19, 2004Assignee: Allmedicus Co., Ltd.Inventors: Junoh Ryu, Jinwoo Lee
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Patent number: 6807204Abstract: A hybridized optoelectronic device having a multi-section laser and a wavelength measuring component such that stable operational characteristics remote from mode boundaries may be determined and stored in a look-up table. A fast means of characterizing the device using sampling techniques is also disclosed. The device may incorporate a frequency-locking component to enable the laser to emit radiation at predetermined frequencies.Type: GrantFiled: April 11, 2002Date of Patent: October 19, 2004Assignee: Tsunami Photonics LimitedInventor: Ronan O'Dowd
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Patent number: 6803710Abstract: A shadow mask with a slot having a substantially rectangular shape and a curved slot. The rectangular slot is composed of a back side opening formed on an electron beam incident side, a front side opening having a large area to allow the electron beam to pass, and a side wall sections inclining between the back side opening and the front side opening. The curved slot is composed of a back side opening (11) formed on the electron beam incident side and curved such that both longitudinal end portions are apart from an axis of ordinate passing a central portion of the shadow mask, a front side opening (2) formed having a large area to allow the electron beam to pass and side wall section (3 - - - 6) inclining between the back side opening and the front side opening.Type: GrantFiled: September 25, 2000Date of Patent: October 12, 2004Assignee: Dai Nippon Printing Co., Ltd.Inventors: Takeshi Ikegami, Toshihiro Hatori
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Patent number: 6803175Abstract: A method of producing a pattern-formed structure, comprising: preparing a substrate for a pattern-formed structure having a characteristic-modifiable layer whose characteristic at a surface thereof can be modified by the action of photocatalyst; preparing a photocatalyst-containing-layer side substrate having a photocatalyst-containing layer formed on a base material, the photocatalyst-containing layer containing photocatalyst; arranging the substrate for a pattern-formed structure and the photocatalyst-containing-layer side substrate such that the characteristic-modifiable layer faces the photocatalyst-containing layer with a clearance of no larger than 200 &mgr;m therebetween; and irradiating energy to the characteristic-modifiable layer from a predetermined direction, and modifying characteristic of a surface of the characteristic-modifiable layer, thereby forming a pattern at the characteristic-modifiable layer.Type: GrantFiled: March 28, 2002Date of Patent: October 12, 2004Assignee: Dai Nippon Printing Co., Ltd.Inventor: Hironori Kobayashi
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Patent number: 6800529Abstract: The present invention relates to a method for fabricating a semiconductor transistor device. The method comprises: forming a first conductive type well in a semiconductor substrate having a device isolation film formed thereon; implanting first conductive type impurity ions into the first conductive type well, so as to form a punch-through stopper region; implanting the first conductive type impurity ions into the upper portion of the resulting structure at fixed tilt angle and ion implantation energy, so as to form a channel region; forming a gate electrode including a gate insulating film on the semiconductor substrate; forming LDD regions in the semiconductor substrate at both sides of the gate electrode; forming an insulating spacer film on the side of the gate electrode; and forming source and drain regions in the semiconductor substrate at portions below the sides of the insulating spacer films.Type: GrantFiled: December 20, 2002Date of Patent: October 5, 2004Assignee: Dongbu Electronics Co., Ltd.Inventor: Tae Woo Kim
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Patent number: 6800405Abstract: A method of producing a pattern-formed structure, comprising: preparing a substrate for a pattern-formed structure having a characteristic-modifiable layer whose characteristic at a surface thereof can be modified by the action of photocatalyst; preparing a photocatalyst-containing-layer side substrate having a photocatalyst-containing layer formed on a base material, the photocatalyst-containing layer containing photocatalyst; arranging the substrate for a pattern-formed structure and the photocatalyst-containing-layer side substrate such that the characteristic-modifiable layer faces the photocatalyst-containing layer with a clearance of no larger than 200 &mgr;m therebetween; and irradiating energy to the characteristic-modifiable layer from a predetermined direction, and modifying characteristic of a surface of the characteristic-modifiable layer, thereby forming a pattern at the characteristic-modifiable layer.Type: GrantFiled: March 13, 2003Date of Patent: October 5, 2004Assignee: Dai Nippon Printing Co., Ltd.Inventor: Hironori Kobayashi
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Patent number: 6797625Abstract: A method for fabricating semiconductor devices is described, in particular a wafer chuck for holding a semiconductor wafer on which a predetermined thin layer is deposited; a processing chamber for injecting etching gas toward the wafer to form a predetermined pattern; and a clamp or a shadow ring provided on an edge of the wafer being held by the wafer chuck and preventing the edge from being etched, and thereby forming a protective step around the edge. Therefore, during a subsequent CMP process, the pattern adjacent to the edge of the wafer can be prevented from being over-polished, and reliability as well as productivity of the semiconductor devices can be improved.Type: GrantFiled: November 27, 2002Date of Patent: September 28, 2004Assignee: Dongbu Electronics Co., Ltd.Inventors: Chang Gyu Kim, Wan Shick Kim
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Patent number: 6790767Abstract: A method for formation of a copper diffusion barrier film using aluminum is disclosed. In the method, thin aluminum (Al) film is deposited on a dielectric, and a surface of the deposited aluminum film is plasma treated with NH3, thereby transforming the surface of the plasma treated aluminum film into a nitride film basically composed of aluminum nitride (AlxNy), and an aluminum film is deposited on the surface of the transformed aluminum nitride film, and copper is deposited on the surface of the deposited aluminum film. Therefore, because the diffusion of copper is suppressed, the problem that leakages between metal lines increase as pitches between the metals decrease due to high integration of parts of semiconductor can be settled.Type: GrantFiled: November 27, 2002Date of Patent: September 14, 2004Assignee: Dongbu Electronics Co., Ltd.Inventor: Jae Suk Lee
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Patent number: 6781093Abstract: Electronic circuits such as IC packages, circuit boards, of flex circuits are singulated by laser cutting of adjoining laminated material. The laser beam has a wavelength of less than 400 nm, and either a minimum energy density of 100 J/cm2 or a minimum power density of 1GW/cm2. The method avoids the need for cleaning and intermediate handling, and there is a greatly improved throughput.Type: GrantFiled: February 1, 2002Date of Patent: August 24, 2004Assignee: Xsil Technology LimitedInventors: Peter Conlon, James Mahon, Adrian Boyle, Mark Owen
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Patent number: 6780463Abstract: The present invention discloses a method of forming a titanium nitride (TiN) thin film on a substrate disposed on a susceptor in a reaction chamber with low carbon content, low resistivity, and excellent step coverage. The method forming the TiN thin film includes feeding vapor of a Tetrakis Diethylamino Titanium (TDEAT) precursor and ammonia (NH3) gas into the reaction chamber, wherein a ratio of a vaporization rate of the TDEAT precursor to a flow rate of the ammonia gas is a value in the range of 1 mg/min:20 sccm to 1 mg/min:100 sccm; maintaining an atmosphere in the reaction chamber at a pressure in the range of 0.5 to 3.0 Torr; and heating the substrate to a temperature in the range of 300 to 400 degrees Celsius (° C.).Type: GrantFiled: August 8, 2001Date of Patent: August 24, 2004Assignee: Jusung Engineering Co., Ltd.Inventors: Byoung-Youp Kim, Hyung-Seok Kim
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Patent number: D498802Type: GrantFiled: January 16, 2003Date of Patent: November 23, 2004Inventor: Yen-Li Chang
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Patent number: D499487Type: GrantFiled: October 29, 2003Date of Patent: December 7, 2004Assignee: Victhom Human Bionics Inc.Inventors: Stéphane Bédard, Marc-Olivier Imbeau