Patents Represented by Attorney Timothy J. Keefer
  • Patent number: 6513263
    Abstract: The ventilator is used to ventilate an offset pocket in the drying section of a papermaking machine. The papermaking machine comprises a row of spaced-apart upper drying rolls and a row of spaced-apart lower drying rolls. It also comprises two rows of spaced-apart felt rolls disposed intermediate the upper drying rolls and the lower drying rolls, respectively, and a paper web intermittently carried by two felts entrained over the upper drying rolls and over the lower drying rolls, respectively. The ventilator comprises a ventral face and a dorsal face. The ventral face comprises at least one ventral orifice disposed adjacent to the felt and the dorsal face comprises at least one dorsal orifice disposed adjacent to a combined draw of felt and paper web.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: February 4, 2003
    Assignee: Enerquin Air Inc.
    Inventor: Rémi Turcotte
  • Patent number: 6500718
    Abstract: An method for fabricating a semiconductor device reduces a size of a MOSFET by self aligning a gate electrode with a device isolation insulation film. Thus, the gate electrode is not overlapped with the device isolation insulation film, differently from a conventional method for forming a MOSFET by partially overlapping the gate electrode with the device isolation insulation film in consideration of misalignment and CD variations in a mask process. As a result, a size of the MOSFET is reduced, thereby efficiently achieving the high integration of the semiconductor device.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: December 31, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: 6484624
    Abstract: A grill device includes an upper grill unit pivoted to a lower grill unit so as to rotate about an axis between an open position, and a closed position, in which, the upper and lower grill units cooperatively define a cooking space therebetween. A seasoning supplying unit includes a vessel mounted in the cooking space to receive a body of seasonings in liquid form, and a thermal conductive dispenser. The thermal conductive dispenser is extendible into the vessel when the upper grill unit is positioned at the closed position, and defines a plurality of channels. Each of the channel has an inlet that is immersed in seasonings in the vessel, and an outlet that is exposed from the vessel when the upper grill unit is positioned at the closed position.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 26, 2002
    Assignee: Eupa International Corporation
    Inventor: Tsan-Kuen Wu
  • Patent number: 6487712
    Abstract: Disclosed is a method of manufacturing a mask for conductive wirings in a semiconductor device, wherein the conductive wirings are formed on a semiconductor substrate of the semiconductor device, comprising the steps of: (a) calculating data for the entire regions of the semiconductor substrate on which the conductive wirings are formed; (b) reading the size, shape and position of the conductive wiring patterns for the conductive wirings to generate data for conductive wirings, and storing the generated conductive wirings data; (c) extending the conductive wirings data by a predetermined size to generate data for the extended conductive wirings; (d) subtracting the extended conductive wirings data from the data for the entire regions of the semiconductor substrate to calculate a differential data between the extended conductive wirings data and the entire regions data, and to generate data for dummy conductive wiring pattern; (e) adding the conductive wirings data to the dummy conductive wiring pattern data t
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: November 26, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: 6482695
    Abstract: Disclosed is a method for fabricating a semiconductor device including stacked capacitors on a semiconductor substrate having a logic circuit region formed with a circuit and a RAM cell region formed with a plurality of transistors, involving the steps of forming an insulating film to a thickness corresponding to a height of stacked capacitors, to be formed, over an upper surface of the semiconductor substrate, partially removing the insulating film from the RAM cell region, thereby forming a space in which the stacked capacitors are to be formed, forming the stacked capacitors in the space, and partially removing the insulating film from the logic circuit region, and forming interconnection lines for the logic circuit in a space defined in the logic circuit region by virtue of the removal of the insulating film. In accordance with this method, steps formed during the formation of capacitors are removed prior to subsequent processing steps for forming layers over those capacitors.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: November 19, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: 6481018
    Abstract: In a firefighter's protective garment, having a detachable outer flame-resistant shell and an inner thermal, i.e. heat, protective liner, the neck portion of the liner extending upright beyond an over-the-neck portion of the shell and fastening on the outside of the neck portion of the shell, such that the whole of the neck of a firefighter is protected by both a heat protective material and a fire protective material.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: November 19, 2002
    Assignee: Innotex Inc.
    Inventors: Marie Gagnon, Jef Stewart
  • Patent number: 6465492
    Abstract: A heterocyclic compound has the following formula (I) wherein Y represents a substituted or unsubstituted ethylene group or a trimethylene group, W represents the group —SO2R1, X represents an oxygen atom or sulfur atom or the group —NR2 or —CHR3, R represents a hydrogen atom or a methyl group and Z represents a pyridyl group.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: October 15, 2002
    Assignee: Sinon Corporation
    Inventors: Chun-Lin Yeh, Chien-Hsing Chen
  • Patent number: 6464993
    Abstract: The present invention relates to the use of a composition comprising: 10 to 90% by weight, preferably 10 to 50% by weight and particularly preferably 10 to 40% by weight of an isostearyl glycoside with a degree of polymerization of between 1 and 3; and 90 to 10% by weight, preferably 90 to 50% by weight and particularly preferably 90 to 60% by weight of isostearyl alcohol as an agent for improving the water resistance of a cosmetic composition.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: October 15, 2002
    Assignee: Societe d'Exploitation de Produits pour les Industries Chimiques-Seppic
    Inventors: Alain Milius, Nelly Michel, Bernard Branco, Jean-Pierre Boiteux, Chantal Almaric, Alicia Roso
  • Patent number: 6458496
    Abstract: A blank for a halftone phase shift photomask in the present invention comprises a transparent substrate and a halftone phase shift film provided thereon, and said halftone phase shift film has a multilayer construction in which at least a first layer capable of being etched with a chlorinated gas and a second layer capable of being etched with a fluorinated gas are disposed in this order from the side near said transparent substrate. A film made of tantalum silicides is suitable to use as the second layer of the halftone phase shift film.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: October 1, 2002
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Toshiaki Motonaga, Toshifumi Yokoyama, Takafumi Okamura, Yoshinori Kinase, Hiroshi Mohri, Junji Fujikawa, Hiro-o Nakagawa, Shigeki Sumida, Satoshi Yusa, Masashi Ohtsuki
  • Patent number: 6454348
    Abstract: A foldable chair assembly includes front and rear leg rods, sleeve members sleeved slidably and respectively on the leg rods, a fabric seat connected to the sleeve members, a fabric backrest connected to the rear leg rods, and four foldable cross-frames connected pivotally to the leg rods and the sleeve members. Each of a pair of armrest rods is connected pivotally to one of the front leg rods at one end, and is connected movably to one of the rear leg rods at the other end.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: September 24, 2002
    Inventor: Chung-Sen Wu
  • Patent number: 6448134
    Abstract: Disclosed is a method for fabricating a semiconductor device including stacked capacitors, in which dummy plate electrodes and charge storage electrodes are formed at a region other than a memory cell region, to control a topology resulting from capacitors, thereby allowing fine interconnection lines to be formed after the formation of those capacitors. In accordance with this method, dummy plate electrodes and charge storage electrodes, each of which has the same height as that of the stacked capacitor, are formed at the logic circuit region when the stacked capacitor are formed at the memory cell region.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: September 10, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: 6444383
    Abstract: The present invention provides an image receiving sheet applicable to an over head projector (OHP) and a process for forming an OHP image. The image receiving sheet is capable of forming a yellow image providing a parallel-ray transmittance (Y) of 50% or more when the transmittance density (X) is in a range from 0 to 1.0 by electrophotography. The image receiving sheet is capable of forming a yellow image providing a haze value (Z) of 40% or less when the transmittance density (X) is in a range from 0 to 1.0 by electrophotography.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: September 3, 2002
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Nobuho Ikeuchi, Masafumi Hayashi
  • Patent number: 6441478
    Abstract: A semiconductor package including a semiconductor chip having bonding pads respectively arranged in a line adjacent to four sides of the upper surface; gold bumps formed on each bonding pad; a glass substrate which is made by forming metal patterns, the metal pattern including an inner pattern electrically connected to the bonding pad of the semiconductor chip through the gold bumps, an outer pattern, and a connecting pattern between the inner pattern and the outer pattern: a Dam having a frame-shape on the connecting pattern and surrounding the inner patterns; sealing material sealing the space between the glass substrate around the semiconductor chip and solder balls attached on the outer patterns of each metal pattern.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: August 27, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Kye Chan Park
  • Patent number: 6435121
    Abstract: A holding and guiding device for a mooring chain, mounted pivotally about a vertical axis (5) and having an integrated chain stopper (2) mounted above the glide track (4) on top of the fairlead. The glide track (4) has a longitudinal slot (11) providing room for the standing links (9) of the chain and has flat parts (3) supporting the lying links (8) of the chain in order to avoid that these become subjected to bending moments when the chain is loaded. In the middle of the flat parts (3) the glide track has deviations (12) providing room for the welds of the chain. Between the flat parts (3) the glide track (4) is evenly rounded in the longitudinal direction. The slot (11) of the glide track has one or more shallower parts which, when the chain is pulled in, force the standing links (9) outwards so that they in turn lift the ends of the lying links (8) of the chain away from the glide track (4).
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: August 20, 2002
    Assignee: Maritime Pusnes AS
    Inventor: Knut T. Siring
  • Patent number: 6433376
    Abstract: The disclosed semiconductor device comprises a semiconductor substrate, a logic circuit area formed on the semiconductor substrate, the logic circuit area includes transistors for driving bit lines, and a ferroelectrics memory area laminated on the logic circuit area and including a transistor area and a capacitor area. Also the disclosed method of fabricating the semiconductor device comprises the steps of forming a logic circuit area on a semiconductor substrate, the logic circuit area includes interconnection wirings connected to transistors for driving bit lines, forming bit lines electrically connected to the interconnection wirings at the upper side thereof, forming a silicon film connected to the bit lines at the upper side thereof and defining a cell forming area, forming transistors on the silicon film, each transistor including a gate electrode, a source electrode, and a drain electrode, and forming capacitors electrically connected to the source electrodes at the upper side of the transistor.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: August 13, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: 6427969
    Abstract: A vacuum processing device has at least one vacuum processing unit, which includes a housing defining a vacuum chamber, and a gate valve assembly. The valve assembly includes a lid plate. for covering an opening in the housing, and a connecting member connected fixedly to a rotating shaft. Each of several aligned adjustment rods connects the plate to the connecting member, and is disposed perpendicular to the plate. A plurality of resilientunits biases the plate away from the connecting member to press against a wall of the housing, which defines the opening. A plurality of adjusting units are movable respectively on the rods to vary the distance between a portion of the plate and a portion of the connecting member, which are interconnected by the respective one of the rods, so that the plate can be pressed entirely against the wall of the housing.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: August 6, 2002
    Assignee: Helix Technology Inc.
    Inventors: Sung-Peng Ho, Meng-Ju Chou, Chao-Ming Su
  • Patent number: 6413816
    Abstract: A method for fabricating a semiconductor memory device. The method includes providing a semiconductor substrate where a transistor has been formed; forming a bit line electrically connected to a second contact plug on a drain region and forming a contact hole exposing a first contact plug on a source region; forming an etch barrier film having a uniform thickness at the inner walls of the contact hole and on the bit line; forming an interlayer insulation film; forming a storage electrode contact by etching the interlayer insulation film and the etch barrier film on the first contact plug; forming a third contact plug electrically connected to the first contact plug in the storage electrode contact; and forming on the third contact plug a capacitor having a stacked structure of a storage electrode, and a dielectric film and a plate electrode surrounding the storage electrode.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: July 2, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: 6412192
    Abstract: The device (10) and method are used for ventilating an offset pocket space (12) located in a drying section of a papermaking machine by injecting air from at least one heated dry air supply inlet (11). The offset pocket space (12) is situated between three axially-parallel drying cylinders (20) over which consecutively runs a paper web (14). A first and a third of these cylinders (20) are vertically spaced from a second one. The paper web (14) is pressed against the first and the third cylinder (20) by a felt (16) which further runs around a felt roll (26) having a rotation axis parallel to that of the cylinders (20). The felt roll (26) is disposed between the three cylinders (20) in an offset position which is closer to the first cylinder (20) than the third cylinder (20).
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: July 2, 2002
    Assignee: Enerquin Air Inc.
    Inventors: Normand Boucher, Jean Desharnais, Dominique Thifault, Rémi Turcotte
  • Patent number: 6376307
    Abstract: A method for fabricating NOR type memory cells of a nonvolatile memory device, floating gate insulating film, a floating gate electrode, a control gate insulating film, a control gate electrode, and an insulating film sequentially stacked in the shape of pattern on each of memory cell regions of a semiconductor substrate defined by an isolation film are formed; a source electrode and a drain electrode are formed in portions of the semiconductor substrate exposed at both sides of the gate electrode, a first etching barrier film is formed on the resultant; a first interlayer insulating film is formed on the first etching barrier film in a planarized fashion; a desired portion of the first interlayer insulating film is etched to form a first contact hole exposing the source and drain electrodes; a first conductive film in a planarized fashion is formed on the resultant to bury the first contact hole; the first conductive film is etched to form a source electrode line contacting the source electrode and a contact
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: April 23, 2002
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Kap Kim
  • Patent number: D461961
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: August 27, 2002
    Inventor: Barnabas C. Chen