Abstract: A reference signal input of a delay locked loop is connected to receive a reference clock. The delay locked loop provides a drive clock that drives a clock distribution tree. One of the endpoints of the clock distribution tree is connected to a feedback reference of the delay locked loop. By using one the endpoints as a feedback loop to the delay locked loop the signal received at components attached to the endpoints of the distribution tree can be synchronized to the reference input received at the delay locked loop.

Abstract: There is disclosed a bus interface unit for transferring data between a plurality of bus devices. The bus interface unit comprises: 1) a first bus device interface comprising: a) a first incoming request bus for receiving request packets from a first one of the plurality of bus devices; b) a first outgoing request bus for transmitting request packets to the first bus device; c) a first incoming data bus for receiving data packets from the first bus device; and d) a first outgoing data bus for transmitting data packets to the first bus device; and 2) a second bus device interface comprising: a) a second incoming request bus for receiving request packets from a second one of the plurality of bus devices; b) a second outgoing request bus for transmitting request packets to the second bus device; c) a second incoming data bus for receiving data packets from the second bus device; and d) a second outgoing data bus for transmitting data packets to the second bus device.

Abstract: A test socket (600) includes first (602) and second (606) test leads and a first electrically conductive member (604). The first test lead is adapted to contact a first external inductor terminal of an integrated circuit (706). The second test lead (606) is adapted to contact a second external inductor terminal of the integrated circuit (706). The first electrically conductive member (604) extends between the first test lead (602) and the second test lead (606), thereby forming an inductance loop between the first external inductor terminal and the second external inductor terminal.

Abstract: A distance measuring device and photosensor circuit are disclosed herein. By pulsing a light source such as an LED to illuminate an object and measuring the phase difference between the light reflected from the object and the original phase of the light source, the distance to an object may be determined. In order to measure the phase difference, a CMOS photosensor or photosensor array may be used to receive the reflected light and store charge generated during different portions of time in different storage nodes or pixel cells. The difference between the amount of charge stored in different storage nodes can be used to determine the phase difference between the original light illuminating the object and the light reflected from the object. This phase difference can in turn be used to determine the distance to the object.

Abstract: A system and methods are provided for a controlled transfer of a portion of a data stream between a digital storage media and a corresponding stream decoder. A data stream stored in digital storage media is accessed through an application. A FIFO is used to provide a buffer to the stream decoder. The application monitors the FIFO to determine when to send data related to the data stream from the digital storage media. The data is transferred to the buffer and passed to the stream decoder. A counter is used for dictating a period of time between sending segments of the data stored in the FIFO to the stream decoder. The rate of transfer to the stream decoder is adjusted through the counter to match a desired bit-rate associated with the data stream.

Abstract: A delay locked loop (DLL) circuit having gain control is presented. The DLL circuit includes a bias generator responsive based on an error signal to produce first and second bias voltages to control a plurality of differential delay elements. The bias generator includes a bias current generator having a fixed voltage-controlled current source and a dynamic voltage-controlled current source to generate a bias current, and a bias voltage generator for receiving the bias current and generating first and second bias voltages. The bias generator can generate multiple current levels in different modes of operation. Each of the current levels of the bias generator allows a small range of currents and therefore small values of gain factors (KVCDL). Low KVCDL values leads to lower jitter and better control over feedback stability, resulting in an increase in the range of operational frequencies.

Abstract: A method for forming semiconductor features, e.g., gates, line widths, thicknesses and spaces, produced by a photoresist trim procedure, in a closed loop process is presented. The methodology enables the use of optical emission spectroscopy and/or optical interferometry techniques for endpoint monitoring during resist trim etching of photoresist structures. Various types of material layers underlying photoresist structures are employed in order to provide an endpoint signal to enable closed loop control, with resultant improved targeting of photoresist mask and reproducibility. In addition, the method provides for in situ etch rate monitoring, and is not adversely affected by etch rate variances within an etching chamber during an etch process.

Abstract: In accordance with a specific aspect of the present invention, a compressed video stream, such as an MPEG-2 video stream, is received by a transport demultiplexor, synchronized, parsed into separate packet types, and written to buffer locations external the demultiplexor. Adaptation field is handled by a separate parser. In addition, primary elementary stream data can be handled by separate primary elementary stream parsers based upon the packet identifier of the primary elementary stream. Video packets can be parsed based upon stream identifier values. Specific packets of data are stored in one or more system memory or video memory buffers by an output controller based upon allocation table information. Private data associated with specific elementary streams or packet adaptation fields are repacketized, and written to an output buffer location. In specific implementations, the hardware associated with the system is used to acquire the data stream without any knowledge of the specific protocol of the stream.

Abstract: A method of depositing a coating is disclosed, which method calls for providing a substrate, and thermally spraying a ceramic powder thereon to form a coating. The ceramic powder has a garnet crystal structure phase, and the thermal spraying in turn forms a coating on the substrate that includes a garnet crystal structure phase.

Abstract: A method for fabricating sidewall spacers in the manufacture of an integrated circuit device is disclosed. A dielectric spacer layer is formed over the semiconductor substrate. The dielectric spacer layer is etched prior to forming a layer subsequent to the dielectric layer, to form an L-shaped spacer. In another embodiment, a structure is formed on a substrate, the structure having a sidewall portion that is substantially orthogonal to a surface of the substrate. A dielectric layer is formed over the substrate. A spacer is formed over a portion of the dielectric layer and adjacent to the sidewall portion of the structure, wherein at least a portion of the dielectric layer over the substrate without an overlying oxide spacer is an unprotected portion of the dielectric. At least a part of the unprotected portion of the dielectric layer is removed. An intermediate source-drain region can be formed beneath a portion of the L-shaped spacer by controlling the thickness and/or the source drain doping levels.

Abstract: A method of forming a component is disclosed. The method includes: providing a core containing a porous material; infiltrating the core with silicon carbide; and removing the porous material of the core, thereby forming a porous substrate containing silicon carbide.

Abstract: A system and methods are shown for improved processing of motion compensated video. A software driver handles image data related to motion compensated video. The image data includes IDCT coefficients and motion compensation vector data. A unique identifier is attached to the image data, preserving the relationship between the IDCT coefficients and motion compensated vector data related to an image block. The software driver sends the IDCT coefficients to an IDCT component. The IDCT coefficients are processed and an interrupt is sent to the software driver including the unique identifier of the processed IDCT coefficients. The software driver sends the motion compensation vector data related to the unique identifier in the interrupt. A 3D pipe receives the motion compensation vector data and reads the corresponding processed IDCT data.

Abstract: A thin GaAs Substrate can be provided with a copper back-metal layer to allow the GaAs Substrate to be packaged using conventional plastic packaging technologies. By providing the GaAs Substrate with a copper back-metal layer, the GaAs Substrate can be made thinner than 2 mils (about 50 microns), thereby reducing heat dissipation problems and allowing the semiconductor die to be compatible with soft-solder technologies. By enabling the semiconductor die to be packaged in a plastic package substantial cost savings can be achieved.

Abstract: A wireless handset is provided with enhanced features and capabilities. The wireless handset may be embodied as a full-featured handset that is capable of operating either within a wireless network (such as a cellular or PCS network) or in a direct handset-to-handset communication mode that is independent of the wireless network. Alternatively, the wireless handset may be embodied as a special purpose handset, that is capable of simply operating in a direct handset-to-handset communication mode. The wireless handset may additionally include features for supporting and enhancing direct communication between handsets. Such features may include a find feature that permits a user to determine which objects, including other wireless handset users, are located within a predetermined operating range of the wireless handset. A memorize feature may also be provided to permit handsets and other objects exchange information by wireless transmission.

Abstract: A resonant circuit includes a transmission line in parallel with a varactor diode. The varactor diode has a capacitance that is variable in response to an applied voltage, which allows for real time impedance matching, attenuation control, and/or compensation for tolerances of other components. The resonant circuit is used with a quarter wavelength transmission line to provide impedance transformation and matching between multiple ports. A high frequency switch provides low current consumption, improved impedance matching, relatively low insertion losses, and excellent isolation between ports.

Abstract: A system and methods are provided for resolving resource conflicts related to processing multiple media streams on a single media device. An audio/video (A/V) server is used to interconnect a plurality of media devices. A first multimedia program is routed from a first source device to a first destination device. The A/V server detects a conflict when a second source device attempts to route a second multimedia program to the first destination device. To resolve the conflict, the A/V server determines suitable media devices to process the second multimedia program. The A/V server may send the second program to a second destination device to process the second program in the same manner as the first destination device. Alternatively, the A/V server may send the second program to a destination device capable of recording the second program.

Abstract: A phase locked loop (PLL) circuit adjusts a voltage controlled differential oscillator to generate an output frequency signal that is a selected multiple of an input reference signal. An oscillator control circuit increases and decreases the output frequency signal. A frequency detector detects a phase shift between the reference signal and the PLL output signal and produces an error signal. In response to the error signal, a fast lock circuit detects when the output frequency signal passes the selected multiple of the reference signal.

Abstract: A memory array of one-transistor (1T) SONOS bit cells in a common-source architecture is used in conjunction with a reverse read technique to reduce the effect of read disturb. Bit line voltage in the array, during read operation, is constrained to a Vt or less, relative to the control gate, so that read disturb is limited. When information is programmed into a bit cell in the array, the bit line is used as a drain, which has the effect of concentrating charge toward the bitline end of the SONOS transistor. When information is read from a bit cell in the array, the bit line of the selected bit cell is used as a source, instead of a drain. That reversal gives a larger Vt contrast between a 0 and a 1 than a forward read, for a given amount of stored charge.

Abstract: A device and method for imparting movement to a selected line are disclosed. A device incorporating teachings of the present invention may include a motion arm extending through an opening in the housing of the device. The arm may be coupled to a connection clip that can grip a selected line. The selected line may include, for example, twisted pair, coaxial cable, optical cable, shielded high-gauge wire, etc. In some embodiments, the arm of the device is coupled to a motion generator that imparts movement to the motion arm in at least one direction. In operation, the imparted movement may be conveyed through the motion arm and the connection clip to the selected wire.