Patents Represented by Attorney Tutunjian & Bitetto, P.C.

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  • Electrical fire prevention from over-temperature conditions
    Patent number: 7808760
    Abstract: An electrical device including a heat sensing circuit interrupter to enable a load to be selectively coupled to or disconnected from a power source in accordance with a level of a sensed temperature includes a relay assembly operable between a closed state when the sensed temperature is below a predetermined limit temperature, thereby enabling the coupling of the load to the power source, and an open state when the sensed temperature is above the predetermined limit temperature, thereby electrically disconnecting the load from the power source. The device further includes a sensor assembly including a light source operatively associated with a light sensor. The light sensor is configured to be sensitive to specific levels of the sensed temperature and the light source is configured to emit light along a plurality of optical paths at any one of a plurality of wavelengths sensitive to temperature.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: October 5, 2010
    Inventor: Robert Z. Kopelman
  • System and method for glitch analysis in circuits
    Patent number: 7809542
    Abstract: A system and method for analyzing power glitch in circuits includes simulating a circuit to provide waveform responses at positions of interest in the circuit. Each waveform response is processed to determine glitch power by comparing optimal energy to actual energy for the waveform. The circuit is adjusted to reduce loss due to the glitch power.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Ryan Bazinet, James Scott Neely
  • Overpressure safety apparatus of gas fuel container
    Patent number: 7793686
    Abstract: An overpressure safety apparatus having a fuel container body and a mounting cap includes a main housing coupled to the mounting cap, the main housing having an elbow-shaped gas introducing passage, a valve stem disposed in the main housing through the mounting cap. The valve stem is provided with an orifice, an opening/closing seal inserted between a top of the main housing and the mounting cap to selectively open/close the orifice of the valve stem. A sub-housing is connected to a bottom of the main housing, and has a branch line communicating with the gas introducing passage and a receiving cavity with a bottom communicating with the branch line and a top communicating with an exhausting hole formed on the mounting cap. A safety valve is disposed in the receiving cavity to selectively open the branch line in response to variations of internal pressure of the container.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: September 14, 2010
    Inventor: Young-Seok Lee
  • Systems and methods for fast and memory efficient machine translation using statistical integrated phase lattice
    Patent number: 7797148
    Abstract: A phrase-based translation system and method includes a statistically integrated phrase lattice (SIPL) (H) which represents an entire translational model. An input (I) is translated by determining a best path through an entire lattice (S) by performing an efficient composition operation between the input and the SIPL. The efficient composition operation is performed by a multiple level search where each operand in the efficient composition operation represents a different search level.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Stanley Chen, Yuqing Gao, Bowen Zhou
  • Multi-tap decision feedback equalizer (DFE) architecture eliminating critical timing path for higher-speed operation
    Patent number: 7792187
    Abstract: A decision feedback equalizer (DFE) and method include summer circuits to add a dynamic feedback signal representing a dynamic feedback tap to a received input and to speculate on a speculative tap. Data slicers are configured to receive outputs of the summer circuits and sample the outputs of the summer circuits. First multiplexers are included, each of which is configured to receive a first input from a corresponding data slicer. Second multiplexers are included, each of which is configured to receive an output of a plurality of the first multiplexers. The second multiplexers have an output fed back to a second input of the first multiplexers, and the second multiplexer output is employed to provide a select signal for a second multiplexer on a different section of the DFE and to drive the dynamic feedback signal to a summer circuit on a same section of the DFE.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventor: John F. Bulzacchelli
  • Implementing instruction set architectures with non-contiguous register file specifiers
    Patent number: 7793081
    Abstract: There are provided methods and computer program products for implementing instruction set architectures with non-contiguous register file specifiers. A method for processing instruction code includes processing a fixed-width instruction of a fixed-width instruction set using a non-contiguous register specifier of a non-contiguous register specification. The fixed-width instruction includes the non-contiguous register specifier.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Robert Kevin Montoye, Brett Olsson, John-David Wellman
  • Defect-free hybrid orientation technology for semiconductor devices
    Patent number: 7790522
    Abstract: A semiconductor device includes a semiconductor material having two crystal orientations. The semiconductor material forms an active area of the device. A device channel is formed on the two crystal orientations, which include a first region formed in a first crystal orientation surface of the semiconductor material, and a second region formed in a second crystal orientation surface of the semiconductor material wherein the first crystal orientation surface forms an angle with the second crystal orientation surface and the device channel covers at least an intersection of the angle.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Louis C. Hsu, Rajiv V. Joshi, Xu Ouyang
  • Interchangeable handbag carry system
    Patent number: 7789114
    Abstract: An interchangeable handbag system includes a stand alone foundation handbag having an inner storage accommodating surface and an outer decorative surface. The foundation handbag may have regions, such as a hollow interior, front panel, a rear panel and a bottom panel connected by at least one edge to form a hollow container open at a top end thereof. Alternately the foundation handbag may be a simple flexible open-top container with a closed bottom, where the hollow interior, front and rear regions are part of the continuous container. The handbag system includes one or more reversible and/or non-reversible outer slip covers that fit over the foundation bag in a nested arrangement. The slip covers may fit over all and/or alternately a portion of the foundation bag and/or another slip cover. The slip covers and foundation bag are connected by one and/or multiple fastening structures.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: September 7, 2010
    Assignee: I O Bag Inc.
    Inventors: Susan Pace, Laurie McFadden
  • System and method for achieving deferred invalidation consistency
    Patent number: 7783602
    Abstract: In a system having a plurality of caches, a method for maintaining cached objects includes storing an object in a plurality of caches. In response to a request to update the object, a future invalidation time is determined when the object should be invalidated in caches currently storing the object. Updating of the object is delayed until the invalidation time has passed.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: August 24, 2010
    Assignee: International Business Machines Corporation
    Inventors: Arun Kwangil Iyengar, Richard P. King, Daniela Rosu, Karen Witting
  • Systems and methods for predicting wait time for service transactions
    Patent number: 7778937
    Abstract: Systems and methods are provided to automatically predict wait times for customers to obtain service transactions at a service establishment, wherein wait times are estimated based on a combination of wait time values determined from current and historical service information that is collected, stored and processed over time.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Filomena Ferrara, Luca Landi
  • Defect-free hybrid orientation technology for semiconductor devices
    Patent number: 7777306
    Abstract: A semiconductor device includes a semiconductor material having two crystal orientations. The semiconductor material forms an active area of the device. A device channel is formed on the two crystal orientations, which include a first region formed in a first crystal orientation surface of the semiconductor material, and a second region formed in a second crystal orientation surface of the semiconductor material wherein the first crystal orientation surface forms an angle with the second crystal orientation surface and the device channel covers at least an intersection of the angle.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Louis C. Hsu, Rajiv V. Joshi, Xu Ouyang
  • Phase-locked loop circuits and methods implementing pulsewidth modulation for fine tuning control of digitally controlled oscillators
    Patent number: 7772900
    Abstract: PLL (phase locked loop) circuits and methods are provided in which PWM (pulse width modulation) techniques are to achieve continuous fine tuning control of DCO (digitally controlled oscillator) circuits. In general, pulse width modulation techniques are applied to further modulate dithered control signals that are used to enhance the frequency tuning resolution of the DCO such that the dithered control signals are applied to the fractional tracking control port of the DCO for a selected fraction of a full clock signal based pulse width modulation applied.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: August 10, 2010
    Assignee: International Business Machines Corporation
    Inventors: Herschel A. Ainspan, Daniel J. Friedman, Alexander V. Rylyakov, Jose A. Tierno
  • Method for manufacturing a lift assembly
    Patent number: 7765671
    Abstract: Methods for manufacturing and installing a lift assembly having an extension plate and a lift with an adjustable platform are described.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: August 3, 2010
    Assignee: Maxon Lift Corporation
    Inventors: Karapet Ablabutyan, Akop Gasparian
  • Method for lithography for optimizing process conditions
    Patent number: 7767385
    Abstract: A method of lithography is disclosed, which allows for independent resist process optimization of two or more exposure steps that are performed on a single resist layer. By providing for a separate post-exposure bake after each resist exposure step, pattern resolution for each exposure can be optimized. The method can generally be used with different lithographic techniques, and is well-suited for hybrid lithography. It has been applied to the fabrication of a device, in which the active area and the gate levels are defined in separate mask levels using hybrid lithography with an e-beam source and a 248 nm source respectively. Conditions for post-exposure bakes after the two exposure steps are independently adjusted to provide for optimized results.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: August 3, 2010
    Assignee: International Business Machines Corporation
    Inventors: Carl E. Larson, Sharee J. McNab, Steven E. Steen, Raman G. Viswanathan, Gregory M. Wallraff
  • Adaptive profiling by progressive refinement
    Patent number: 7761854
    Abstract: A system/method for profiling a sequence of values from a range to determine a frequency of occurrence of a subrange includes, for a current block, determining whether cells of the current block include a count cell or a pointer cell. If the cell includes a pointer cell, follow an address that the pointer makes reference to and designate a new block as the current block and repeat the determining step for the new block. If the cell includes a count cell, increment the count cell and compare the incremented count cell to a threshold. If the count exceeds the threshold, convert the count cell to a pointer cell, which points to a newly allocated block. The newly allocated block is made the current block, and the steps are repeated until count cells do not exceed the threshold or a limit resolution is achieved.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: July 20, 2010
    Assignee: International Business Machines Corporation
    Inventor: Michel Henri Theodore Hack
  • Phase-locked loop circuits and methods implementing multiplexer circuit for fine tuning control of digitally controlled oscillators
    Patent number: 7750701
    Abstract: Circuits and methods are provided in which fine tuning control of a DCO (digitally controlled oscillator) circuit in a digital PLL circuit is realized by dither controlling a multiplexer circuit under digital control to selectively output one of a plurality of analog control voltages with varied voltage levels that are input to a fractional frequency control port of the DCO to drive tuning elements of the DCO at fractional frequency resolution and achieve continuous fine tuning of the DCO under analog control.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Herschel A. Ainspan, Daniel J. Friedman, Alexander V. Rylyakov, Jose A. Tierno
  • Half-select compliant memory cell precharge circuit
    Patent number: 7751267
    Abstract: A programmable precharge circuit includes a plurality of transistors. Each transistor has a different threshold voltage from other transistors of the plurality of transistors. Each transistor is configured to connect a supply voltage to a node, and the node is selectively coupled to bitlines in accordance with a memory operation. Control logic is configured to enable at least one of the plurality of transistors to provide a programmable precharge voltage to the node in accordance with a respective threshold voltage drop from the supply voltage of one of the plurality of transistors.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Rajiv V. Joshi, Rouwaida Kanj, Jayakumaran Sivagnaname
  • Device and method for fabricating double-sided SOI wafer scale package with optical through via connections
    Patent number: 7736949
    Abstract: A semiconductor package includes an SOI wafer having a first side including an integrated circuit system, and a second side, opposite the first side, forming at least one cavity. At least one chip or component is placed in the cavity. An optical through via is formed through a buried oxide which optically connects the chip(s) to the integrated circuit system.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: June 15, 2010
    Assignee: International Business Machines Corporation
    Inventors: Howard Hao Chen, Louis Lu-Chen Hsu
  • Method and apparatus for assigning candidate processing nodes in a stream-oriented computer system
    Patent number: 7738129
    Abstract: A method of choosing jobs to run in a stream based distributed computer system includes determining jobs to be run in a distributed stream-oriented system by deciding a priority threshold above which jobs will be accepted, below which jobs will be rejected. Overall importance is maximized relative to the priority threshold based on importance values assigned to all jobs. System constraints are applied to ensure jobs meet set criteria.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: June 15, 2010
    Assignee: International Business Machines Corporation
    Inventors: Nikhil Bansal, James R. H. Challenger, Lisa Karen Fleischer, Oktay Gunluk, Kirsten Weale Hildrum, Richard P. King, Deepak Rajan, David Tao, Joel Leonard Wolf, Laura Wynter
  • Method and system for on-line performance modeling using inference for real production IT systems
    Patent number: 7739099
    Abstract: A system and method for performance modeling for an information technology (IT) system having a server(s) for performing a number of types of transactions includes receiving data for system topology and transaction flows and receiving performance measurement data for the IT system. The measurement data is clustered into multiple regimes based on similarities. Service demand and network delay parameters may be inferred based on clustered data.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: June 15, 2010
    Assignee: International Business Machines Corporation
    Inventors: Zhen Liu, Honghui (Cathy) Xia, Fan Zhang, Li Zhang