Patents Represented by Attorney Vazken Alexanian
  • Patent number: 8084308
    Abstract: Nanowire-based devices are provided. In one aspect, a field-effect transistor (FET) inverter is provided. The FET inverter includes a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels connecting the source region and the drain region, wherein the source and drain regions of one or more of the device layers are doped with an n-type dopant and the source and drain regions of one or more other of the device layers are doped with a p-type dopant; a gate common to each of the device layers surrounding the nanowire channels; a first contact to the source regions of the one or more device layers doped with an n-type dopant; a second contact to the source regions of the one or more device layers doped with a p-type dopant; and a third contact common to the drain regions of each of the device layers. Techniques for fabricating a FET inverter are also provided.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Josephine Chang, Paul Chang, Michael A. Guillorn, Jeffrey Sleight
  • Patent number: 8085172
    Abstract: An encoding method and an encoder for encoding data transmitted in a manner of bursts via a parallel bus and a decoding method and a decoder. The encoding method includes organizing data of the bursts into matrixes, determining for each of the matrixes whether a transform mode capable of decreasing the bus transition number exists, determining that the matrix needs to be transformed, determining a transform mode for transforming the matrix, and replacing the initial matrix with the transformed matrix. Then, forming a new matrix to be transmitted from matrixes which do not need to be transformed and matrixes which have been transformed. Thereafter, first generating a transform information word indicating transform states of the respective matrixes and then attaching the transform information word to the matrix to be transmitted to form an encoded matrix for actual transmission.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Yu Li, Haibo Lin, Wen Bo Shen, Kai Zheng
  • Patent number: 8078674
    Abstract: A server device, methods and a computer program product operating in response to a request received from a client. A request storage device in system memory space with a request storage region stores a request received from a client in association with identification information. An identification information storage region contains a request that is waiting to be processed.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: December 13, 2011
    Assignee: International Business Machines Corporation
    Inventor: Takeshi Ogasawara
  • Patent number: 8078915
    Abstract: A system, a computer readable article of manufacture, and a method for verifying operation of a target system to be inspected. The system includes an abstract binary tree generation unit and a matching unit. The abstract binary tree generation unit obtains information about a functional specification of the target system and generates one or more binary trees that associate one or more states that can occur in the target system with respective nodes and that associate state transitions of objects constituting the target system and interactions between the objects with connection relationships between the nodes. The matching unit receives an event sequence in an application model of the target system obtained in response to the operation of the target system and matches the event sequence against the binary trees generated by the abstract binary tree generation unit. The method includes steps for accomplishing the functionality of the system.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: December 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Hiroaki Nakamura, Kohichi Ono
  • Patent number: 8065235
    Abstract: A portable intelligent shopping device which can be worn as a wristwatch or carried on a belt. It makes paying for purchases more secure. The device stores the wearer's private key and digital certificate. It can also store the public keys of various stores. When the wearer (shopper) buys something from a store, the store can request a payment of the appropriate amount from the wearer's watch. The authorization for payment of the amount specified by the request for payment may be transmitted using IR or RF. The watch can then display the amount and request the shopper to confirm the transaction by entering a PIN number by tapping on the touch screen or using the roller wheel. Once the correct PIN is entered, the watch can send a message to the store authorizing payment of the requested amount. The store can verify the message based on the shopper's encrypted certificate by decrypting it using the shopper's public key.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: November 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Chandrasekhar Narayanaswami, Mandayam Thondanur Raghunath
  • Patent number: 8056023
    Abstract: The manufacturability of a lithographic mask employed in fabricating instances of a semiconductor device is determined. Target edge pairs are selected from mask layout data of the lithographic mask to determine a manufacturing penalty in making the lithographic mask. The mask layout data includes polygons, where each polygon has edges, and where each target edge pair is defined by two of the edges of one or more of the polygons. The number of the target edge pairs is reduced to decrease computational volume in determining the manufacturing penalty in making the lithographic mask. The manufacturability of the lithographic mask, including the manufacturing penalty in making the lithographic mask, is determined based on the target edge pairs as reduced in number. The manufacturability of the lithographic mask is output. The manufacturability of the lithographic mask is dependent on the manufacturing penalty in making the lithographic mask.
    Type: Grant
    Filed: December 14, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Tadanobu Inoue, David O. Melville, Hidemasa Muta, Kehan Tian, Masahura Sakamoto, Alan E. Rosenbluth
  • Patent number: 8053752
    Abstract: Reconfigurable devices and methods for the fabrication thereof are provided. In one aspect, a reconfigurable device is provided.
    Type: Grant
    Filed: January 8, 2011
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Kuan-Neng Chen, Lia Krusin-Elbaum
  • Patent number: 8053782
    Abstract: A photodetector which uses single or multi-layer graphene as the photon detecting layer is disclosed. Multiple embodiments are disclosed with different configurations of electrodes. In addition, a photodetector array comprising multiple photodetecting elements is disclosed for applications such as imaging and monitoring.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Yu-Ming Lin, Thomas Mueller, Fengnian Xia
  • Patent number: 8053284
    Abstract: A method of assembling a bent circuit chip package and a circuit chip package having a bent structure. The circuit chip package includes: a substrate having a first coefficient of thermal expansion (CTE); a circuit chip, having a second CTE, mounted onto the substrate; a metal foil disposed on the circuit chip in thermal contact with the chip; a metal lid having (i) a third CTE that is different from the first CTE and (ii) a bottom edge region, where the metal lid is disposed on the metal foil in thermal contact with the metal foil; and an adhesive layer along the bottom edge of the metal lid, cured at a first temperature, bonding the lid to the substrate, producing an assembly which, at a second temperature, is transformed to a bent circuit chip package.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sushumna Iruvanti, Yves Martin, Theodore van Kessel, Xiaojin Wei
  • Patent number: 8056026
    Abstract: The manufacturability of a lithographic mask employed in fabricating instances of a semiconductor device is determined. Target edges are selected from mask layout data of the lithographic mask. The mask layout data includes polygons distributed over cells, where each polygon has edges. The cells include a center cell, two vertical cells above and below the center cell, and two horizontal cells to the left and right of the center cell. Target edge pairs are selected for determining a manufacturing penalty in making the lithographic mask, in a manner that decreases the computational volume in determining the manufacturing penalty. The manufacturability of the lithographic mask, including the manufacturing penalty in making the lithographic mask, is determined based on the target edge pairs selected. The manufacturability of the lithographic mask is output. The manufacturability of the lithographic mask is dependent on the manufacturing penalty in making the lithographic mask.
    Type: Grant
    Filed: December 14, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Tadanobu Inoue, David O. Melville, Hidemasa Muta, Kehan Tian, Masahura Sakamoto, Alan E. Rosenbluth
  • Patent number: 8028254
    Abstract: The manufacturability of a lithographic mask employed in fabricating instances of a semiconductor device is determined. Target edge pairs are selected from mask layout data of the lithographic mask, for determining a manufacturing penalty in making the lithographic mask. The mask layout data includes polygons, where each polygon has a number of edges. Each target edge pair is defined by two of the edges of one or more of the polygons. The manufacturability of the lithographic mask, including the manufacturing penalty in making the lithographic mask, is determined. Determining the manufacturing penalty is based on the target edge pairs as selected. Determining the manufacturability of the lithographic mask uses continuous derivatives characterizing the manufacturability of the lithographic mask on a continuous scale. The manufacturability of the lithographic mask is output. The manufacturability of the lithographic mask is dependent on the manufacturing penalty in making the lithographic mask.
    Type: Grant
    Filed: December 14, 2008
    Date of Patent: September 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Tadanobu Inoue, David O. Melville, Hidemasa Muta, Kehan Tian, Masaharu Sakamoto, Alan E. Rosenbluth
  • Patent number: 8020390
    Abstract: Energy-efficient data center cooling techniques that utilize free cooling and/or solar cooling are provided. In one aspect, a cooling system is provided including a cooling tower; one or more modular refrigeration chiller units; and a water loop that can be selectively directed through the cooling tower, through one or more of the modular refrigeration chiller units or through a combination thereof. Another cooling system is provided including a solar cooling unit; one or more modular refrigeration chiller units; and a water loop that can be selectively directed through the solar cooling unit, through one or more of the modular refrigeration chiller units or through a combination thereof.
    Type: Grant
    Filed: June 6, 2009
    Date of Patent: September 20, 2011
    Assignee: International Business Machines Corporation
    Inventors: Hendrik F. Hamann, Madhusudan K. Iyengar, Theodore G. van Kessel
  • Patent number: 8018312
    Abstract: An inductor and method of operating the inductor by combining primary and secondary coils with passive coupling, active parallel, or active cross-coupling structures. The first includes at least one passive coupling structure having at least one coupling coil arranged between a primary coil and at least one of the secondary coils and/or between two of the secondary coils. The second includes an active coupling structure arranged between a primary coil and at least one secondary coil and/or between at least two of the secondary coils, to selectively parallel couple the primary coil and one of the secondary coils and/or at least two of the secondary coils. The third includes an active coupling structure to selectively cross couple a primary coil and at least one of the secondary coils and/or to selectively cross couple at least two of the secondary coils.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Marcel A. Kossel, Thomas E. Morf, Martin Leo Schmatz, Jonas R. Weiss
  • Patent number: 8020041
    Abstract: A method and a computer system for making a computer achieve high availability. The method includes running a host virtual machine on a host virtual machine container; running a servant virtual machine on the servant virtual machine container; and synchronizing the host virtual machine and the servant virtual machine by using an I/O instruction. The system includes at least two computers including a host computer and a servant computer, each computer including a virtual machine container; a virtual machine running on the virtual machine container; and a communication channel making the virtual machine container execute a virtual machine synchronization operation. The virtual machine synchronization operation of the virtual machine container is triggered by the virtual machine executing I/O instructions.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jian Huang, Jin Ling, Yin Ben Xia, Zhe Xiang, Jian Ming Zhang
  • Patent number: 8009430
    Abstract: Techniques for cooling in a data center are provided. In one aspect a computer equipment rack is provided comprising one or more air inlets; one or more exhaust outlets, and one or more of: an air inlet duct mounted to the computer equipment rack surrounding at least a portion of the air inlets, the air inlet duct having a lateral dimension that approximates a lateral dimension of the computer equipment rack and a length that is less than a length of the computer equipment rack, and an air exhaust duct mounted to the computer equipment rack surrounding at least a portion of the exhaust outlets, the air exhaust duct having a lateral dimension that approximates the lateral dimension of the computer equipment rack and a length that is less than the length of the computer equipment rack.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Alan Claassen, Hendrik F. Hamann, Madhusudan K. Iyengar, James Andrew Lacey, Yves C. Martin, Roger R. Schmidt, Theodore Gerard van Kessel
  • Patent number: 8006312
    Abstract: To provide a system which allows large volumes of data to be exchanged efficiently through network connections using portable terminals. An example data communications system includes a data terminal which stores certain data; and an operation terminal which controls access rights to the data stored in the data terminal, in which the operation terminal grants another operation terminal access rights to desired data. The data terminal returns the data according to an access request made based on the access rights. On the other hand, the operation terminal passes the acquired access rights to the data terminal, which then accesses the data terminal via a high-speed, stable, wired network and acquires the desired data, based on the access rights.
    Type: Grant
    Filed: August 19, 2007
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventor: Taiga Nakamura
  • Patent number: 7996860
    Abstract: Apparatus for reducing sensitivity of an article to mechanical shock comprises a frame; first and second planar masses mounted in the frame for bi-directional movement relative to the frame along a first axis of displacement; a first lever pivotable about a first fulcrum secured to the frame; the lever having one end connected to the first mass and the other end connected to the second mass, and the fulcrum being disposed between the ends of the lever; whereby the torque exerted about the fulcrum by the first mass is countered by the torque exerted about the fulcrum by the second mass in response to a mechanical shock applied to the frame along the axis of displacement such that an article carried by the first mass in use has reduced sensitivity to the shock.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Gerd K. Binnig, Walter Haeberle, Mark A. Lantz, Hugo E. Rothuizen
  • Patent number: 7994028
    Abstract: A semiconductor substrate containing a single crystalline group IV semiconductor is provided. A single crystalline lattice mismatched group IV semiconductor alloy layer is epitaxially grown on a portion of the semiconductor layer, while another portion of the semiconductor layer is masked. The composition of the lattice mismatched group IV semiconductor alloy layer is tuned to substantially match the lattice constant of a single crystalline compound semiconductor layer, which is subsequently epitaxially grown on the single crystalline lattice mismatched group IV semiconductor alloy layer. Thus, a structure having both the group IV semiconductor layer and the single crystalline compound semiconductor layer is provided on the same semiconductor substrate. Group IV semiconductor devices, such as silicon devices, and compound semiconductor devices, such as GaAs devices having a laser emitting capability, may be formed on the on the same lithographic level of the semiconductor substrate.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Tymon Barwicz, Devendra K. Sadana
  • Patent number: 7993995
    Abstract: Metal-oxide semiconductor field effect transistor (MOSFET) devices having metal gate stacks and techniques for improving performance thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate having a buried oxide layer at least a portion of which is configured to serve as a primary background oxygen getterer of the device; and a gate stack separated from the substrate by an interfacial oxide layer. The gate stack comprises a high-K layer over the interfacial oxide layer; and a metal gate layer over the high-K layer.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Amlan Majumdar, Renee Tong Mo, Zhibin Ren, Jeffrey Sleight
  • Patent number: 7991876
    Abstract: A system includes a monitoring management server, a monitoring target server, and one or more monitoring clients. The management server determines monitoring parameters for each client. The monitoring parameters specify at least when a client is to begin a monitoring session with the target server and when the client is to end the session with the target server. The management server determines the monitoring parameters for each client such that a predetermined maximum number of monitoring sessions performed within each time period is never exceeded by the target server. Each client receives monitoring parameters from the management server in response to a request initiated by the client, initiates a monitoring session with the target server in accordance with the monitoring parameters, and reports results of the monitoring session to the management server upon the monitoring session ending.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: August 2, 2011
    Assignee: International Business Machines Corporation
    Inventors: Kunikazu Yoda, Takayuki Kushida