Patents Represented by Attorney, Agent or Law Firm Victor M. Genco, Jr.
  • Patent number: 5848600
    Abstract: A dental floss article is provided comprising a fiber having a predetermined length and defined by at least one substantially rigid portion and at least one flexible portion.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: December 15, 1998
    Assignee: Gore Enterprise Holdings, Inc.
    Inventors: John Edward Bacino, John W. Dolan, Thomas Michael Gray
  • Patent number: 5847327
    Abstract: A dimensionally stable core for use in high density chip packages is provided. The stable core is a metal core, preferably copper, having clearances formed therein. Dielectric layers are provided concurrently on top and bottom surfaces of the metal core. Metal cap layers are provided concurrently on top surfaces of the dielectric layers. Blind or through vias are then drilled through the metal cap layers and extend into the dielectric layers and clearances formed in the metal core. If an isolated metal core is provided then the vias do not extend through the clearances in the copper core. The stable core reduces material movement of the substrate and achieves uniform shrinkage from substrate to substrate during lamination processing of the chip packages. This allows each substrate to perform the same. Additionally, a plurality of chip packages having the dimensionally stable core can be bonded together to obtain a high density chip package.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: December 8, 1998
    Assignee: W.L. Gore & Associates, Inc.
    Inventors: Paul J. Fischer, Robin E. Gorrell, Mark F. Sylvester
  • Patent number: 5841075
    Abstract: A method of making a low inductance conductive via in a laminated substrate by providing a first conductive layer. A first dielectric layer is formed on the first conductive layer. A second conductive layer is formed on the first dielectric layer. A first conductive path is formed in the first conductive layer extending along a first route between a first node and a second node. A first conductive blind-via is connected to the first conductive path at the second node, with the first-blind via being formed in the first dielectric layer at the second node. Lastly, a second conductive path is formed in the second conductive layer that is connected to the first blind via. The second conductive path extends between a third node and the first blind via along a second route. The second route corresponds identically to at least a portion of the first route.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: November 24, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: David A. Hanson
  • Patent number: 5841102
    Abstract: A method for forming a through-via in a laminated substrate by laser drilling a through-via from a top exposed surface of the substrate to a bottom exposed surface of the substrate using a plurality of laser pulses that are spaced at the first pulse spacing. Each pulse spaced at the first pulse spacing has a first energy density per pulse. Then, the through-via is laser drilled using a plurality of laser pulses that are trepanned at a second pulse spacing. Each pulse spaced at the second pulse spacing has a second energy density per pulse. The second energy density per pulse is greater than the first energy density per pulse, and the second pulse spacing is less than the first pulse spacing.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: November 24, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: David B. Noddin
  • Patent number: 5838063
    Abstract: A lid for a chip/package system includes a body sized to fit over an integrated circuit chip and being connectable to a package. The body has at least two regions exhibiting different coefficients of thermal expansion, with one CTE matching that of the chip and the other matching that of the package.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: November 17, 1998
    Assignee: W. L. Gore & Associates
    Inventor: Mark F. Sylvester
  • Patent number: 5835517
    Abstract: A compact WDM optical device can demultiplex an optical laser signal containing several different wavelengths corresponding to particular channels, and, in reverse operation operate as a multiplexer to interleave several different wavelengths into a multiplexed multi-channel optical laser signal with improved insertion loss characteristics. The optical device includes a linear array of passive resonant optical cavities, in the form of Fabry-Perot filters, extending in a lateral direction and an integral array of associated microlenses extending in the lateral direction. Each microlens has a center which is offset from the central longitudinal axis of an associated Fabry-Perot filter to reflect laser radiation through the device. Each optical cavity is tuned by adjusting the longitudinal dimension thereof to a particular wavelength contained in the multi-channel optical signal. A stepped-wavelength steered laser radiation source for the optical device uses a VCSEL array with offset microlenses.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: November 10, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Vijaysekhar Jayaraman, Frank H. Peters
  • Patent number: 5833759
    Abstract: The invention relates to a method for cleaning vias in electronic component substrates prior to metallization thereof.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: November 10, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Randy E. Haslow, Donald G. Hutchins, Michael R. Leaf
  • Patent number: 5830565
    Abstract: The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level burn-in (WLBI), diced die burn-in (DDBI), and packaged die burn-in (PDBI). The burn-in system includes a burn-in substrate with a planar base, a temporary Z-axis connecting member, and a Z-axis wafer level contact sheet electrically coupled to one another for screening wafers, diced die, and packaged electronic components, their assembly and use.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: November 3, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: John J. Budnaitis
  • Patent number: 5814769
    Abstract: Ribbon cable with cable conductors arranged next to each other with a cable shield and with at least one contact element provided for electrical contacting of cable shield on the outside of ribbon cable and for electrical contacting by a contact spring of a plug-in connector that accepts ribbon cable or a contact surface of an Electromagnetic Interference (EMI) housing that accepts ribbon cable. Electrical connection between the cable shield and a plug-in connector or EMI housing can be produced via the contact spring or the contact surface.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: September 29, 1998
    Inventors: Anders Karlstrom, Andrea Wagner, Thomas Meschwitz
  • Patent number: 5815125
    Abstract: A satellite dish cover, especially suited for protecting a satellite dish assembly of standard construction, includes a sheet of material constructed and arranged for being disposed over the dish and feeder horn of the satellite dish assembly. The sheet has a main body panel which wraps around the dish and feeder horn of the satellite dish assembly and a secondary body panel which extends from the dish to the support of the satellite dish assembly. The main body panel has an outer end portion for receiving the feeder horn therein. A cinching mechanism is affixed to the end portion for cinching and tightening the main body panel about the dish and feeder horn of the satellite dish assembly.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: September 29, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: David Z. Kelly, Michael G. Ryan
  • Patent number: 5814180
    Abstract: A method for low temperature attachment of components is provided which uses an electrically conductive adhesive. The electrically conductive adhesive may be defined by a substrate having numerous passageways through the substrate. The passageways are defined by a plurality of walls of the material making up the substrate. The walls are covered with a layer of conductive metal. The passageways at the outer surfaces are filled with a non-conductive pressure sensitive adhesive resin.
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: September 29, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: David Robert King
  • Patent number: 5811322
    Abstract: A composite-layer semiconductor device includes a gate above a host substrate, an n++ contact layer above the gate, and source and drain ohmic contacts applied to the n++ contact layer. The source and drain ohmic contacts define a central gate location which is recessed through the n++ contact layer toward the gate. The source and drain ohmic contacts create a barrier to chemical etching so that a current path below the central gate location can be incrementally recessed in repeated steps to precisely tailor the operating mode of the device for depletion or enhancement applications. The composite-layer semiconductor device is fabricated by depositing a gate on an n++ contact layer above a semi-insulating substrate. The semi-insulating substrate and gate are flipped onto an epoxy layer on the host substrate so that the gate is secured to the epoxy layer and the semi-insulating substrate presents an exposed backside. A portion of the exposed backside is removed.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: September 22, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Gerald D. Robinson
  • Patent number: 5812571
    Abstract: A laser cluster for high-power applications includes an array of VCSELs. The array of VCSELs includes a center VCSEL and one or more peripheral VCSELs displaced from the center VCSEL in a hexagonal closest-packing arrangement sharing a pair of common electrical contacts. Each VCSEL in the array is flip-chip mounted on a heat sink to present the backside of the VCSEL. A multimode optical fiber is coupled to receive laser light from the array of VCSELs. The array of VCSELs is operable to generate a laser burst at a wavelength in a range from 950 nm to 1050 nm. In a process for fabricating a VCSEL that can be clustered for high-power applications, a bottom n-doped mirror stack is deposited above an n-doped gallium arsenide substrate. An active region including indium gallium arsenide is deposited above the bottom mirror stack. A top p-doped mirror stack is deposited above the active region. Electrical contacts are applied to the top mirror stack and to the substrate. The laser cluster is packaged and sealed.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: September 22, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Frank H. Peters
  • Patent number: 5810094
    Abstract: In a data storage device, a ribbon interconnect for electrically connects a read/write head to an electrical circuit component. The read/write head id defined by separate read and write transducer elements. The interconnect has at least one carrying medium; and at least three conductors captured by the carrying medium in a coplanar arrangement. The at least three conductors define asymmetrical pitches. Each pair of the at least three conductors define a predetermined complex impedance. The individual complex impedances are not equal. The carrying medium may be a polymeric film. The at least three conductors are substantially cylindrically shaped and may be adhesively captured by the carrying medium. The ribbon interconnect may include at least one conductive ground plane. An insulation material may be disposed about each of the at least three conductors.
    Type: Grant
    Filed: May 9, 1996
    Date of Patent: September 22, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Matt C. Kesler, J. Scott Reynolds
  • Patent number: 5800661
    Abstract: A method and apparatus is provided for dimensioning and manipulating a patterned material by selectively applying a vacuum and/or positive pressure to the patterned material.
    Type: Grant
    Filed: February 24, 1997
    Date of Patent: September 1, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Bradley E. Reis, William G. Lytle, Keith D. Adkins
  • Patent number: 5795358
    Abstract: A wet/dry vacuum cleaner in one commonly available configuration includes a canister having an interior region defining a chamber, a motor mounted on the canister, a filter mounted on the canister and disposed within the chamber, and an inlet fitting attached to the canister. The inlet fitting is positioned generally adjacent the filter which results in the flow of air or water carrying debris generally towards the filter. The present invention is directed to a deflector boot which is secured to the inlet fitting for deflecting the flow of air or water carrying debris away from the filter. The deflector boot includes a cylindrical wall having an open end at one end thereof and an end wall that encloses the opposite end of the cylindrical wall. The open end of the cylindrical wall is sized to fit snugly over the inlet fitting when attaching the boot to the fitting.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: August 18, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: John J. Scanlon, Jay J. Herring, Richard W. Giannetta
  • Patent number: 5792525
    Abstract: A creep resistant article is provided which is dimensioned from a stock material consisting essentially of a plurality of layers of expanded polytetrafluoroethylene which has been densified. The expanded polytetrafluoroethylene exhibits remnants of a fibril and node structure. The article is resistant to creep at high temperatures and under high loads.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: August 11, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: John-Peter Ludwig Fuhr, Michele Marie Gentile, Ross Kennedy Hutter, Michael Earl Kennedy
  • Patent number: 5786270
    Abstract: A method is provided for forming at least one raised metallic contact on an electrical circuit for permanent bonding. Generally, this method includes the following steps: providing a composite base substrate which is defined by at least a first conductive layer, a dielectric material and a second conductive layer; removing a portion of the first conductive layer to expose the dielectric material; removing the exposed portion of the dielectric material to the second conductive layer, thereby forming a depression; depositing at least one layer of solder on at least side wall portions of the depression; depositing at least one layer of copper; removing the second conductive layer; and completely removing the dielectric material to said first conductive layer thereby forming a raised solder contact which extends perpendicularly away from the first conductive layer.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: July 28, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Robin E. Gorrell, Paul J. Fischer
  • Patent number: D400323
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: October 27, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: John J. Scanlon, Raymond M. Wnenchak, Richard W. Giannetta
  • Patent number: D402990
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: December 22, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: David Z. Kelly, Michael G. Ryan