Patents Represented by Attorney, Agent or Law Firm Wade James Brady, III
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Patent number: 6829290Abstract: A wireless receiver (UST). The receiver comprises at least one antenna (ATU) for receiving a plurality of frames (FR) in a form of a plurality of paths. Each of the plurality of frames comprises a plurality of time slots (SLN), and each of the plurality of time slots comprises a plurality of symbols. Further, each of the plurality of paths has a corresponding sample position, wherein the plurality of symbols comprise a primary synchronization code symbol (PSC). The receiver further comprises circuitry (52) for correlating a primary synchronization code across a group of the plurality of symbols, and circuitry for identifying a plurality of path positions within the group. Each of the plurality of path positions corresponds to a respective one of a plurality of largest-amplitude paths represented within the group as detected in response to the circuitry for correlating.Type: GrantFiled: September 26, 2000Date of Patent: December 7, 2004Assignee: Texas Instruments IncorporatedInventors: Timothy M. Schmidl, Alan Gatherer, Srinath Hosur, Anand G. Dabak
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Patent number: 6823652Abstract: A flexible carrier tape system, suitable for housing components and for winding on a reel in high density, is disclosed, comprising an elongated base strip having a plurality of longitudinally spaced cavities with side walls having a step-like groove near the surface around the cavity, comprising further an elongated cover strip having a width matching the width of the cavity including the widths of the grooves, the cover strip sealed onto the base strip so that the cover strip rests on the step-like grooves. In one embodiment, the sealed cover strip forms a substantially uniform plane with the upper surface of the base strip. The thickness consumed by each tape winding becomes a minimum so that a high density of components can be stored and transported.Type: GrantFiled: August 5, 2002Date of Patent: November 30, 2004Assignee: Texas Instruments IncorporatedInventor: Clessie A. Troxtell, Jr.
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Patent number: 6826652Abstract: A cache architecture (16) for use in a processing includes a RAM set cache for caching a contiguous block of main memory (20). The RAM set cache can be used in conjunction with other cache types, such as a set associative cache or a direct mapped cache. A register (32) defines a starting address for the contiguous block of main memory (20). The data array (38) associated with the RAM set may be filled on a line-by-line basis, as lines are requested by the processing core, or on a set-fill basis which fills the data array (38) when the starting address is loaded into the register (32). As addresses are received from the processing core, hit/miss logic (46) the starting address register (32), a global valid bit (34), line valid bits (37) and control bits (24, 26) are used to determine whether the data is present in the RAM set or whether the data must be loaded from main memory (20).Type: GrantFiled: June 9, 2000Date of Patent: November 30, 2004Assignee: Texas Instruments IncorporatedInventors: Gerard Chauvel, Serge Lasserre, Dominique Benoit Jacques D'Inverno
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Patent number: 6824275Abstract: A projection lens that uses a TIR surface as both an angular filter and fold mirror. A first lens element 602 is placed very close to the TIR prism assembly 604. Because the lens is so close, it gathers both off state and state light from the modulator. Off state light from the DMD follows path 606 while on state light follows path 608. A total internal reflection surface 610 receives both the on state and the off state light. Because the off state light strikes the TIR surface at an angle less than the Brewster's angle, the off state light passes through the TIR prism and is removed from the projection path. The on state light strikes the TIR surface at an angle greater than Brewster's angle and is reflected by the TIR surface through the remaining projection lens components.Type: GrantFiled: December 31, 2002Date of Patent: November 30, 2004Assignee: Texas Instruments IncorporatedInventor: Steven M. Penn
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Patent number: 6825784Abstract: A Sigma-Delta Analog-to-Digital Converter (ADC) having efficient dithering that removes the idle channel tones of the sigma-delta converter is disclosed herein. These idle channel tones are reduced or removed by stretching the threshold window of the multi-level quantizer. A dithering sequence is added by stretching the thresholds window randomly. The randomly stretched window destructs the periodicity of sigma-delta ADC modulator's output sequence and, thus, removes the idle channel tones. Compared with conventional methods, the Sigma-Delta ADC in accordance with the present invention has less SNR penalty and is simple to implement. Moreover, the sigma-delta ADC in accordance with the present invention has a higher allowed input dynamic range and higher signal-to-noise-plus-distortion-ratio (SNDR) than conventional modulator dithering schemes.Type: GrantFiled: February 18, 2004Date of Patent: November 30, 2004Assignee: Texas Instruments IncorporatedInventor: Weibiao Zhang
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Patent number: 6822505Abstract: A transconductance-setting circuit (10, 20) and method. The circuit (10, 20) includes a first transconductor (14) coupled to a reference voltage (Vref) adapted to produce a current output (Ibias). A reference current source (Iref) is coupled to the first, transconductor (14), and a feedback loop (16) is coupled to the first transconductor (14) and the reference current source (Iref). The feedback loop (16) is adapted to reduce error in the current output (2i) and set the transconductance gm of the first transconductor (14) to a value proportional to the ratio of the reference current and the reference voltage. An auxiliary transconductor (22) is coupleable to the first transconductor (14), and control circuitry (30, 40) is adapted to control the coupling of the auxiliary transconductor (22) to the first transconductor (14) based on the current output (2i).Type: GrantFiled: December 27, 1999Date of Patent: November 23, 2004Assignee: Texas Instruments IncorporatedInventors: George Palaskas, Shanthi Y. Pavan
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Patent number: 6821791Abstract: A method for reworking integrated circuit (IC) wafers having copper-metallized bond pads exposed in protective overcoat openings and one or more bondable metal layers deposited onto the bond pads by a technology which may produce some parts with off-spec or missing depositions. After identifying the wafer with off-spec metal layers, a layer of glass buffer is deposited over those wafers, which also fill any missing depositions at least partially. The glass-covered surface is then chemically-mechanically polished until the off-spec metal layers and at least portion a portion of the protective overcoat are removed, without damaging the copper metallization. Finally, a fresh layer of protective overcoat is deposited, selectively opened to expose the bond pads, and provided anew with one or more bondable metal layers.Type: GrantFiled: February 27, 2003Date of Patent: November 23, 2004Assignee: Texas Instruments IncorporatedInventors: Roger J. Stierman, Thomas M. Moore, Gregory B. Shinn
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Patent number: 6820794Abstract: A solderless test interface (10) includes a thin, flexible, electrically insulative sheet (20) having metal plated through-holes (24) formed in the pattern of the external ball contacts (54) of a semiconductor device (14). The termini (26, 30) of the holes (24) on the surface of the sheet (20) are also plated. The metal (40) is coated with a soft metal (42) which will cold-flow under force. The sheet is inserted between the ball contacts (54) and a test board (18). Force is applied to the test board and/or the device to engage and deform the soft metal (42) at the hole termini (26, 30) by its engagement with the balls (54) and pads (16) on the test board. The deformation ensures a low resistance electrical path between the balls and the pads during testing of the device.Type: GrantFiled: December 27, 2002Date of Patent: November 23, 2004Assignee: Texas Instruments IncorporatedInventor: Edward H. Olsen
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Patent number: 6822340Abstract: A semiconductor device having reduced self and mutual capacitance of bonded wires is provided by coating the wires with a foamed polymer effectively having a very low dielectric constant. Additional benefits are realized by electrically insulating the wires against short-circuiting, by cushioning, the wires with a low modulus sheath, and by protecting chip bond pad metallization.Type: GrantFiled: November 19, 2001Date of Patent: November 23, 2004Assignee: Texas Instruments IncorporatedInventors: Michael A. Lamson, Homer B. Klonis
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Patent number: 6823000Abstract: A dot product operator (30) uses adder trees (10) of L-1 adders and no multiplication circuits, where L is the length of the parallel dot product operator. Exclusive-or gates 12 provide the function of multiplication by ±1, with the carry-in ports of adders (14, 16, 18, 20, 32, 34, 36, 42) being used to form the two's complement, resulting in an extremely efficient design in terms of area and power.Type: GrantFiled: February 26, 1999Date of Patent: November 23, 2004Assignee: Texas Instruments IncorporatedInventor: Zhenguo Gu
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Patent number: 6819807Abstract: An optical correlator (10) that uses a spatial light modulator (11) to illuminate a pattern of on and off pixels into a length of an optical fiber (12). The spatial light modulator (11) is optically coupled to the length of fiber (12) so that the illumination enters the fiber along that length. The optical fiber (12) also carries light representing a bitstream of data. At the optical fiber, the illumination from the spatial light modulator interacts with the illumination of the optical bitstream. A detector (14) is optically coupled to the same length of fiber (12) and detects the resulting optical response to determine if a correlation exists.Type: GrantFiled: August 20, 2001Date of Patent: November 16, 2004Assignees: Board of Regents, The University of Texas System, Texas Instruments IncorporatedInventors: Harold R. Garner, Richard O. Gale
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Patent number: 6819395Abstract: A transport stream with embedded projector configuration data 208 being carried along with the video for use in digital cinema projector setup. The embedded configuration data consists of sub-packets 304 of setup data information for such parameters as gamma tables, color management system information, relative luminance level, format and range of the sampled data, 3D/2D presentation information, frame rate, image size, aspect ratio, font tables, and language provision. This approach assures that the projector 404 is setup properly and also permits on-the-fly changes to the projector's parameters, which may be used for artistic effects in the movie.Type: GrantFiled: August 30, 2002Date of Patent: November 16, 2004Assignee: Texas Instruments IncorporatedInventor: William B. Werner
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Patent number: 6819470Abstract: An improved DMD type spatial light modulator having an array of pixels (18). The pixels (18) are of the “hidden hinge” design, each pixel having a mirror (30) supported over a hinged yoke (32). Addressing electrodes (26, 28) on an underlying metallization layer and addressing electrodes (50, 52) at the yoke level provide electrostatic forces that cause the mirrors to tilt and then to return to their flat state. The pixels (18) are designed to provide increased clearance between the leading edge of the yoke (32) and the underlying metallization layer when the mirrors (30) are tilted. Various features of the improved pixel (18) also improve the contrast ratio of images generated by the DMD.Type: GrantFiled: February 6, 2003Date of Patent: November 16, 2004Assignee: Texas Instruments IncorporatedInventors: Robert E. Meier, James D. Huffman
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Patent number: 6814445Abstract: A method for removing heat from a spatial light modulator device in a digital projection display by encapsulating the device package in a thermal conductive socket attached to a printed wiring board. The socket wraps around the device package to remove both optically generated heat from the front of the device and electrically generated heat within the device. In higher brightness projector applications, fins are added to the socket to increase the mass and surface area of the socket, thereby improving the heat dissipation properties of the system. The heat sink socket attaches to the printed wiring board using a screw attachment means, which also assures electrical connectivity to the spatial light modulator through a interposer element between the device and spatial light modulator. This approach completely eliminates conventional heat sinks, mounting studs, and fasteners, which have been failure mechanisms in these type displays.Type: GrantFiled: July 1, 2002Date of Patent: November 9, 2004Assignee: Texas Instruments IncorporatedInventors: Satyan Kalyandurg, Jack D. Grimmett
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Patent number: 6816004Abstract: A filter circuit with two 2nd order stages cascaded in sequence. The first stage is implemented with high quality (Q) factor, and the second stage is implemented with a low Q factor and an imaginary zero. The first stage is designed to further eliminate the unwanted frequency components. The imaginary zero in the second stage eliminates the noise present in the output of the first stage due to the requirement of high Q in the first stage. Any additional noise introduced by the second stage is minimal due to the low Q of the second stage. Each stage may be implemented using only a single operational amplifier when the first stage generates a differential output signal.Type: GrantFiled: September 30, 2002Date of Patent: November 9, 2004Assignee: Texas Instruments IncorporatedInventors: Prakash Easwaran, Naom Chaplik, Sandeep Oswal
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Patent number: 6815276Abstract: Segmented power transistors and fabrication methods are disclosed in which transistor segments are spaced from one another to facilitate thermal diffusion, and in which other electrical devices can be formed in the spaces between transistor segments.Type: GrantFiled: October 3, 2002Date of Patent: November 9, 2004Assignee: Texas Instruments IncorporatedInventors: Philip L. Hower, John Lin, Sameer P. Pendharkar, Steven L. Merchant
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Patent number: 6816375Abstract: A new heat sink apparatus and method that simplify the assembly of the heat sink and thermal stud. The new heat sink assembly uses a spring retainer that, in most cases, can use existing socket mounting screws. A spring clip presses a thermal stud against the back of an electrical device package. The present invention is especially useful for attaching a spatial light modulator to a printed circuit board since it provides a simple, reliable heat sink without blocking the light path to and from the device.Type: GrantFiled: August 1, 2002Date of Patent: November 9, 2004Assignee: Texas Instruments IncorporatedInventor: Satyan Kalyandurg
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Patent number: 6816640Abstract: An optical switch ideally suited for use as an optical add drop multiplexer (OADM). A light beam entering the OADM through a first input fiber (402) is separated by wavelength to yield multiple light beams (902, 904). One light beam (902) is reflected by one or more of the mirrors in mirror array (908). Depending on the position of the mirrors struck by light beam (902), the beam is reflected to a first region of a retro-reflector (910) or a second region (912). When light beam (902) is reflected by the second region (912) of the retro-reflector, it again travels to the mirror array (908) and is then reflected to a wavelength combiner (914) and output on the second (“drop”) output fiber (408). While a first wavelength light beam (902) is reflected to the drop output (408), other wavelengths of light from the first input (402), for example light beam (904), are directed to the “out” optical fiber (406).Type: GrantFiled: September 28, 2001Date of Patent: November 9, 2004Assignee: Texas Instruments IncorporatedInventor: Claude E. Tew
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Patent number: 6815836Abstract: An assembly of a semiconductor chip (301) having an integrated circuit (IC) including at least one contact pad (320) on its surface (301a), wherein the contact pad has a metallization suitable for wire bonding, and an interconnect bonded to said contact pad. This interconnect includes a wire (304) attached to the pad by ball bonding (305), a loop (306) in the wire closed by bonding the wire to itself (307) near the ball, and a portion (307) of the remainder of the wire extended approximately parallel to the surface. The interconnect can be confined to a space (308) equal to or less than three ball heights from the surface.Type: GrantFiled: March 24, 2003Date of Patent: November 9, 2004Assignee: Texas Instruments IncorporatedInventor: Kazuaki Ano
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Patent number: 6813087Abstract: A multi-mode color filter 400 having an inner hub region 402 used to mount the color filter 400 to a motor shaft. A first track 404 and a second track 406 of color filter segments arc formed on the color filter, as is an optional clear track 406. The first and second tracks each have a different set of color filters. One set of filters is chosen to improve image brightness, another set is selected to improve color saturation. Typically, the set of filters used to improve brightness includes one or more clear segments, while the set of filters selected to improve color saturation does not. Depending on the image being projected, the user or the display controller moves the color wheel to select a particular filter set.Type: GrantFiled: December 31, 2002Date of Patent: November 2, 2004Assignee: Texas Instruments IncorporatedInventor: Michael T. Davis