Patents Represented by Attorney, Agent or Law Firm Wade James Brady, III
-
Patent number: 6857459Abstract: A system (30) is provided for interconnecting a first component (10) having multiple first bonding sites (16) and a second component (12) having multiple second bonding sites (18). The system (30) includes a leadframe (40) coupled to the first component (10) and the second component (12) that advances from a first position (50) to a second position (52). A film tape carrier (32) advances a wirefilm (20) removably coupled to the film tape carrier (32) into the first position (50). The wirefilm (20) includes a substantially planar film (22) and multiple wire strands (14), each wire strand (14) having a first end (24) that contacts a first bonding site (16) and a second end (26) that contacts a second bonding site (18). A film attach tool (62) contacts the first component (10) and the second component (12) with the wirefilm (20) at the first position (50) to interconnect the first component (10) and the second component (12).Type: GrantFiled: September 13, 1999Date of Patent: February 22, 2005Assignee: Texas Instruments IncorporatedInventor: Ruben P. Madrid
-
Patent number: 6853178Abstract: A metallic leadframe for use with a semiconductor chip intended for operation in a changing magnetic field comprises a chip mount pad having at least one slit penetrating the whole thickness of the pad and substantially traversing the area of the pad from one edge to the opposite edge. This slit is wide enough to interrupt electron flow in the pad plane, but not wide enough to significantly reduce thermal conduction in a direction normal to the pad plane, whereby the slit is operable to disrupt eddy currents induced in the pad by the changing magnetic field.Type: GrantFiled: June 2, 2001Date of Patent: February 8, 2005Assignee: Texas Instruments IncorporatedInventor: Kambiz Hayat-Dawoodi
-
Patent number: 6848092Abstract: Disclosed are systems, methods, and algorithms for network layout. A network layout having subnetworks of matching series and parallel elements is systematically generated to implement the network within area constraints. After the selection of the number of rows of network elements, the number of elements in each row, the sequencing of the elements, and the element locations, are systematically determined. The network layout systematically produced reduces the influence of unfavorable factors on the network such as temperature gradients, process gradients, and interference, by dispersing subnetwork elements throughout the layout.Type: GrantFiled: August 3, 2002Date of Patent: January 25, 2005Assignee: Texas Instruments IncorporatedInventors: David A. Jaska, Tan Du
-
Patent number: 6842458Abstract: The present invention discloses communications devices which improves communications of pulse code modulation modems which use communications lines with multiple digital-to-analog conversions. One embodiment of the present invention includes a plurality of codecs (312) which receive analog signals through multiple communications channels (310). Digital data streams generated by the codecs (312) from the analog signals is transmitted to an associated one of a plurality of digital signal processors (214). The digital signal processors (214) process the decoded data and then transfers the data to a digital modem (216) for further transmission.Type: GrantFiled: March 10, 2000Date of Patent: January 11, 2005Assignee: Texas Instruments IncorporatedInventor: Zvi Reznic
-
Patent number: 6836148Abstract: A output driver architecture (100) is proposed that uses thin gate-oxide core and thin gate-oxide Drain-extended transistors that can directly interface with voltage supplies up to six times the normal rating of the transistor. A bias generator (101), level shifter (103) and output stage (105) are adapted to buffer an input signal with a voltage swing of less than the normal operating voltage of the transistors to an output signal with a voltage swing of up to approximately six times the normal operating voltage of the transistors. The bias generator is interfaced directly with a high voltage power supply and generates a bias voltage with a magnitude of less than the dielectric breakdown of the transistors internal to the level shifter and output stage.Type: GrantFiled: May 8, 2002Date of Patent: December 28, 2004Assignee: Texas Instruments IncorporatedInventors: Donald T. Pullen, Norman L. Culp, Xiaoyu Xi, Keith E. Kunz
-
Patent number: 6835623Abstract: An NMOS ESD clamping device and methods for making the same are disclosed in which the device includes N type drain and source regions formed in a semiconductor substrate and a gate overlying a P-type channel region in the substrate between the source and drain regions. A first silicide region is formed in the drain and/or the source region with a first thickness. A second thin silicide region is formed in the substrate between the gate and the drain having a second thickness less than the first thickness, wherein the thin silicide increases the ESD current clamping capability of the device to provide improved ESD circuit protection.Type: GrantFiled: February 24, 2003Date of Patent: December 28, 2004Assignee: Texas Instruments IncorporatedInventors: Wei-Tsun Shiau, Craig T. Salling, Jerry Che-Jen Hu
-
Patent number: 6834074Abstract: A mechanism for implementing time tracking and early/ontime/late correlation processing in a vector correlator has been implemented to accommodate processing of data when the earliest chips in a triple data input buffer are to be processed and time tracking needs to be done to an earlier sample and further to accommodate processing of data when chips being processed are the last chips in a circular input buffer and time tracking needs to be done to a later sample.Type: GrantFiled: May 23, 2001Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventors: Sundararajan Sriram, Katherine G. Brown, Yuan Kang Lee
-
Patent number: 6834046Abstract: A method (70) of operating a wireless receiver (UST). The method receives a wireless communicated signal, wherein the signal comprises asymmetrically spaced synchronization channel components. The method also defines (72) a set of signals from the communicated signal, wherein the set spans a number of equal duration time slots and comprises at least a first synchronization channel component and a second synchronization channel component. The method also forms (76) a first signal combination by combining a first portion of the set of signals with a second portion of the set of signals, and it forms (78) a second signal combination by combining a third portion of the set of signals with a fourth portion of the set of signals. Finally, the method detects (80, 82, 84) a location of the first synchronization channel component and a location of the second synchronization channel component in response to at least one of the first and second signal combinations.Type: GrantFiled: October 4, 2000Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventors: Srinath Hosur, Sundararajan Sriram, Timothy M. Schmidl, Anand G. Dabak
-
Patent number: 6833292Abstract: A method of reducing dopant losses is provided. The method includes providing a transistor structure having a first region, implanting a dopant into the first region, depositing a control layer adjacent the first region, and performing a first annealing process on the transistor structure. The control layer is operable to prevent at least a portion of the dopant in the first region from diffusing out of the first region toward the control layer during the first annealing process.Type: GrantFiled: March 31, 2003Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventor: Donald S. Miles
-
Patent number: 6833942Abstract: A low-cost, high-performance, reliable micromirror package (300) that replaces the ceramic substrate in conventional packages with a printed circuit board substrate (30) and a molded plastic case (33), and the cover glass with a window (36), preferably an optically clear plastic window. The printed circuit board substrate (30) allows for either external bond pads or flex cable connection of the micromirror package to the projector's motherboard. These packages support flexible snap-in, screw-in, ultrasonic plastic welding, or adhesive welding processes to overcome the high cost seam welding process of many conventional packages.Type: GrantFiled: January 23, 2004Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventor: Jwei Wien Liu
-
Patent number: 6833944Abstract: A low-cost, high-performance, reliable micromirror package (300) that replaces the ceramic substrate in conventional packages with a printed circuit board substrate (30) and a molded plastic case (33), and the cover glass with a window (36), preferably an optically clear plastic window. The printed circuit board substrate (30) allows for either external bond pads or flex cable connection of the micromirror package to the projector's motherboard. These packages support flexible snap-in, screw-in, ultrasonic plastic welding, or adhesive welding processes to overcome the high cost seam welding process of many conventional packages.Type: GrantFiled: January 23, 2004Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventor: Jwei Wien Liu
-
Patent number: 6833757Abstract: One aspect of the invention is an amplifier (10), comprising an input stage amplifier (20) coupled to an output node (81). The amplifier (10) further comprises a class D output stage (50), which comprises at least two switching elements (P1, N1) and coupled to the output node (81). The amplifier (10) also comprises a control circuit (40) coupled to the output stage (50). The control circuit (40) is operable to produce a tri-state output of the output stage (50) in response to a sensed value proportional to an amount of current that flows to the output node (81).Type: GrantFiled: November 30, 2000Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventors: Randall J. Stephens, Teddy D. Thomas
-
Patent number: 6833832Abstract: A controller (15) for a display system (10) that uses a spatial light modulator (15) to display data formatted in bit-planes. The controller (15) receives at least some of the bit-plane data from a frame memory. It has local memory that buffers data transfer and stores data for bit-planes having multiple accesses, thereby increasing the bandwidth of data transfers from the frame memory (14) to the SLM (16).Type: GrantFiled: December 31, 2001Date of Patent: December 21, 2004Assignee: Texas Instruments IncorporatedInventor: Gary S. Wolverton
-
Patent number: 6831008Abstract: A process for forming nickel silicide and silicon nitride structure in a semiconductor integrated circuit device is described. Good adhesion between the nickel silicide and the silicon nitride is accomplished by passivating the nickel suicide surface with nitrogen. The passivation may be performed by treating the nickel silicide surface with plasma activated nitrogen species. An alternative passivation method is to cover the nickel silicide with a film of metal nitride and heat the substrate to about 500° C. Another alternative method is to sputter deposit silicon nitride on top of nickel silicide.Type: GrantFiled: September 30, 2002Date of Patent: December 14, 2004Assignee: Texas Instruments IncorporatedInventors: Jiong-Ping Lu, Glenn J. Tessmer, Melissa M. Hewson, Donald S. Miles, Ralf B. Willecke, Andrew J. McKerrow, Brian K. Kirkpatrick, Clinton L. Montgomery
-
Patent number: 6831929Abstract: A circuit for detecting a serial signal comprises a first circuit (400) coupled to receive the serial signal (200) during a predetermined plurality of time periods of substantially equal duration. The first circuit is coupled to receive a first code (414). The first circuit is arranged to compare a part of the serial signal corresponding to each time period of the plurality of time periods to the first code, thereby producing a match signal. The first circuit accumulates the match signal from each of the each time period of the plurality of time periods.Type: GrantFiled: March 22, 2000Date of Patent: December 14, 2004Assignee: Texas Instruments IncorporatedInventors: Sundararajan Sriram, Srinath Hosur
-
Patent number: 6831750Abstract: A method and system for indirectly measuring the tilt angle of micromirrors in a micromirror array. The method and system aims a coherent light beam through an aperture in a screen so that it reflects off of the surface of the micromirror array and creates a pattern of reflected light on the screen. The micromirror array is loaded with a pattern that has a uniform power spectral density (such as a random, aperiodic pattern or a frequency chirped sinusoidal spatial pattern) whereby certain micromirrors will be placed in the “on” position and the other micromirrors will be placed in the “off” position. By loading the micromirror array with a pattern having a uniform power spectral density distribution, the discrete nature of the resulting diffraction pattern is reduced and a pair of [sin(x)/x]2 patterns will be generated on the screen.Type: GrantFiled: May 31, 2002Date of Patent: December 14, 2004Assignee: Texas Instruments IncorporatedInventors: David J. Mehrl, Kun Pan, Benjamin L. Lee
-
Patent number: 6831956Abstract: A wireless receiver (UST). The receiver comprises at least one antenna (ATU) for receiving a plurality of frames (FR) in a form of a plurality of paths. Each of the plurality of frames comprises a plurality of time slots (SLN), and each of the plurality of time slots comprises a plurality of symbols. Further, each of the plurality of paths has a corresponding sample position, wherein the plurality of symbols comprise a primary synchronization code symbol (PSC). The receiver further comprises circuitry (52) for correlating a primary synchronization code across a group of the plurality of symbols and circuitry (52) for identifying a plurality of path positions within the group. Each of the plurality of path positions corresponds to a respective one of a plurality of largest-amplitude paths represented within the group as detected in response to the circuitry for correlating. The receiver further comprises circuitry (56) for defining a plurality of sub-windows.Type: GrantFiled: September 26, 2000Date of Patent: December 14, 2004Assignee: Texas Instruments IncorporatedInventors: Timothy M. Schmidl, Alan Gatherer, Srinath Hosur, Anand G. Dabak
-
Patent number: 6829007Abstract: An image processing apparatus (800) for a charge coupled device having hot/cold pixel and line noise filtering is disclosed which provides optical black and offset correction. The present invention teaches an offset and optical black correction circuit having a digital filter to obtain noise-free optical black correction for charge-coupled devices such that a digitally programmable bandwidth exists. The sum of the channel offset and optical black level is averaged for a given number of lines having a number of optical black cells per line and this sum passes through a digital filter. Moreover, the channel is digitally calibrated to obtain a user programmed ADC (810) output which corresponds to that average.Type: GrantFiled: August 30, 2000Date of Patent: December 7, 2004Assignee: Texas Instruments IncorporatedInventors: Haydar Bilhan, Ramesh Chandrasekaran
-
Patent number: 6827449Abstract: An improved spatial light modulator package comprising a spatial light modulator 1006 attached to a central region of a substrate 1004, a sealing ring 1002 on said substrate 1004 around the central region thereof, a window frame 402 attached to the sealing ring 1002, and a window 404 glued to the window frame 402. Gluing the window 404 to the window frame 402 avoids distortion of the glass that occurs when the window is heat bonded to the window frame, and avoids having to grind and polish the glass window after it is bonded to the window frame.Type: GrantFiled: December 29, 1998Date of Patent: December 7, 2004Assignee: Texas Instruments IncorporatedInventors: Homer B. Klonis, Robert G. McKenna, Ronald A. Jascott
-
Patent number: 6828961Abstract: A display system (200) in which light from source (202) is focused onto a spinning color wheel (204). The spinning color wheel (204) spins at a constant rate and creates of beam of light that changes from one primary color to the next in rapid sequence. The primary colored beam of light impinges a spatial light modulator (206), which is often a DMD or LCD. A controller (208) receives an input video signal and determines the native frame rate of the image source. The controller (208) sends image data to the spatial light modulator (206) in synchronization with the color wheel (204)—image data representing the red portions of the image is sent during the period in which the red color filter is passing through the beam of light—at the native frame rate of the image source. The modulated light is focused onto an image plane (210) by projection lens (212) to form an image. The eye of the viewer integrates the sequential primary color images giving the perception of a single full-color image.Type: GrantFiled: December 28, 2000Date of Patent: December 7, 2004Assignee: Texas Instruments IncorporatedInventors: Keith H. Elliott, Kazuhiro Ohara, William B. Werner, Adam J. Kunzman