Patents Represented by Attorney, Agent or Law Firm Wagner, Murabito & Hao
  • Patent number: 6734715
    Abstract: A two terminal semiconductor circuit that can be used to replace the semiconductor diodes used as rectifiers in conventional DC power supply circuits. Three semiconductor circuits that can efficiently supply the DC currents required in both discrete and integrated circuits being operated at low DC supply voltages are disclosed. All three circuits have a forward or current conducting state and a reverse or non current conducting state similar to a conventional semiconductor diode.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: May 11, 2004
    Assignee: Lovoltech, Inc.
    Inventor: Ho-Yuan Yu
  • Patent number: 6731566
    Abstract: In a single ended simplex dual port memory cell, one port of the memory cell is dedicated for writing operations and the other port of the memory cell is dedicated for reading operations. A bit of data received from the first port can be stored in the memory cell. The second port can detect the memory cell contents substantially simultaneously as the memory cell is storing a bit of data from the first port. Each port is optimized for its respective dedicated operation. In other words, one port is optimized for write operations and the other port is optimized for read operations. Because one port of the memory cell is optimized for write operations and the other port of the memory cell is optimized for read operations, the cell does not require multiple wordline voltages for each port.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: May 4, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventors: Stefan P. Sywyk, Richard K. Chou, Andrew L. Hawkins
  • Patent number: 6732105
    Abstract: A method and server system for exchanging data between a hand-held wireless electronic device and another computer system. This system allows a wireless electronic device to securely communicate with an Intranet by verifying two authentication parameters. The first authentication parameter is the device serial number and a password which authenticates the network connection. The second authentication parameter is a user name and password that authenticates the user's access to applications on the Intranet.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: May 4, 2004
    Assignee: palmOne, Inc.
    Inventors: David M. Watson, Jr., Mark Stantz
  • Patent number: 6732051
    Abstract: A survey system and method for determining the best source of position data for a particular application. The system includes both an optical unit and a satellite positioning system (SATPS) unit for obtaining position data. The optical unit includes a theodolite and an electronic distance meter for determining the position of a rover unit. The SATPS unit includes a SATPS antenna and a SATPS receiver for receiving signals from satellites of the SATPS and a radio for coupling the received signals to the rover unit. The present invention automatically determines the best source of position data. The best source of position data is then used to calculate the position of the rover unit.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: May 4, 2004
    Assignee: Trimble Navigation Limited
    Inventors: Geoffrey R. Kirk, Darin Muncy, Joseph V. R. Paiva
  • Patent number: 6730545
    Abstract: A method of performing back-end manufacturing of an integrated circuit (IC) device is disclosed. In one method embodiment, the present invention process a die-strip through a front-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The die-strip is then automatically provided to an end-of-line assembly portion. The die-strip is then processed through an end-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The present embodiment then automatically provides the die-strip to a test assembly portion. The die-strip is then tested by the test portion and then automatically provided to a finish assembly portion. The present embodiment then processes the die-strip through a finish portion which comprises a plurality of sub-stations operating on an in-line basis. Camera systems perform automated visual inspection of dies on the die-strip and maintain a database that can be used for automated reject management.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: May 4, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bo Soon Chang, Thurman J. Rodgers
  • Patent number: 6730532
    Abstract: A method and system for universal packaging in conjunction with an automated in-line back-end IC manufacturing process. In one method embodiment, the present invention processes a die-strip through a number of integrated in-line processes that function independently of the die size of the die-strip. A control computer maintains a die-strip map database recording the die size of the die-strip. In-line molding and solder ball attachment processes are then performed and function independently of the die size of the die-strip. Processes that are independent of die size provide a universal packaging manufacturing solution. The present invention then accesses the database to determine the die size for cutting the die-strip based on specifications maintained by the electronic die-strip map database. Sorting, testing and finish assembly processes are then performed.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: May 4, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bo Soon Chang, Vani Verma
  • Patent number: 6727765
    Abstract: A pulse generator. The pulse generator has a pseudo random number generator, a comparator coupled to the pseudo random number generator, and a register coupled comparator. The comparator performs comparisons of values generated by the pseudo random number generator and a value in the register, wherein the comparator outputs a pulse that is modulated according to the comparison. A low-pass filter may coupled to the comparator output and the register may receive samples of a digital signal. Low-pass filtering the comparator output implements a digital-to-analog converter that is less expensive than conventional delta-sigma modulator DACs and has better performance than conventional PWM DACs.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: April 27, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventor: David Van Ess
  • Patent number: 6724720
    Abstract: A method of switching a network access configuration associated with a first electronic system to a second electronic system via a network is described. The first electronic system is inoperable. The second electronic system replaces the first electronic system such that a user seamlessly transitions from the first electronic system to the second electronic system. The user continues to access the network resources using the second electronic system rather than the first electronic system. According to an embodiment of the present invention, an application for switching the network access configuration is invoked using the second electronic system. During a first phase, the application transmits first data to a network infrastructure provider. The network infrastructure provider obtains approval for switching the network access configuration from the network service provider.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: April 20, 2004
    Assignee: palmOne, Inc.
    Inventor: Craig Stuart Skinner
  • Patent number: 6725361
    Abstract: A floating point processor including a plurality of explicitly-addressable processor registers, an emulation register capable of storing a value used to logically rename the explicitly-addressable registers to emulate registers of a floating point stack, a computer-executable software process for calculating and changing a value in the emulation register to a value indicating a change in addresses of registers of a floating point stack when executing a floating point stack operation, and adder circuitry combining a register address and the value in the emulation register in response to the computer-executable process to rename the plurality of explicitly-addressable processor registers.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: April 20, 2004
    Assignee: Transmeta Corporation
    Inventors: Guillermo Rozas, David Dunn, David Dobrikin, Alex Klaiber, Daniel H. Nelsen
  • Patent number: 6724220
    Abstract: A microcontroller with a mixed analog/digital architecture including multiple digital programmable blocks and multiple analog programmable blocks in a communication array having a programmable interconnect structure. The single chip design is implemented by integration of programmable digital and analog circuit blocks that are able to communicate with each other. Robust analog and digital blocks that are flash memory programmable can be utilized to realize complex design applications that otherwise would require multiple chips and/or separate applications. The programmable chip architecture includes a novel array having programmable digital blocks that can communicate with programmable analog blocks using a programmable interconnect structure. The programmable analog array contains a complement of Continuous Time (CT) blocks and a complement of Switched Capacitor (SC) blocks that can communicate together.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: April 20, 2004
    Assignee: Cyress Semiconductor Corporation
    Inventors: Warren Snyder, Monte Mar
  • Patent number: 6721892
    Abstract: A dynamic performance circuit adjustment system and method that flexibly adjusts the performance of a logic circuit. The dynamic performance circuit adjustment system and method facilitates flexible power conservation. In one exemplary implementation, a dynamic performance adjustment control circuit controls performance adjustments to a logic circuit (e.g., a processor) and adjusts support functions for the logic circuit. The logic circuit performs operational functions (e.g., processing) or tasks that have different performance requirements. For example, some tasks performed by the logic circuit are required to be performed in a relatively short duration of time and other tasks performed by logic circuit have relatively longer time limitations.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: April 13, 2004
    Assignee: palmOne, Inc.
    Inventors: Neal Osborn, Francis J. Canova, Jr.
  • Patent number: 6718115
    Abstract: The present invention system and method facilitates efficient and relatively even distribution of illumination throughout a display screen. The system and method also facilitates clearer presentation of images, size reductions and conservation of limited power resources in handheld computers. In one embodiment of the present invention, a display illumination distribution system includes a light pipe, a lens, a wave-guide array and a light source. The light sources provides light waves that are directed along the wave guide array to the lens which directs the light waves into the light pipe. The light pipe conveys the light to the display and provides illumination. The routing of light through the wave-guide array confines the light waves to a wave guide and reduces the number of light waves that miss the light pipe.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: April 6, 2004
    Assignee: palmOne, Inc.
    Inventors: Shawn Gettemy, Rajiv Pethe
  • Patent number: 6718476
    Abstract: A method of synchronizing each local clock to a master clock in a data bus system is described. In an embodiment, the data bus system includes a plurality of nodes each having a local clock. Initially, a clock source for each local clock is the respective local clock generator of each node. During formation of a data bus configuration for the data bus system, each node assigns either a first identifier or a second identifier to each port that is coupled to another port. If a node has a first identifier port, the node changes a clock source for its local clock from the local clock generator to a particular clock recovery circuit that is coupled to the first identifier port. In another embodiment, a clock source for each local clock is initially the respective multiple mode clock recovery circuit (MMCRC) operating in the unlocked mode.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: April 6, 2004
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventor: Hisato Shima
  • Patent number: 6717509
    Abstract: A method and system for sending messages that indicate position. In one embodiment, the message transmission device includes a message transmission unit that is coupled to a position determination system. A server is adapted to receive messages from the message transmission device. In operation, a first message is generated at the message transmission device. The position of the message transmission device is determined and is included in the message. The message is then sent to the server. The server then generates a second message that complies with any instruction indicated in the first message that relates to position. An instruction that relates to position can indicate routing, format, performance of a task, etc. By indicating return routing in the instruction, a user can obtain location in any of a number of desired formats without the need to store extensive databases in the message transmission device.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: April 6, 2004
    Assignee: Trimble Navigation Limited
    Inventor: Michael D. Murphy
  • Patent number: 6717589
    Abstract: A non-modal help mode uses a verb/object paradigm where the current context of the application program for which the user needs help is determined and a help screen is provided which shows all of the actions that can be taken from that context. The non-modal help system includes a display screen providing a window for a number of output displays of an application program, a collection of pre-defined images mapped to the output displays by their context, a user input device for initiating non-modal help, and a non-modal displayer which displays one of the predefined images within the window in the place of its contextually-related output display. Preferably, the predefined images are stored as static bit map images including a dithered representation of the context in which the help was requested and a number of help balloons strategically positioned on the dithered image. Even more preferably, the balloons are positioned manually by a graphic artist to maximize their placement on the dithered image.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: April 6, 2004
    Assignee: Palm Source, Inc.
    Inventors: Pete Grillo, Alvin Pivowar
  • Patent number: 6715132
    Abstract: A method and system of rendering a workspace for helping a user design a microcontroller. A workspace having multiple windows is rendered. A first window of the workspace comprises at least one selectable user module wherein a user module is a pre-configured function operating with the microcontroller. Input indicating a selection of a user module is received. Responsive to the selection, a datasheet is automatically rendered in a second window of the workspace, wherein the datasheet provides technical details corresponding to the selected user module. In one embodiment, the workspace further comprises selectable tabs, wherein the tabs are rendered according to data of the datasheet. The tabs are operable for easy navigation of the datasheet.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: March 30, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manfred Bartz, Marat Zhaksilikov
  • Patent number: 6711593
    Abstract: A method and system for performing a live update of a manufacturing database. The user can automatically change database tables, add files, executable programs, and new modeling schema at remote sites from a central location. Manufacturing processes can be modified or changed entirely to introduce a new product line. Clients at the remote sites receive notification that a change in the database will occur so that works in progress can be completed. Clients complete their transactions but connections to the application server are maintained to facilitate resuming production. No new transactions are allowed at the remote site while the update is in progress. Downtime is minimal as the system is always running and the user can schedule the update at the most convenient time for individual sites. A rollback copy of the data is maintained to allow users to return to a version utilized prior to the last update.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: March 23, 2004
    Assignee: Camstar Systems, Inc.
    Inventors: Brian S. Gordon, Dale C. Quantz, David R. Preston
  • Patent number: 6711578
    Abstract: The present invention relates to a method for synchronizing databases in a network environment. Specifically, the present invention pertains to a method of using a set of hierarchical rules to enable an efficient and speedy synchronization between multiple copies of a database. The present invention enables an “n-way” synchronization of databases where “n”, the number of databases synchronized, is essentially any number more than two. In one embodiment, the present invention provides rule-based, n-way, synchronization by selecting a focus copy of the database, comparing the data records of the focus copy against the same records in other copies of the database to identify those deleted and modified; removing all the records indicated to be deleted, modifying those to be modified, and adding new record identifiers in the case of multiple modifications to the same record.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: March 23, 2004
    Assignee: PalmSource, Inc.
    Inventors: Kelly McCaw, Ravi Duggaraju, Cole Goeppinger, Brad Jarvinen
  • Patent number: 6709882
    Abstract: A method for making a resistive heater for a planar lightwave circuit. The method includes the step of depositing a resistive layer on a top clad of a planar lightwave circuit. An interconnect layer is subsequently deposited over the resistive layer. The resistive layer can be tungsten and the interconnect layer can be aluminum. The interconnect layer is then etched to define a heater interconnect, wherein the heater interconnect is disposed over the resistive layer and has a first width. The heater interconnect is then masked, and the resistive layer is etched to define a resistive heater. The resistive heater is disposed beneath the heater interconnect and has a second width larger than the first width.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: March 23, 2004
    Assignee: Lightwave Microsystems Corporation
    Inventors: Pamela S. Trammel, Jonathan G. Bornstein, David H. Menche
  • Patent number: 6710623
    Abstract: A configurable crossbar switching circuit within a programmable logic device capable of efficient, large scale switching and for cascading for implementing much larger switching functions. In one embodiment of the invention, the crossbar switch is integral to a programmable logic device. In one embodiment, the crossbar switching circuit is bus based, switching all of the conductors constituting a data bus substantially simultaneously and in their entirety as a bus unit. In one embodiment, the crossbar switching circuit performs switching operations unidirectionally. For the implementation of larger scale switching functions, one embodiment of the present invention exploits the cascadable character of the crossbar switching circuit. Cascading crossbar switches enables switching between differing numbers of inputs and outputs, even exceeding capacities of individual crossbars.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: March 23, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventors: Christopher W. Jones, Steven J. E. Wilton