Patents Represented by Attorney, Agent or Law Firm Wagner, Murabito & Hao
  • Patent number: 6903613
    Abstract: Embodiments of the present invention provide a method of centering an operating band of a voltage controlled oscillator around a desired operating frequency. In one embodiment, an adjustable feedback divider provides for driving an output signal to the top and bottom of the operating band. An adjustable period divider and counter provide a plurality of count values for use in determining a mid-point of the operating band. A capacitance bank provides for selectively adjusting a capacitance of the voltage controlled oscillator, thereby adjusting the operating band.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: June 7, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eric P. Mitchell, Mark R. Gehring
  • Patent number: 6901984
    Abstract: A method and system for controlling the processing of an IC chip assembly line using a central computer system and a common communication protocol. In one embodiment, a manufacturing execution system (MEM) is used as the computer system and the communications protocol is the standard semi equipment communications standard/generic equipment model (SECS/GEM). One or more equipment cell controllers (CC) may be used to communicate between the MES a plurality of in-line substations which comprise the assembly line. Automated vision camera systems may also communicate information to the MES via the CCs. In one embodiment, the MES maintains a database in memory comprising processing history of a die-strip and results of automated die-strip examination from the vision camera systems. In one embodiment, the die-strip may be of a ball grid array (BGA) type.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: June 7, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventor: Bo Soon Chang
  • Patent number: 6903564
    Abstract: A device aging determination circuit. Circuits are located on a device, including a first circuit operating at a first duty cycle and generating a first output and a second circuit operating at a second duty cycle different from said first duty cycle and generating a second output. A measuring circuit determines a difference in the first output and the second output, wherein the difference indicates an aging of the device. The aging is a representation of how much degradation the device has been exposed to, and allows for dynamic adjustment of operating parameters of the device to optimize performance.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: June 7, 2005
    Assignee: Transmeta Corporation
    Inventor: Shingo Suzuki
  • Patent number: 6901604
    Abstract: A method and system for performing chaincast communication to multiple communication systems (e.g., computer systems) within a system of coupled electronic devices (e.g., the Internet). The present invention provides a system wherein a broadcast source communicates primary broadcast information (e.g., encoded audio radio content, encoded audio/video television content, etc.) to a first group of electronic devices. The first group of electronic devices can be instructed by a chaincast manager to then communicate (e.g., forward or retransmit) the broadcast information to other electronic devices which devices can also be instructed to communicate to more devices, etc., thereby reducing the bandwidth requirements of the communication channel between the broadcast source and the first group of electronic devices. The chaincast manager, coupled to the Internet, is used to track and manage which devices are forwarding broadcast information to which other devices.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: May 31, 2005
    Assignee: Chaincast, Inc.
    Inventor: Jozsef Kiraly
  • Patent number: 6900506
    Abstract: A method for fabricating a junction field transistor for high-voltage applications. A lightly doped first epitaxial layer is formed on a highly doped substrate. A second epitaxial layer is deposited with a heavier dopant concentration than the first epitaxial layer. The second layer contains a control structure having a plurality of implanted gate regions and a source. A guard ring is formed to isolate the source and the control structure. The combination of the lightly doped first epitaxial layer and the guard ring enable the JFET to be operated with a breakdown voltage in excess of 100 volts. Multiple guard rings may be used to provide a breakdown voltage in excess of 150 volts.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: May 31, 2005
    Assignee: LovolTech, Inc.
    Inventors: Ho-Yuan Yu, Eric Johnson
  • Patent number: 6900663
    Abstract: Embodiments of the present invention relate to a low voltage differential signal driver (LVDS) circuit which comprises a current source, logic controlled switches for controlling the driver's output, an electronic load circuit coupled across the circuit, and a common-mode resistor feedback circuit coupled across the circuit, in parallel with the RC load, for tuning the driver's impedance. The driver is enabled to operate without op-amps and achieves optimum performance at 1.8 v supply voltages.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: May 31, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Weston Roper, Xiaoxin Feng
  • Patent number: 6900650
    Abstract: Systems and methods for reducing temperature dissipation during burn-in testing are described. Devices under test are each subject to a body bias voltage. The body bias voltage can be used to control junction temperature (e.g., temperature measured at the device under test). The body bias voltage applied to each device under test can be adjusted device-by-device to achieve essentially the same junction temperature at each device.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: May 31, 2005
    Assignee: Transmeta Corporation
    Inventors: Eric Chen-Li Sheng, David H. Hoffman, John Laurence Niven
  • Patent number: 6901276
    Abstract: A method and system for establishing a wireless connection between a portable computer system and a wireless network, particularly when the portable computer system goes out of coverage and a wireless connection needs to be re-established. The portable computer system has a main processor and a digital signal processor (DSP). The main processor is placed in a low power mode, conserving battery power. When the portable computer system goes out of coverage, broadcast channels used by the wireless network are scanned by the DSP instead of the main processor to identify channels that have sufficient signal strength for the wireless connection. Thus, the main processor remains in the low power mode. When the DSP identifies acceptable channels, it wakes up the main processor and identifies the channels having sufficient signal strength. The main processor then establishes a wireless connection using one of the channels identified by the DSP.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: May 31, 2005
    Assignee: PalmOne, Inc.
    Inventors: Craig S. Skinner, John Brown, William Wong
  • Patent number: 6898703
    Abstract: The present invention is a system and method of facilitating automatic generation of the source code in a convenient and efficient manner. In one embodiment of the present invention, a programmable system on a chip (PSoC) boot file generation method is utilized to create a boot file. A boot template file is created comprising special symbolic variable names that point to configuration registers within a programmable system on a chip (PSoC). User module selections are received with delineation of preferred configurations and functions associated with components of said programmable system on a chip (PSoC). Application files are automatically generated based upon user selections of PSoC configurations and functions. The special symbolic variable names are substituted or replaced with actual configuration register names. In one embodiment, a present invention programmable system on a chip (PSOC) boot file generation method also facilitates providing interrupt processing routines to the appropriate vector.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: May 24, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Matthew A. Pleis
  • Patent number: 6894385
    Abstract: An integrated circuit package is disclosed. The integrated circuit package includes a package substrate having a top and a bottom. Further, the integrated circuit package includes a plurality of bypass capacitors coupled to the bottom of the package substrate without a cavity. Moreover, the integrated circuit package includes an array of solder balls formed on the bottom of the package substrate. The array of solder balls facilitates surface mounting to a printed circuit board assembly. Also, the solder balls provide sufficient space between the printed circuit board assembly and the bypass capacitors. In an embodiment, the package substrate is an organic substrate.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: May 17, 2005
    Assignee: nVidia Corporation
    Inventors: Behdad Jafari, Ray Chen
  • Patent number: 6891429
    Abstract: Embodiments of the present invention relate to a switched-capacitor filter which comprises a first stage which itself comprises a first switched capacitor, a second stage which itself comprises a second switched capacitor, a switched capacitive element that couples the output of the first stage to the input of the second stage, and a non-switched capacitive element coupled from the output of the second stage to the input of the first stage to provide damping of the switched-capacitor filter. Both stages are implemented as inverting analog amplifiers and the filter is especially well suited to semiconductor manufacture. The switched capacitor filter is implemented as part of a user module in a programmable system on a chip, or PSoC.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: May 10, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Adrian B. Early, Harold Kutz
  • Patent number: 6892310
    Abstract: A method and a system for supplying power to a microcontroller with a single cell. One embodiment of the present invention discloses incorporation of a power supply pump circuit with the microcontroller and their dynamic interaction. The microcontroller sends its power requirements to the power supply pump circuit and in response, the power supply pump circuit controls the operating voltage with optimal efficiency. The dynamic update of power supply pump circuit results in an efficient use of the power supply pump circuit and thus results in a reduction of the number of dry cell batteries to only a single cell. Incorporation of the microcontroller and power supply pump circuit onto a single chip reduces the pin number requirements as well as the space required on the printed circuit board.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: May 10, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Warren Snyder
  • Patent number: 6892322
    Abstract: A method for applying instructions to a microprocessor during test mode is disclosed. In one embodiment of the present invention, first a test mode is entered, establishing the microprocessor as a slave and a test controller as a master. Then, the test controller fills an instruction queue with instructions to be executed. The instructions originate from a test interface. A memory, such as a program flash, coupled to the microprocessor is bypassed; thus, the microprocessor is forced to execute instructions from the instruction queue. In another embodiment, the test controller transfers to the instruction queue an instruction to be executed in the microprocessor. Then, the instruction causes instructions from a supervisory memory to be executed by the microprocessor. The supervisory memory comprises pre-determined test instructions.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 10, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventor: Warren Snyder
  • Patent number: 6888534
    Abstract: The present invention provides an apparatus enabling users to input/manipulate data for portable computer systems. In one embodiment, the present invention is comprised of a segmented keyboard adapted to be coupled with a portable computer system. In the present embodiment, the segmented keyboard is comprised of a first flippable portion and second flippable portion, both of which are hinged to the fixed portion of the segmented keyboard. A compliment of input keys are disposed within those portions. In the present embodiment, a first rotatable hinge is coupled with the segmented keyboard. A second rotatable hinge is coupled with the first rotatable hinge. In the present embodiment, an electrical connector is coupled with the second rotatable hinge. The electrical connector is adapted to provide a communicative link between the segmented keyboard and a coupled portable computer system. The present invention, when in a closed position, is of a size and shape approximate to a portable computer system.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: May 3, 2005
    Assignee: palmOne, Inc.
    Inventor: David Northway
  • Patent number: 6887768
    Abstract: A method and structure for a composite trench fill for silicon electronic devices. On a planar silicon substrate having a first deposited layer of oxide and a second deposited layer of polysilicon, a trench is etched. Deposition and etch processes using a combination of oxide and polysilicon are used to fabricate a composite trench fill. The trench bottom and a lower portion of the walls are covered with oxide. The remaining portion of the trench volume is filled with polysilicon. The method may be used for junction field effect transistors (JFETs) and metal oxide semiconductor field effect transistors (MOSFETs).
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: May 3, 2005
    Assignee: Lovoltech, Inc.
    Inventor: Ho-Yuan Yu
  • Patent number: 6889337
    Abstract: A method for repeatable application testing on a computer system for audible output generated by the application in conjunction with a screen reader or similar assistive technology. The method includes recording user inputs to a user application using a test input component. The user inputs are also accessed by a screen reader input component. Outputs of the user application are recorded using a test output component. The outputs of the user application are also accessed by a screen reader output component. The resulting screen reader outputs are recorded and are analyzed with respect to the recorded user inputs and the recorded outputs of the user application. The user inputs to the user application can be keyboard inputs or mouse inputs, and inputs of other input devices. The outputs of the user application can be graphical outputs or alphanumeric outputs for a display of the computer system.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: May 3, 2005
    Assignee: Oracle International Corporation
    Inventor: David Yee
  • Patent number: 6885210
    Abstract: A circuit and method thereof for measuring leakage current are described. The circuit includes a pre-charge device subject to a first backbias voltage and a leakage test device subject to a second backbias voltage. The leakage test device is coupled to the pre-charge device. The leakage test device is biased to an off state. A differential amplifier is coupled to the pre-charge device and the leakage test device. A delay unit is coupled to the differential amplifier and to an input of the pre-charge device. The pre-charge device is turned on and off at a frequency that corresponds to said leakage current.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: April 26, 2005
    Assignee: Transmeta Corporation
    Inventor: Shingo Suzuki
  • Patent number: 6886163
    Abstract: A method and system for allowing a single resource (e.g., a serial port) to be shared by multiple applications in a cooperative manner. The first application to use the resource defines a yield callback that is invoked when a second application makes a request for the serial port. The callback allows the first application to decide whether or not it will yield the resource to the second application. If the first application grants the request, the second application is allowed to use the resource; otherwise, the first application continues to use the resource and the second application receives an error message. The first application can be notified when the second application is finished with the resource so that the resource can be returned to the first application for use.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: April 26, 2005
    Assignee: Palm Source, Inc.
    Inventors: Gavin Peacock, Adam Hampson, David Kammer
  • Patent number: 6882000
    Abstract: Trench MIS devices including a thick insulative layer at the bottom of the trench are disclosed, along with methods of fabricating such devices. An exemplary trench MOSFET embodiment includes a thick oxide layer at the bottom of the trench, with no appreciable change in stress in the substrate along the trench bottom. The thick insulative layer separates the trench gate from the drain region at the bottom of the trench yielding a reduced gate-to-drain capacitance making such MOSFETs suitable for high frequency applications. In an exemplary fabrication process embodiment, the thick insulative layer is deposited on the bottom of the trench. A thin insulative gate dielectric is formed on the exposed sidewall and is coupled to the thick insulative layer. A gate is formed in the remaining trench volume. The process is completed with body and source implants, passivation, and metallization.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: April 19, 2005
    Assignee: Siliconix Incorporated
    Inventors: Mohamed N. Darwish, Frederick P. Giles, Kam Hong Lui, Kuo-In Chen, Kyle Terrill
  • Patent number: 6882172
    Abstract: A method of measuring the transistor leakage current. In one embodiment, the method involves driving a ring oscillator with a dynamic node driver having a leakage test device biased to an off state to produce a test signal. The test signal is extracted and the frequency is measured. The leakage current is estimated from the measured frequency.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: April 19, 2005
    Assignee: Transmeta Corporation
    Inventors: Shingo Suzuki, James Burr