Patents Represented by Attorney, Agent or Law Firm Ware & Freidenrich
  • Patent number: 6794127
    Abstract: Provided are methods of screening and identification of bio activities and bioactive molecules of interest using a capillary array system. More specifically, disclosed are methods of using optical detection and capillary array-based techniques for screening libraries and recovering bioactive molecules having a desired activity or a nucleic acid sequence encoding such bioactive molecules.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: September 21, 2004
    Assignee: Diversa Corporation
    Inventors: William Michael Lafferty, Jay M. Short, Martin Keller
  • Patent number: 6792593
    Abstract: In a pattern correction method, design layout data of a pattern designed by an automated layout unit is entered. An environmental profile is determined based on whether or not another graphics pattern exists at the surroundings of each correction target cell included in the entered design layout data. A target cell name is replaced with a prescribed cell name of correction pattern corresponding to the determined environmental profile by referencing a cell replacement table. An OPC correction pattern corresponding to the replaced cell name is imported from a cell library.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: September 14, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Makoto Takashima, Atsuhiko Ikeuchi, Koji Hashimoto, Mutsunori Igarashi, Masaaki Yamada
  • Patent number: 6792507
    Abstract: A cache system and method in accordance with the invention includes a cache near the target devices and another cache at the requesting host side so that the data traffic across the computer network is reduced. A cache updating and invalidation method are described.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: September 14, 2004
    Assignee: Maxxan Systems, Inc.
    Inventors: Lih-Sheng Chiou, Mike Witkowski, Hawkins Yao, Cheh-Suei Yang, Sompong Paul Olarig
  • Patent number: 6790133
    Abstract: A glide/burnish suspension assembly processes magnetic memory storage disks by “flying” a glide/burnish slider across the surface of a rotating disk. A glide/burnish suspension assembly as described herein includes mounting holes and a tooling hole that are compatible with existing Type-2/Type-4 glide/burnish testing fixtures. The glide/burnish suspension assembly includes a stainless steel loadbeam that is compatible with Type-8/Type-20 designs, i.e., the loadbeam is configured to provide the structural support and rigidity required for use with smaller glide/burnish sliders. In this respect, the loadbeam can accommodate 70%, 50%, 30%, and possibly smaller glide/burnish sliders. The glide/burnish suspension assembly facilitates the continued use of “older” Type-2/Type-4 fixtures to perform gliding and/or burnishing of disks using the “newer” Type-8/Type-20 loadbeams designed to support 30% sliders.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: September 14, 2004
    Assignee: Acropolis Engineering Inc.
    Inventor: Gustavo Nuño
  • Patent number: 6792319
    Abstract: A home automation system and method for automatic control of controlled devices throughout a home. A unique architecture of occupancy sensors includes entry/exit sensors for detecting movement through doorways that separate rooms in the home, room motion sensors for detecting room occupancy, spot sensors to detect occupancy of specific locations within the rooms, and house status sensors to detect the status of certain parameters of the home. A central controller communicates with the sensors and controlled objects over a communications network, where the sensors and controlled objects can be added to the system in a ‘plug and play’ manner. The central controller controls the controlled objects in response to the entry/exit sensors, room motion sensors, spot sensors and the house status sensors. This control is accomplished by assigning each room to one of a plurality of room occupancy states, which dictate how the controlled objects are controlled by the central controller.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: September 14, 2004
    Assignee: Destiny Networks, Inc.
    Inventor: Brent Bilger
  • Patent number: 6792419
    Abstract: A system and method for ranking hyperlinked documents, such as web pages, is provided wherein a stochastic backoff process is used to rank those hyperlinked documents. In more detail, the stochastic process is derived from a random walk through the pages of the web. First, a directed graph may be generated from a crawl wherein the nodes are documents in the crawl and a directed edge from one node A to another node B indicates the presence of a hyperlink from the corresponding document docA to document docB. Using a stochastic backoff process on this graph, a weight between 0 and 1 is assigned to each document so that the documents may be ranked according to the weights.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: September 14, 2004
    Assignee: Verity, Inc.
    Inventor: Prabhakar Raghavan
  • Patent number: 6787943
    Abstract: A linear voice coil actuator is disclosed which includes field subassemblies each including a field blank, and in which at least a one of the field subassemblies includes magnets of alternating polarity positioned on the field blank to form interleaved-magnetic circuits in a direction of motion of the linear voice coil actuator. The field subassemblies are positioned with respect to one another to form a gap between the field subassembly having the magnets, and another of the field subassemblies. Also included is a coil assembly that includes coils positioned in a plane within the gap, wherein the plane is substantially parallel to the direction of motion of the linear voice coil actuator.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: September 7, 2004
    Assignee: Bei Technologies, Inc.
    Inventor: Mikhail Godkin
  • Patent number: 6789152
    Abstract: A storage router (56) and storage network (50) provide virtual local storage on remote SCSI storage devices (60, 62, 64) to Fiber Channel devices. A plurality of Fiber Channel devices, such as workstations (58), are connected to a Fiber Channel transport medium (52), and a plurality of SCSI storage devices (60, 62, 64) are connected to a SCSI bus transport medium (54). The storage router (56) interfaces between the Fiber Channel transport medium (52) and the SCSI bus transport medium (54). The storage router (56) maps between the workstations (58) and the SCSI storage devices (60, 62, 64) and implements access controls for storage space on the SCSI storage devices (60, 62, 64). The storage router (56) then allows access from the workstations (58) to the SCSI storage devices (60, 62, 64) using native low level, block protocol in accordance with the mapping and the access controls.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: September 7, 2004
    Assignee: Crossroads Systems, Inc.
    Inventors: Geoffrey B. Hoese, Jeffry T. Russell
  • Patent number: 6789250
    Abstract: A chip division information storage unit configured to register chip division information; a chip layout generation unit configured to generate master mask chip layout information by sequentially allotting sub-patterns to a master mask in an order beginning with the largest from the plurality of sub-patterns; a master mask chip layout information storage unit configured to register the master mask chip layout information; a chip pattern data generation unit configured to generate master mask chip pattern data by referencing the reticle chip pattern data and divide each chip in accordance with the master mask chip layout data; a master mask pattern data information storage unit configured to register the master mask chip pattern data; and a pattern data generation unit configured to generate master mask pattern data by referencing the master mask chip layout information and the master mask chip pattern data, are provided.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: September 7, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Susumu Watanabe, Mitsuhiro Yano
  • Patent number: 6788595
    Abstract: Predetermined data is stored in first and second predetermined locations of a memory. The first location may be in a first part of the memory, and the second location may be in a redundant part of the memory. At power up or reset, the first predetermined location of the memory successively is read and compared to data stored in a register until the comparison indicates a match for a predefined number of consecutive reads and comparisons. The successive reading may be stopped if the number of comparisons indicating a failure equals another predefined number of times. The data stored in the second predetermined location also is read. This data may be compared to the data previously read from the second predetermined location. The reading and comparing from the first predetermined location and the reading from the second predetermined location are continued until the number of times data is read from the second predetermined location equals a third predetermined number.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: September 7, 2004
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hung Q. Nguyen, Sang Thanh Nguyen, Loc B. Hoang, Tam M. Nguyen
  • Patent number: 6788608
    Abstract: A digital multilevel non-volatile memory integrated system includes an apparatus and method for high voltage, high precision pulsing generation. A voltage generator includes a low voltage high speed generator, a low voltage to high voltage high speed level translator, and a high voltage driver. A precise and stable high voltage level is attained across power supply, process, or temperature variation. The power may be optimized at the high voltage supply as tradeoff with power in the low voltage supply. A ping-pong operation sets up a high voltage level and the high voltage pulsing is output in a ping-pong fashion. A slew rate control circuit slows the input to achieve faster settling times. The high voltage is shaped by low voltage switching, HV fast switching and ramp circuit control. The high voltage pulsing may be fast and precise to permit real time control of the pulse parameters to adapt to memory cell attributes.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: September 7, 2004
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, William John Saiki, Jack Edward Frayer, Michael Stephen Briner
  • Patent number: 6783933
    Abstract: A novel T-type calcium channel (CACNA1G) is provided, as are polynucleotides encoding the same. CACNA1G has been implicated in cellular proliferative disorders. More specifically, it has been observed that the methylation state of specific regions within CpG island associated with the CACNA1G gene correlates with a number of cancerous phenotypes involving a variety of tissue and cell types. Also provided are methods for detecting cellular proliferative disorders by determining the methylation state of genes or regulatory regions associated therewith, including CACNA1G, as well as kits containing reagents for performing invention methods.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: August 31, 2004
    Assignee: The Johns Hopkins University School of Medicine
    Inventor: Jean-Pierre Issa
  • Patent number: 6783919
    Abstract: The invention relates to a TFT-LCD high-performance stripper composition for a photoresist, and more particularly to a stripper composition for a photoresist comprising: 20-60 wt % of monoethanolamine, 15-50 wt % of N,N-dimethylacetamide, 15-50 wt % of carbitol, and 0.1-10 wt % of gallic acid. The invention also provides a stripper composition for a photoresist comprising: 20-60 wt % of monoethanolamine, 15-50 wt % of N,N-dimethylacetamide, and 15-50 wt % of carbitol. The stripper composition for a photoresist of the invention significantly reduces stripping time when applied to the TFT-LCD manufacturing process and leaves no impurity particles. By allowing the hard baking and ashing processes to be omitted, the gate process line can be simplified, which enables cost reduction. In addition, when it is applied to a process wherein silver (Ag) is used as reflective/transflective layer, it offers stripping ability and corrosion resistance of the pure Ag layer.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: August 31, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Sik Park, Sung-Chul Kang, Hong-Je Cho, An-Na Park
  • Patent number: 6782440
    Abstract: Systems and methods are described for resource locking and thread synchronization in a multiprocessor environment. One method includes restricting access to a protected shared resource by use of a lock; issuing the lock to a requesting software to permit access to the protected shared resource; indicating the issuance of the lock to the requesting software by writing a first value to a lock register; freeing the lock, thereby making the lock available for use by another requesting software, after the requesting software completes accessing the protected shared resource; and indicating that the lock is free by writing a second value to the lock register.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: August 24, 2004
    Assignee: T.N.S. Holdings, Inc.
    Inventor: Chris D. Miller
  • Patent number: 6782411
    Abstract: Networked processors application provide and operating system in one machine, application proxy and operating system on another machine, and virtualized input or output coupling to operating system of the another machine. Client responds to applied input and executes application proxy to apply output, while server executes application, and proxy interface sends applied input to server so server executes application per applied input and generates applied output. Proxy interface sends generated output for virtual display by client.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: August 24, 2004
    Assignee: Tarantella, Inc.
    Inventors: Prashant Navare, Randall G. Menna
  • Patent number: 6781576
    Abstract: A wireless input apparatus by which a user can input various types of information is provided. A conventional remote control of electronic equipment has many buttons or switches to perform various kinds of functions. Therefore, its operability is likely to be lost because of the complexity and the bulkiness of the remote control. The wireless input apparatus has a LCD to display a screen for operation and a 3-D mouse for a user to operate. The user can input various types of operations on the screen and remotely control the equipment. Moreover, a pressure-sensitive resistance film is applied to the 3-D mouse for sensing pressure applied by the user. Even if a very slight amount of pressure is applied to the mouse, the pressure can be effectively detected.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: August 24, 2004
    Assignee: Sensation, Inc.
    Inventor: Yasuhiro Tamura
  • Patent number: 6780418
    Abstract: A method of detecting a member of the taxa actinomycetos is provided. A method also is provided for detecting mycothiol or precursor thereof. An antibody is provided which binds to mycothiol or a mycothiol precursor. A method is further provided for diagnosis of a subject having or at risk of having an actinomycetes-associated disorder. A method is also provided for identifying a sample with altered production of mycothiol or a precursor thereof. A method is provided for detecting mycothiol or precursor thereof in a bacterial colony. Kits are also disclosed which arc useful for detecting the presence of mycothiol or precursor thereof in a sample.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: August 24, 2004
    Assignee: The Regents of the University of California
    Inventors: Robert C. Fahey, Gerald L. Newton, Maria Margarita D. Unson, Charles E. Davis, Sara J. Anderberg
  • Patent number: 6780975
    Abstract: Engineered fluorescent proteins, nucleic acids encoding them and methods of use are provided.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: August 24, 2004
    Assignees: The Regents of the University of California, Vertex Pharmaceuticals (San Diego) LLC, State of Oregon Acting by and through the State Board of Higher Education on behalf of the University of Oregon
    Inventors: Roger Y. Tsien, S. James Remington, Andrew B. Cubitt, Roger Heim, Mats F. Ormö
  • Patent number: 6780856
    Abstract: The invention relates to methods of stabilizing in an aqueous medium cobalt (III) Schiff base complexes and stabilized cobalt (III) Schiff base compounds therefrom.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: August 24, 2004
    Assignee: California Institute of Technology
    Inventors: Thomas J. Meade, Ofer Blum, Harry B. Gray
  • Patent number: 6782016
    Abstract: Systems and methods are described for laser array synchronization using master laser injection of broad area lasers. A method, includes: master laser injecting a plurality of broad area lasers; and externally cavity coupling the plurality of broad area lasers. A method, includes: master laser injecting a plurality of broad area lasers; and externally Q switch coupling the plurality of broad area lasers. A method, includes: injection synchronizing a plurality of pulsed broad area lasers using a signal source; modulating the plurality of pulsed broad area lasers using the signal source; and externally coupling the plurality of pulsed broad area lasers.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: August 24, 2004
    Assignee: UT-Battelle, L.L.C.
    Inventors: Yehuda Y. Braiman, Yun Liu