Patents Represented by Attorney, Agent or Law Firm Wells, St. John, Roberts, Gregory & Matkin, P.S.
  • Patent number: 6220516
    Abstract: The present invention teaches a method of manufacturing an enclosed transceiver, such as a radio frequency identification (“RFID”) tag. Structurally, in one embodiment, the tag comprises an integrated circuit (IC) chip, and an RF antenna mounted on a thin film substrate powered by a thin film battery. A variety of antenna geometries are compatible with the above tag construction. These include monopole antennas, dipole antennas, dual dipole antennas, a combination of dipole and loop antennas. Further, in another embodiment, the antennas are positioned either within the plane of the thin film battery or superjacent to the thin film battery.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: April 24, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Mark E. Tuttle, John R. Tuttle, Rickie C. Lake
  • Patent number: 6222215
    Abstract: Methods of forming capacitors and related integrated circuitry are described. In a preferred embodiment, the capacitors form part of a dynamic random access memory (DRAM) cell. According to one aspect of the invention, a first insulating layer is formed over a semiconductive material layer. A conductive gate is formed over the semiconductive material layer. A second insulating layer is formed over the gate and thereafter etched to form a capacitor container. In one implementation, such etch is conducted to outwardly expose the semiconductive material layer. In another implementation, such etch continues into the semiconductive material layer. In yet another implementation, such etch is conducted completely through the semiconductive material layer and into the first insulating layer. In a preferred implementation, a storage capacitor is formed within the capacitor container which extends both elevationally above and elevationally below the gate.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: April 24, 2001
    Assignee: Micron Technology, Inc.
    Inventor: John K. Zahurak
  • Patent number: 6220528
    Abstract: A fuel injector comprises an outer valve needle, an inner valve needle slidable within a bore formed in the outer valve needle, an inner end of the inner valve needle being located within the bore, the inner end of the inner valve needle being provided with a recess whereby the application of fuel under pressure to the bore deforms the inner valve needle to form a substantially fluid tight seal between the inner and outer valve needles. The inner and outer needles may be exposed to the fuel pressure within a common control chamber, a single actuator arrangement being used to control movement of both needles.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: April 24, 2001
    Assignee: Lucas Industries
    Inventors: Michael Peter Cooke, Godfrey Greeves
  • Patent number: 6221708
    Abstract: The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a first layer of conductively doped semiconductive material and only one layer of conductive nitride. The integrated circuitry further comprises a second field effect transistor supported by the substrate. The second field effect transistor comprises a second transistor gate assembly which includes a second layer of conductively doped semiconductor material and at least two layers of conductive nitride. The invention also encompasses a field effect transistor assembly which includes a channel region and an insulative material along the channel region. The transistor assembly further includes a gate stack proximate the channel region. The gate stack includes a first conductive nitride layer separated from the channel region by the insulative material.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: April 24, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Fernando Gonzalez, Chandra Mouli
  • Patent number: 6223317
    Abstract: The present invention includes bit synchronizers and methods of synchronizing and calculating error. One method of synchronizing with a data signal in accordance with the present invention includes providing a data signal having a first portion and a second portion, generating a timing signal, first adjusting the timing signal during the first portion of the data signal, accumulating a history value during the first portion of the data signal, and second adjusting the timing signal during a second portion of the data signal using the history.
    Type: Grant
    Filed: February 28, 1998
    Date of Patent: April 24, 2001
    Assignee: Micron Technology, Inc.
    Inventors: George E. Pax, David K. Ovard
  • Patent number: 6221711
    Abstract: Methods of electrically contacting to conductive plugs, methods of forming contact openings, and methods of forming dynamic random access memory circuitry are described. In one embodiment, a pair of conductive contact plugs are formed to project outwardly relative to a semiconductor wafer. The plugs have respective tops, one of which being covered with different first and second insulating materials. An opening is etched through one of the first and second insulating materials to expose only one of the tops of the pair of plugs. Electrically conductive material is formed within the opening and in electrical connection with the one plug. In a preferred embodiment, two-spaced apart conductive lines are formed over a substrate and conductive plugs are formed between, and on each side of the conductive lines. The conductive plug formed between the conductive lines provides a bit line contact plug having an at least partially exposed top portion.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: April 24, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Martin Ceredig Roberts, Kunal R. Parekh
  • Patent number: 6216359
    Abstract: A gas fired garment drier is described in which a base is provided with an air conduit including an internal air passageway leading from a bottom end to a top end. A gas burner is positioned adjacent the bottom end of the conduit. A heat exchanger is situated adjacent the gas burner and leads into the air conduit and the air passageway. The heat exchanger includes a convection air duct extending into the air conduit within the air passageway. A garment support is provided adjacent the top end of the air conduit.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: April 17, 2001
    Assignee: Peet Shoe Dryer, Inc.
    Inventor: Gene W. Peet
  • Patent number: 6218742
    Abstract: A selective ignition switch for a vehicle provided with two motors is disclosed herein. The selective ignition switch includes a selective switch assembly, a lock assembly to energize the selective switch assembly and a key to toggle the lock assembly. The selective switch assembly and the lock assembly are connected to a controller that activate the selective ignition switch mechanism relay the signals from the selective switch assembly to the two ignition systems of the vehicle.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: April 17, 2001
    Assignee: Megatech Electro, Inc.
    Inventors: Yvan Lafontaine, Daniel Desmeules
  • Patent number: 6216749
    Abstract: A solenoid unit for a weaving device is described and which includes a frame; a plurality of eyelets mounted on the frame and individually movable with respect to the frame; a support member releasably coupled to the frame; and a plurality of solenoids mounted on the support member, and wherein each solenoid controls the movement of at least one eyelet.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: April 17, 2001
    Assignee: WIS Seaming Equipment, Inc.
    Inventors: Chester F. Kutzleb, Roger King, Anders Bostrom, Robert Kellogg
  • Patent number: 6216748
    Abstract: A weaving device is described which includes a frame and an eyelet movably mounted thereto. A solenoid is also mounted to the frame and produces a magnetic field when energized. A latch is mounted on the frame for movement thereon to affect movement of the eyelet. A contact member is rotatably mounted to the latch and is magnetically attracted to the solenoid when energized.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: April 17, 2001
    Assignee: WIS Seaming Equipment, Inc.
    Inventors: Chester F. Kutzleb, Roger King, Anders Bostrom, Robert Kellogg
  • Patent number: 6218237
    Abstract: A method of forming a capacitor includes, a) providing a node to which electrical connection to a first capacitor plate is to be made; b) then, providing a finned lower capacitor plate in ohmic electrical connection with the node using no more than one photomasking step; and c) providing a capacitor dielectric layer and a conductive second capacitor plate layer over the conductive layer.
    Type: Grant
    Filed: January 3, 1996
    Date of Patent: April 17, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Pierre C. Fazan
  • Patent number: 6216964
    Abstract: A fuel injector comprising a valve needle slidable within a bore formed in a nozzle body, the valve needle including an axially extending fuel supply passage which communicates with at least one outlet opening provided in the valve needle, the end of the supply passage adjacent the at least one outlet opening being closed by a plug. The plug has an inner end region which is arranged to be located, in use, adjacent the, or at least one of the, outlet openings, and shaped to modify the flow characteristics of the fuel flow upstream of at least one of the outlet openings.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: April 17, 2001
    Assignee: Lucas Industries
    Inventor: Malcolm David Dick Lambert
  • Patent number: 6218035
    Abstract: A proton exchange membrane fuel cell power system for producing electrical power is described and which includes a plurality of discrete fuel cell modules having at least two membrane electrode diffusion assemblies, each of the membrane electrode diffusion assemblies having opposite anode and cathode sides; a pair of current collectors are individually disposed in juxtaposed ohmic electrical contact with opposite anode and cathode sides of each of the membrane electrode diffusion assemblies; and individual force application assemblies apply a given force to the pair current collectors and the individual membrane electrode diffusion assemblies. The proton exchange membrane fuel cell power system also includes an enclosure mounting a plurality of subracks which receive the discrete fuel cell modules. Additionally, a control system is disclosed which optimizes the performance parameters of the discrete proton exchange membrane fuel cell modules.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: April 17, 2001
    Assignee: Avista Laboratories, Inc.
    Inventors: William A. Fuglevand, Shiblihanna I. Bayyuk, Greg Alden Lloyd, Peter David DeVries, David R. Lott, John P. Scartozzi, Gregory M. Somers, Ronald G. Stokes
  • Patent number: 6214127
    Abstract: Methods of processing electronic device workpieces and methods of positioning electronic device workpieces are provided.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: April 10, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Jeff Mendiola
  • Patent number: 6214727
    Abstract: The invention encompasses DRAM constructions, capacitor constructions, conductive contacts, integrated circuitry, methods of forming DRAM constructions, and methods of forming capacitor constructions.
    Type: Grant
    Filed: February 11, 1997
    Date of Patent: April 10, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Kunal R. Parekh
  • Patent number: 6214652
    Abstract: A thin film transistor includes: a) a thin film transistor layer comprising a source region, a channel region and a drain region; the thin film transistor layer further comprising a drain offset region positioned between the drain region and the channel region; b) the channel region being substantially polycrystalline and having a first average crystalline grain size; and c) the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size. A method for forming such a construction using polycrystalline materials, preferably polysilicon, and an amorphizing silicon implant with subsequent recrystallization is also disclosed.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: April 10, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Shubneesh Batra, Monte Manning, Sanjay Banerjee, John Damiano, Jr.
  • Patent number: 6215151
    Abstract: Integrated circuitry and methods of forming integrated circuitry are described. In one implementation, a common masking step is utilized to provide source/drain diffusion regions and halo ion implantation or dopant regions relative to the source/drain regions within one well region of a substrate; and well contact diffusion regions within another well region of the substrate. The common masking step preferably defines at least one mask opening over the substrate within which the well contact diffusion region is to be formed, and the mask opening is suitably dimensioned to reduce the amount of halo ion implantation dopant which ultimately reaches the substrate therebelow. According to one aspect, a plurality of mask openings are provided. According to another aspect, a suitably-dimensioned single mask opening is provided.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: April 10, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Zhiqiang Wu, Luan C. Tran, Robert Kerr, Shubneesh Batra, Rongsheng Yang
  • Patent number: 6214687
    Abstract: A method of forming a capacitor includes, a) providing a node to which electrical connection to a first capacitor plate is to be made; b) then, providing a finned lower capacitor plate in ohmic electrical connection with the node using no more than one photomasking step; and c) providing a capacitor dielectric layer and a conductive second capacitor plate layer over the conductive layer.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: April 10, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Pierre C. Fazan
  • Patent number: 6212114
    Abstract: Methods of identifying defects in an array of memory cells and related integrated circuitry are described. In one embodiment, an array of memory cells is provided having a plurality of complementary digit line pairs. The digit line pairs comprise individual digit lines D0n, D0n*, where n>1. The complementary digit line pairs are configured to be placed into different states during sensing operations of the array. A defect-identifying signal is applied to the array by driving both digit lines of at least one digit line pair to a common test state, and the cell plate to another different test state with the use of only one dedicated bus line. In another embodiment, a pair of memory cells is provided each having an access transistor and a capacitor. The capacitor has a cell plate. Write circuitry is operably coupled with the pair of memory cells through respective individual input lines. The write circuitry is configured to write data into the memory cells.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: April 3, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Timothy B. Cowles
  • Patent number: 6211785
    Abstract: A method of manufacturing and testing an electronic circuit, the method comprising forming a plurality of conductive traces on a substrate and providing a gap in one of the conductive traces; attaching a circuit component to the substrate and coupling the circuit component to at least one of the conductive traces; supporting a battery on the substrate, and coupling the battery to at least one of the conductive traces, wherein a completed circuit would be defined, including the traces, circuit component, and battery, but for the gap; verifying electrical connections by performing an in circuit test, after the circuit component is attached and the battery is supported; and employing a jumper to electrically close the gap, and complete the circuit, after verifying electrical connections.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: April 3, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Mark E. Tuttle, Rickie C. Lake, Curtis M. Medlen