Patents Represented by Attorney, Agent or Law Firm Wells, St. John, Roberts, Gregory & Matkin, P.S.
  • Patent number: 6232677
    Abstract: The present invention provides an apparatus and method of resetting an electric device. One method according to the present invention includes providing an electrical device including a power supply and an electrical component; providing an interconnect; electrically coupling the power supply and the electrical component using the interconnect; shorting the power supply of the electrical device following the coupling; removing the short; and applying power from the power supply to the electrical component via the interconnect. Another method according to the present invention includes providing a substrate; supporting a power supply using the substrate; supporting an electrical component using the substrate; coupling the power supply and the electrical component using an interconnect; temporarily shorting the power supply; and applying power via the interconnect to the electrical component using the power supply.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: May 15, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Mark E. Tuttle, Scott T. Trosper
  • Patent number: 6229322
    Abstract: The present invention includes an electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus.
    Type: Grant
    Filed: August 21, 1998
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventor: David R. Hembree
  • Patent number: 6227984
    Abstract: The present invention provides golf club swing analyzers and golf swing analysis methods. According to one aspect of the present invention, a golf club swing analyzer comprises: a housing; a light emission device configured to emit reference light toward a location in the path of a golf club swung adjacent the housing; a light reception device supported by the housing and configured to receive reference light emitted from the light emission device and reflected from the swung golf club; and discrimination circuitry coupled with the light reception device and configured to distinguish the reflected reference light received from the light emission device from incidental light, the discrimination circuitry being further configured to generate an indication signal responsive to the reception of reflected reference light.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: May 8, 2001
    Inventor: Charles H. Blankenship
  • Patent number: 6229451
    Abstract: The present invention includes an apparatus and method of monitoring a power transmission line. According to one embodiment, an apparatus adapted to monitor a power transmission line supported by a plurality of structures includes a first measuring device located at a position in space; and a second measuring device coupled with the power transmission line, the first measuring device and second measuring device being configured to provide position information of the second measuring device relative to the first measuring device.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: May 8, 2001
    Assignee: LineSoft Corporation
    Inventor: Fred A. Brown
  • Patent number: 6228738
    Abstract: The invention encompasses DRAM constructions, capacitor constructions, integrated circuitry, and methods of forming DRAM constructions, integrated circuitry and capacitor constructions. The invention encompasses a method of forming a capacitor wherein: a) a first layer is formed; b) a semiconductive material masking layer is formed over the first layer; c) an opening is etched through the masking layer and first layer to a node; d) a storage node layer is formed within the opening and in electrical connection with the masking layer; e) a capacitor storage node is formed from the masking layer and the storage node layer; and f) a capacitor dielectric layer and outer capacitor plate are formed operatively proximate the capacitor storage node.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Kunal R. Parekh, John K. Zahurak
  • Patent number: 6228710
    Abstract: The invention encompasses methods of forming DRAM constructions, methods of forming capacitor constructions, DRAM constructions, and capacitor constructions. The invention includes a method in which a) a first layer is formed over a node location; b) a semiconductive material masking layer is formed over the first layer; c) an opening is formed through the semiconductive material masking layer and the first layer to the node location; d) an upwardly open capacitor storage node layer is formed within the opening; e) a storage node is formed from the masking layer and the storage node layer; and f) a capacitor dielectric layer and a capacitor plate are formed over the storage node.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Kunal R. Parekh, John K. Zahurak
  • Patent number: 6229441
    Abstract: The present invention provides electronic devices and methods of forming electronic devices. One embodiment of the present invention provides an electronic device which includes a substrate having a support surface; a first conductor over the support surface of the substrate, the first conductor including a predetermined portion which defines a first area and a second area of the support surface; at least one electrical component coupled with the first conductor; and a second conductor comprising a conductive adhesive, the second conductor being positioned over the support surface of the substrate and across the predetermined portion of the first conductor, the conductive adhesive being configured to electrically couple the first area with the second area.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Rickie C. Lake
  • Patent number: 6229212
    Abstract: An electrical interconnection method includes: a) providing two conductive layers separated by an insulating material on a semiconductor wafer; b) etching the conductive layers and insulating material to define and outwardly expose a sidewall of each conductive layer; c) depositing an electrically conductive material over the etched conductive layers and their respective sidewalls; and d) anisotropically etching the conductive material to define an electrically conductive sidewall link electrically interconnecting the two conductive layers. Such is utilizable to make thin film transistors and other circuitry.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Charles H. Dennison, Monte Manning
  • Patent number: 6228538
    Abstract: The present invention includes structures, lithographic mask forming solutions, mask forming methods, field emission display emitter mask forming methods, and methods of forming plural field emission display emitters. One aspect of the present invention provides a mask forming method including forming a masking layer over a surface of a substrate; screen printing plural masking particles over a surface of the masking layer; and removing at least portions of the masking layer using the masking particles as a mask. Another aspect of the present invention provides a method of forming plural field emission display emitters.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventors: John Michiels, David Wells, Eric J. Knappenberger, James J. Alwan
  • Patent number: 6227141
    Abstract: Plasma enhanced chemical vapor deposition (PECVD) reactors and methods of effecting the same are described. In a preferred implementation, a PECVD reactor includes a processing chamber having a first electrode therewithin. A second electrode is disposed within the chamber and is configured for supporting at least one semiconductor workpiece for processing. A first RF power source delivers RF power of a first frequency to the first electrode. A second RF power source delivers RF power of a second frequency to the second electrode. Preferably the first and second frequencies are different from one another, and even more preferably, the first frequency is greater than the second frequency. The preferred reactor includes a thermocouple which provides temperature information relative to one of the electrodes.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: May 8, 2001
    Assignees: Micron Technology, Inc., Applied Materials, Inc.
    Inventors: Sujit Sharan, Gurtej S. Sandhu, Paul Smith
  • Patent number: 6229987
    Abstract: An interrogator for use in a backscatter system, the interrogator comprising an antenna configured to receive a backscatter signal; an IQ downconverter coupled to the antenna and configured to downconvert the backscatter signal to produce I and Q signals; a combiner coupled to the IQ downconverter and configured to combine the I and Q signals to produce a combined signal; and an analog to digital converter coupled to the combiner and configured to convert the combined signal to a digital signal. A method of communications in a backscatter system, the method comprising receiving a backscatter signal; downconverting the backscatter signal with an IQ downconverter to produce I and Q signals; combining the I and Q signals to produce a combined signal; and converting the combined signal to a digital signal.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Roy Greeff, David K. Ovard
  • Patent number: 6226300
    Abstract: A method of establishing wireless communications between an interrogator and individual ones of multiple wireless identification devices, the method comprising utilizing a tree search method to establish communications without collision between the interrogator and individual ones of the multiple wireless identification devices, a search tree being defined for the tree search method, the tree having multiple levels representing subgroups of the multiple wireless identification devices, the number of devices in a subgroup in one level being half of the number of devices in the next higher level, the tree search method employing level skipping wherein at least one level of the tree is skipped.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Don Hush, Clifton W. Wood, Jr.
  • Patent number: 6225675
    Abstract: A method of fabricating integrated circuitry comprises forming a conductive line having opposing sidewalls over a semiconductor substrate. An insulating layer is then deposited. The insulating layer is etched proximate the line along at least a portion of at least one sidewall of the line. An insulating spacer forming layer is then deposited over the substrate and the line. It is anisotropically etched to form an insulating sidewall spacer. A method of forming a local interconnect comprises forming at least two transistor gates over a semiconductor substrate. A local interconnect layer is deposited to overlie at least one of the transistor gates and interconnect at least one source/drain region of one of the gates with semiconductor substrate material proximate another of the transistor gates.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc
    Inventor: H. Montgomery Manning
  • Patent number: 6225232
    Abstract: In one aspect, the invention encompasses a semiconductor processing method. Two silicon-comprising masses are provided. A first of the two masses comprises a higher dopant concentration than a second of the two masses. The two masses are exposed to common conditions which etch the second mass faster than the first mass. In another aspect, the invention encompasses another embodiment semiconductor processing method. A substrate is provided. The substrate has at least one doped polysilicon mass formed thereover, and has regions not proximate the at least one doped polysilicon mass. Roughened polysilicon is formed along the at least one doped polysilicon mass and over said regions of the substrate. A dopant concentration in the roughened polysilicon is increased along the at least one doped polysilicon mass relative to any dopant concentration in the roughened polysilicon over said regions of the substrate.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Whonchee Lee
  • Patent number: 6224084
    Abstract: A trailer coupler is described in which a pair of elongated hitch capturing members, each having a hitch socket part at a forward end are mounted to a base member for selective movement forward and rearwardly between a forwardly extended and open hitch receiving position wherein the hitch socket parts are separated and a rearwardly retracted and closed hitch capturing position wherein the hitch socket parts are closed together. A hitch positioner member is movably mounted to the base member and including a hitch abutment surface positioned between the hitch capturing members in the forwardly extended and open hitch receiving position. The hitch positioner member is connected to at least one of the hitch capturing members to move the hitch capturing member rearwardly in response to engagement by a rearwardly moving hitch.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: May 1, 2001
    Inventors: Ross Allen Ray, Steven D. Vermillion
  • Patent number: 6224942
    Abstract: The invention includes methods of forming aluminum containing lines having titanium nitride containing layers thereon, and preferably by physical vapor deposition. In one aspect, a first layer including at least one of elemental aluminum or an aluminum alloy is formed over a substrate. A second layer including an alloy of titanium and the aluminum from the first layer is formed. The alloy has a higher melting point than that of the first layer. A third layer including titanium nitride is formed over the second layer. The first, second and third layers are formed into a conductive line. In one aspect, a method of forming an aluminum containing line having a titanium nitride containing layer thereon includes physical vapor depositing a first layer having at least one of elemental aluminum or an aluminum alloy over a substrate.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Shane P. Leiphart
  • Patent number: 6225620
    Abstract: A peach sorting system (110) conveys peaches (114) on a conveyor belt (112) past an inspection zone (126) that is lighted by an illumination source (90) radiating a number of emission peaks over visible and infrared portions of the spectrum. The illumination source generates the radiation from an Indium Iodide lamp (92) that is reflected off a parabolic reflector (94) and through a “soda straw” collimator (100) to illuminated the peaches. A detector system (118) employs line scanning visible and infrared cameras (142, 140) to sense visible and IR wavelength reflectance value differences existing between peach meat (124) and peach pit or pit fragments (126). Because there is a reversal in the reflectance values between the visible and infrared wavelengths, a data subtraction technique (150) is employed to enhance the detection contrast ratio.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: May 1, 2001
    Assignee: Key Technology, Inc.
    Inventors: Duncan B. Campbell, James Ewan, Cliff J. Leidecker, H. Parks Squyres
  • Patent number: 6225147
    Abstract: In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in semiconductive material. A conductive line is formed which is laterally spaced from the diffusion region. The conductive line is preferably formed relative to and within isolation oxide which separates substrate active areas. The conductive line is subsequently interconnected with the diffusion region. According to another preferred implementation, an oxide isolation grid is formed within semiconductive material. Conductive material is formed within the oxide isolation grid to form a conductive grid therein. Selected portions of the conductive grid are then removed to define interconnect lines within the oxide isolation grid. According to another preferred implementation, a plurality of oxide isolation regions are formed over a semiconductive substrate.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Wendell P. Noble
  • Patent number: 6225172
    Abstract: A method of forming a field effect transistor includes, a) providing a silicon substrate having impurity doping of a first conductivity type; b) providing source and drain diffusion regions of a second conductivity type within the silicon substrate, the source region and the drain region being spaced from one another to define a channel region therebetween within the silicon substrate; c) providing a gate relative to the silicon substrate operatively adjacent the channel region; and d) providing respective ohmic electrical contacts to the source region and the drain region, the electrical contact to the source region comprising a substrate leaking junction, the electrical connection to the drain region not comprising a substrate leaking junction. A field effect transistor is also disclosed.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Monte Manning
  • Patent number: D441541
    Type: Grant
    Filed: August 26, 1999
    Date of Patent: May 8, 2001
    Assignee: Potlatch Corporation
    Inventors: Steven H. Greenfield, Carl Ingalls