Abstract: A method executed in an information processing apparatus for controlling resource access by an application program running on the information processing apparatus is provided. A change in connection statuses or operating statuses of a device connected to the information processing apparatus is first detected. In response to the detection, a resource access condition to be applied to the information processing apparatus is selected based on certain criterion. The selected resource access condition is stored in a condition storage unit. Then, in response to capture of a function call for resource access issued to an operating system by the application program, the resource access condition is read from the condition storage unit, and it is determined on the basis of the resource access condition whether the captured function call is allowed. If it is determined that the captured function call is not allowed, the function call is rejected.

Abstract: The invention relates to an electromigration analysis method and a system for analyzing one or more nets in a digital integrated circuit design that are at risk of electromigration. The method comprises the steps of providing at least one interconnect between a driver cell and at least one load cell; applying same extracted netlist data for noise and/or timing analysis and for electromigration analysis; modeling the driver cell by a train of trapezoidal voltage pulses transmitted from the driver cell to the one or more load cells through the at least one interconnect; extracting at least a slew rate of a driver voltage signal and/or timing information from a noise and/or timing analysis for the one or more nets; and comparing a locally measured current density in the at least one interconnect to an effective local maximum current density limit of the at least one interconnect.

Abstract: A design structure embodied in a machine readable medium for designing, manufacturing, testing and/or enabling a redundant memory element (20) during testing of a memory array (14), and a method of repairing a memory array.

Abstract: An apparatus and method for detection of airborne contaminants and prevention of influx of the contaminants into an enclosed space, such as a vehicle cabin. A first sensor array samples exterior air prior to influx of the exterior air into the enclosed space. The first sensor array generates data uniquely corresponding to each contaminant. Data corresponding to predetermined contaminants is stored in computer memory. A user may also cause data corresponding to a contaminant selected by the user to be stored in the computer memory. Upon identification of a contaminant, an actuator is operative to control a position of a valve to prevent influx of the exterior air into the enclosed space.

Abstract: Disclosed is a multilayer thermal interface material which includes a first layer of metallic thermal interface material, a buffer layer and preferably a second layer of thermal interface material which may be metallic or nonmetallic. The multilayer thermal interface material is used in conjunction with a semiconductor device assembly of a chip carrier substrate, a heat spreader for attaching to the substrate, a semiconductor device mounted on the substrate and underneath the heat spreader and the multilayer thermal interface material interposed between the heat spreader and the semiconductor device. The heat spreader has a first coefficient of thermal expansion (CTE), CTE1, the buffer layer has a second CTE, CTE2, and the semiconductor device has a third CTE, CTE3, wherein CTE1>CTE2>CTE3.

Abstract: In a telecommunication system adapted to exchange n-bit frames according to a dynamic time division multiplexing access method for a maximum of N accessible channels, the use of a shadow time slot assignment table is eliminated by use of a circuit that includes (a) an n×p memory block to store a time slot assignment table which describes the different time slot assignments by specifying which logical channel each bit position of an n-bit frame belongs to, (b) a register having N fields with a granularity of one bit, each bit indicates the status of the corresponding logical channel associated thereto, and (c) a logic circuit connected to the memory block and register that enables or disables the transmission of the logical channel identifier to a time slot assignor depending on the status bit value.

Abstract: A liquid thermal interface (LTI) including a mixture of a linearly structured polymer doped with crosslinked networks and related method are presented. The LTI exhibits reduced liquid polymer macromolecule mobility, and thus increased surface tension. An embodiment of the method includes mixing a crosslinker with a linearly structured polymer to form a mixture, wherein the crosslinker includes a base agent including a vinyl-terminated or branched polydimethylsiloxane, and a curing agent including a hydrogen-terminated polydimethylsiloxane; and curing the mixture. The crosslinker functions as cages to block linear or branched linear macromolecules and prevents them from sliding into each other, thus increasing surface tension of the resulting LTI.

Abstract: The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.

Abstract: A method, and computer program product and system for performing the method, is provided for designing a mask used in the manufacture of semiconductor integrated circuits, in which a model of the lithographic process is used during the mask design process. More particularly, the on-wafer process model is a function of optical image parameters that are calibrated using measurements from a test pattern. An uncertainty metric for the predicted response simulated by the on-wafer process model is computed for a given evaluation point of interest as a function of a distance metric between the collective optical image parameters simulated at the given evaluation point and the collective optical image parameters at the calibration data points. The uncertainty metric preferably is also a function of the sensitivity of the on-wafer process model response to changes in the optical image parameters.

Abstract: A method is provided for monitoring a photolithographic process in which a substrate is patterned to form (i) a scatterometry target having a plurality of parallel elongated features, and desirably, (ii) other features each having at least one of a microelectronic function or a micro-electromechanical function. Desirably, each elongated feature of the scatterometry target has a length in a lengthwise direction and a plurality of stress-relief features disposed at a plurality of positions along the length of each elongated feature. A return signal is detected in response to illumination of the scatterometry target. The return signal can be used to determine a result of the photolithographic process.

Abstract: A computing system, method, and computer program product facilitates data mining of information, for example image data, relating to a surface of a manufactured product when the manufactured product is processed using a tool relative to which the manufactured product may be randomly oriented. For each manufactured object, data pertaining to the surface is converted into a weight distribution. A rotational axis along which each surface would tend to rotate under the action of gravity with the surface supported at its geometric centroid is determined. The sets of data can then be properly oriented relative to one another for data mining by aligning the rotational axis of each set of data.

Abstract: Methods and apparatuses for enabling a redundant memory element (20) during testing of a memory array (14). The memory array (14) includes general memory elements (18) and redundant memory elements (20). The general memory elements (18) are tested and any defective general memory elements (18) are replaced with redundant memory elements (20). The redundant memory elements (20) are tested only when they are enabled.

Abstract: A method of forming a patterned material layer on a substrate. A photoresist layer is formed on the substrate followed by an image modifying material formed on the photoresist. The image modifying material is patterned to form an image modifying pattern. The image modifying pattern and underlying photoresist are then exposed to suitable radiation. The image modifying pattern modifies the image intensity within the photoresist layer beneath the image modifying pattern. The resulting pattern is then transferred into the substrate.

Abstract: A method to control the post sinter distortion of hot pressing sintered multilayer ceramic laminate by placing a non-densifying structure in the green ceramic laminate prior to sintering. One or more non-densifying structures are placed on one or more ceramic greensheets which are then stacked and laminated to form a green ceramic laminate. The laminate is then sintered and the non-densifying structure will control the dimensions of the hot pressed multilayer ceramic substrate. The method can be used to control post sinter dimensions in MLC substrates manufactured as either single or multi-up substrates by placing the non-densifying structure in the kerf area between the individual product ups prior to sintering.

Abstract: A top coat material for applying on top of a photoresist material is disclosed. The top coat material includes a polymer, which includes at least one fluorosulfonamide monomer unit having one of the following two structures: wherein: M is a polymerizable backbone moiety; Z is a linking moiety selected from the group consisting of —C(O)O—, —C(O)—, —OC(O)—, and —O—C(O)—C(O)—O—; R1 is selected from the group consisting of an alkylene, an arylene, a semi- or perfluorinated alkylene, and a semi- or perfluorinated arylene; p and q are 0 or 1; R2 is selected from the group consisting of hydrogen, fluorine, an alkyl group of 1 to 6 carbons, and a semi- or perfluorinated alkyl group of 1 to 6 carbons; n is an integer from 1 to 6; and R3 is selected from the group consisting of hydrogen, an alkyl, an aryl, a semi- or perfluorinated alkyl, and a semi- or perfluorinated aryl. The top coat material may be used in lithography processes, wherein the top coat material is applied on a photoresist layer.

Abstract: Disclosed is a method and structure for an integrated circuit structure that includes a plurality of complementary metal oxide semiconductor (CMOS) transistors and a plurality of vertical bipolar transistors positioned on a single substrate. The vertical bipolar transistors are taller devices than the CMOS transistors. In this structure, a passivating layer is positioned above the substrate, and between the vertical bipolar transistors and the CMOS transistors. A wiring layer is above the passivating layer. The vertical bipolar transistors are in direct contact with the wiring layer and the CMOS transistors are connected to the wiring layer by contacts extending through the passivating layer.

Abstract: A method of mirroring Lotus Notes Domino documents to a non-Domino web server, while preserving document sections. Each request for expansion or collapsing of a section is handled at the client end when serving the mirrored copies of the original document. The number of fetches is reduced during retrieval of each state of the Lotus Notes Domino document. Each fetch resides on a mirrored document of a non-Domino web server in a form that does not require a unique html document for each fetch.

Abstract: A method is described for measuring a dimension on a substrate, wherein a target pattern is provided with a nominal characteristic dimension that repeats at a primary pitch of period P, and has a pre-determined variation orthogonal to the primary direction. The target pattern formed on the substrate is then illuminated so that at least one non-zero diffracted order is detected. The response of the non-zero diffracted order to variation in the printed characteristic dimension relative to nominal is used to determine the dimension of interest, such as critical dimension or overlay, on the substrate. An apparatus for performing the method of the present invention includes an illumination source, a detector for detecting a non-zero diffracted order, and means for positioning the source relative to the target so that one or more non-zero diffracted orders from the target are detected at the detector.

Abstract: A method of designing a layout for manufacturing an integrated circuit is provided, in which computationally intensive portions of the design process, such as simulation of an image transferred through a mask design, or simulation of electrical characteristics of a circuit, are performed more efficiently by only performing such computations on single instance of computational subunits that have an identical geometrical context. Thus, rather than performing such computations based on the functional layout, for which typical design process steps result in significant flattening of the functional hierarchy, and therefore increase the cost of computation, the invention performs simulations on computational subunits stored in a hierarchy based on geometrical context, which minimizes the cost of simulation. The resulting simulation results are subsequently assembled according to the functional layout.

Abstract: Non-chemically amplified radiation sensitive resist compositions containing silicon are especially useful for lithographic applications, especially E-beam lithography. More particularly, radiation-sensitive resist compositions comprising a polymer having at least one silicon-containing moiety and at least one radiation-sensitive moiety cleavable upon radiation exposure to form aqueous base soluble moiety can be used to pattern sub-50 nm features with little or no blur.