Abstract: A method and apparatus for simulating telephony services and providing information about telephony services and products without the use of a public carrier telephone system. The system includes at least one Telephone Interface (TI), connected between a telephone and the simulation system. The emulator receives, decodes and validates a user initiated command signal, converts it into a control signal and activates a playback sequence which emulates telephone services. A plurality of different telephone functions and services can be simulated without connection to external telephone lines or wireless service.
September 22, 1998
Date of Patent:
May 21, 2002
John M. Clark, Ronald W. Pedigo, Richard T. Carey
Abstract: A method and apparatus for transferring identification codes using magnetic coupling. A matching code is established by a microprocessor and is stored in the memories of a communications base unit and a mobile unit. When the mobile unit is placed in the base unit the central processing unit sends pulsed current to a coil in the base unit inducing a magnetic field. A Hall effect transistor in the mobile unit detects the induced changes in the magnetic field and transmits the pulse pattern to the base unit (handset) memory where it is entered as a new identification code.
Abstract: An apparatus and method to use the temperature of a transmitting radio to prevent transmission of radio waves outside of an assigned frequency band. More specifically, if a transmitter exceeds a specified temperature the transmitter will be automatically disabled to prevent temperature caused frequency shifts outside the approved frequency transmission band for the transmitter. The transmitter has a temperature sensor that senses temperature and compare the operating temperature against a preselected temperature limit. It the operating temperature either is too hot or too cold the transmitter will be disabled and will not transmit until the temperature falls or rises to an acceptable level.
Abstract: A tunable capacitive coupling to a monopole antenna is provided which integrates the tuning mechanism into the supporting structure for the antenna. The base of the antenna is insulated from and supported by a cylindrical clamping assembly such as a metal compression ferrule in cooperation with an adjustment collar. This clamping mechanism enables the ferrule to be tightened like a drill bit in a chuck at any position along the base of the antenna. The coupling capacitance formed between the antenna radiator and the compression ferrule is proportional to the insertion depth of the antenna into the compression ferrule, thereby enabling the antenna to be tuned. The coupling method of the present invention enables repeatable tuning of the antenna either upward or downward in frequency within the band of frequencies accommodated by the particular antenna.
Abstract: In a multi-line telephone system, an improved method is provided for automatically detecting and indicating the status of each of a plurality of telephone lines despite variations in battery voltages on the line or lines and without requiring any adjustments by the user. Each of the lines in a system can be polled sequentially or individually as desired. The improved method measures the present voltage level associated with the selected line, distinguishes the condition of on-or-off hook or on-hold from other possible states, compares and processes the present measured voltage level in a state matrix, and updates the status indication of the selected telephone line accordingly. Status conditions which are detected and indicated by this method include on-hook, off-hook, and on-hold.
October 22, 1992
Date of Patent:
April 21, 1998
Walter E. Parkerson, Roger D. Forrester
Abstract: A voice detection circuit uses normal and customary signal peaks and pauses in speech to distinguish voice from mere noise. The voice detection circuit includes an audio input device for receiving an audio signal and comparing it to a threshold, and a detector for generating the VOX output signal responsive to the presence of the peaks and pauses in the audio signal which rise above the threshold. The switch is actuated upon the VOX output signal indicating that the audio signal includes selected patterns of peaks and pauses and thus comprises voice signals. Illustratively, the threshold may be varied in accordance with the input signals when the voice detection circuit indicates that the input audio signals do not comprise voice signals.
Abstract: Write-once and erasable recording media (1) and a method of manufacturing such media. According to one aspect of the invention, one or more active layers (26, 30) of the optical data storage medium is formed by spin-on techniques. According to this aspect of the invention, the material used in forming the active layer is formed before the formation of the center aperture (4) in the optical disc. This aspect of the invention provides a substantially smaller "wedge" than prior methods. According to one preferred aspect of the invention, tracking grooves (24) in a flexible sheet (22) are bonded to a substantially rigid substrate (18). The sheet is bound to the substrate such that the tracking marks are directed away from the substrate. The active layers of an optical recording media are then formed on the sheet by, for example, spin-on techniques.
Abstract: A method for determining the maximum amount of physical memory present in a data processing system that can be configured to have one or more memory modules where the memory modules may be one of several types having different amounts of memory locations. By having signals indicating the presence of a memory module and the module type directly available with minimal intervening logic, a diagnostic process can accurately determine the amount of memory present in the system and reduce the possibility of a failed memory module going undetected. A method is also descibed using these memory module present and module type signals for detecting an attempt by either the central processor or an input/output controller to access a memory location that is not physically present within the data processing system.
Abstract: In a Distributed Database System (DDS), database management and transaction management are extended to a distributed environment among a plurality of local sites which each have transaction server, file server, and data storage facilities. The Materialization and Access Planning (MAP) method of a distributed query, update, or transaction is an important part of the processing of the query, update, or transaction. Materialization and access planning results in a strategy for processing a query, update, or transaction in the distributed database management system (DSDBMS). Materialization consists of selecting data copies used to process the query, update, or transaction. This step is necessary since data may be stored at more than one site (i.e., computer) on the network. Access planing consists of choosing the execution order of operations and the actual execution site of each operation. Three access planning methods are used: General (Response), General (Total) and Initial Feasible Solution (IFS).
Abstract: A method for printing composite characters in a word processing system by multistriking two or more characters in the same character space. This method allows composite character graphics to be produced by using individual character graphics found within the character set of the output device. The method provides for the vertical and/or horizontal offsetting of the printhead between the striking of individual characters which form the composite character.
Abstract: A method for achieving printed circuit (PC) board-level testability through electronic component-level design using available technological methods to effect a state of transparency during test, allowing precise verification and diagnosis on a component-by-component basis. Applicable to a greater variety of electronic products than other test methods, and not appreciably constraining functional design, this approach inherently avoids obstacles which prevent other techniques from fulfilling their objectives.
Abstract: A data processing system having a central processing unit (CPU) capable of performing binary and decimal arithmetic software instructions is disclosed. Also disclosed is a method and apparatus for speeding conversion of a number in binary format to decimal format by first stripping leading zeroes before the highest order non-zero bit of the binary number, and only allocating enough memory storage bits to hold the resultant decimal number. A multiplexer is used to apply a partial sum during conversion concurrently to both inputs of an adder for doubling.
September 30, 1983
Date of Patent:
June 9, 1987
Honeywell Information Systems Inc.
John J. Bradley, Brian L. Stoffers, Melinda A. Widen
Abstract: Apparatus that provides interrupt operation in a central processor based system wherein internal subsystems are operated via addresses generated by a next address generator in the processor and sent to control stores associated with each subsystem to thereby read out firmware instructions which are used by a controller in each subsystem to control the operations of same. When a special condition is detected in ones of the subsystems a trap signal is sent to the next address generator which responds by generating a microinstruction address to the subsystem that generated the trap signal. The subsystem responds to the microinstruction to read out a register, the contents of which indicate the status of processing in the subsystem including the special condition.
Abstract: Data processing system architecture in which a central processing unit (CPU) and a plurality of input/output processors (I/OP), said I/OPs being connected in parallel through a bus can have access to a common working memory, under control of a memory access control unit, through a set of tridirectional gates directly connecting memory to the CPU or to the bus without interposition of registers, drivers, receivers, except said tridirectional gates, between the internal CPU channel and the memory channel. The control unit periodically monitors, in synchronism with internal CPU cycles if memory access requests from the I/OP are pending and, absent such requests, the CPU may activate memory cycles in synchronism with its internal cycles without preamble diagloue and access waiting time.
Abstract: A microprogrammed control apparatus for dot matrix serial printers and related printing method which allows increased horizontal resolution of the printing matrix and therefore the printing quality consistent with the restriction that no printing element can be actuated before a previous energization of any printing element has been completed. The increase of the horizontal resolution is obtained by using a character description matrix with high resolution and logic circuits responsive to binary configurations read out from such matrix. In a preferred alternative, the increase of the horizontal resolution is obtained by using a "compressed" character description matrix containing a plurality of printing patterns, one for each of the columns where printing has to be performed (hereinafter "column to be printed") and a corresponding plurality of codes, each related to a printing pattern and representative of the distance/time interval between the column to be printed and the previous column to be printed.
Abstract: A method and apparatus for skew compensation in an optical reader is described. The method provides for calculating the amount of skew between the read scan line used to read the data and the recording path line used when the data was written on the recording media. By determining the position of each end of the scan line by counting delimiter marks along the two edges of the data being read, the skew can be calculated by determining the difference in delimiter counts. The data is divided into bands along the direction of scan within which the skew will not cause trouble misreadings at the extreme bits of the scan line within a band. The data is scanned multiple times during the transition of the data strip so that at least one good read of each data band in the data strip will occur.
Abstract: A data processing system having a central processing unit (CPU) capable of performing binary and decimal arithmetic software instructions is disclosed. The CPU includes a microprocessor which executes the binary arithmetic software instructions under firmware control. Also disclosed is apparatus utilizing a programmable memory and logic circuits that are used to subtract two operands and to generate and temporarily store a digit equal nine indication when the result of subtracting the two operands has a value of nine.
Abstract: A method is disclosed for changing the horizontal and vertical resolution of an image while the image is in digitized and compressed form, where the image is first scanned and digitized to be represented as a number of discrete picture elements (pixels) and then the digitized image data is compressed. To change the resolution of an image and thereby be able to display it in smaller or larger form, the compressed image data is first analyzed and the data for certain scan lines is replicated or eliminated to respectively increase or decrease the vertical resolution of the image by a selected vertical resolution change factor. Then the compressed image data with scan lines replicated or eliminated is further processed using a selected horizontal resolution change factor to increase or decrease the horizontal resolution by respectively increasing or decreasing the number of pixels representing each scan line. The image data may also be processed so that windowing on the image may be performed.