Abstract: A method for manufacturing an anti-punch through semiconductor device is described. The method is applied to a substrate having a plurality of device isolation structures in parallel arrangements and the upper surface of the device isolation structures is protruded from the surface of the substrate. A plurality of conductive layers in parallel arrangement is formed on the substrate and crosses the device isolation structures. A plurality of trench devices is formed between device isolation structures under the conductive layers. Each trench device includes a first conductive doping region at the bottom of the trench. The method further includes forming spacers on the sidewalls of the device isolation structures and the conductive layers. A dopant implant process is then performed by using the spacers as a mask to form a second conductive doping region between adjacent first conductive doping regions.

Abstract: A method for testing a fuel nozzle assembly including blocking all but a selected number of the fuel nozzles with a flow impeding assembly and moving part of a rig to align the selected number of the fuel nozzles with at least one flow measurement apparatus.

Abstract: A voltage-controlled oscillator circuit. A pair of inductors are coupled to a first power source. A pair of capacitors respectively coupled between a variable resistor and the pair of inductors in serial. A pair of first switches respectively coupled between the pair of capacitors and a second power source. The first switch of the pair has a first control gate coupled to a connection point of the other first switch and the corresponding capacitor.

Abstract: A capacitor consisting of a storage electrode (19), a capacitor dielectric film (20) and a plate electrode (21) is formed in a trench formed through dielectric films (6, 8, 10 and 12) stacked on a semiconductor substrate (1) and buried wiring layers (9 and 11) are formed under the capacitor. As the capacitor is formed not in the semiconductor substrate but over it, there is room in area in which the capacitor can be formed and the difficultly of forming wiring is reduced by using the wiring layers (9 and 11) for a global word line and a selector line. As the upper face of an dielectric film (32) which is in contact with the lower face of wiring (34) in a peripheral circuit area is extended into a memory cell area and is in contact with the side of the capacitor (33), step height between the peripheral circuit area and the memory cell area is remarkably reduced.

Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen

Abstract: A memory compiler characterization system and method for determining parametric data, wherein memory compilers of a first type are rigorously characterized and memory compilers of a second type are sparsely characterized with respect to a particular parameter. Absolute scale factors are determined based on the ratio of the parametric data points of two congruent memory compilers, one from each type. Interpolated scale factors are obtained based on the absolute scale factors. Parametric data for the remaining compilers of the sparsely characterized compiler set is filled out by applying the interpolated scale factors in conjunction with the data of the congruent memory compilers of the first type.

Abstract: A semiconductor device is easy for high accuracy impedance matching against differences in impedance of a transmission line and a package wire. A semiconductor chip having external output buffers and a packaging circuit are included. Each external output buffer has a first output portion whose internal impedance is adjusted commonly with other external output buffers in accordance with impedance control data and a second output portion whose internal impedance is adjusted independently of other external output buffers. Both of the first and second output portions are connected in parallel to a common output terminal. Common adjustment by the first output portion can cope with impedance of the transmission line and individual adjustment by the second output portion can cope with a difference of package wires.

Abstract: A connection verification apparatus verifies interconnection between a plurality of logic blocks constituting a semiconductor integrated circuit or the like. It includes a connection verification section for verifying interconnection between a first logic block and a second logic block by comparing a signal level of an output terminal of the first logic block with a signal level of an input terminal of the second logic block connected to the output terminal of the first logic block. The connection verification apparatus can verify the interconnection between the two logic blocks without verifying the logic processing to the two logic blocks.

Abstract: An etching process is described. A material layer having a bottom anti-reflection coating (BARC) and a patterned photoresist layer thereon is provided. An etching step is performed to the BARC using the patterned photoresist layer as a mask. A cleaning step is performed to remove the polymer formed on the surface of the patterned photoresist layer. Thereafter, another etching step is performed to the material layer using the patterned photoresist layer as a mask.

Abstract: A multilayer diplexer has a first I/O terminal, a second I/O terminal, an antenna terminal, a high-pass filter coupled between the antenna terminal and the second I/O terminal, and a low-pass filter coupled between the antenna terminal and the first I/O terminal. The high-pass filter has a first capacitor and a second capacitor connected in serial coupled between the antenna terminal and the second I/O terminal, a fourth capacitor coupled between the antenna terminal and the second I/O terminal, and a first inductor coupled between a connection node of the first and second capacitors and a reference ground. The low-pass filter has a second inductor coupled between the antenna terminal and the first I/O terminal, and a third and fifth capacitor connected in parallel coupled between the antenna terminal and the first I/O terminal.

Abstract: The present invention comprises a docking system for connecting a portable communication device to a further signal transmission line. The docking system may be arranged within a workstation such as a desk or a tray. The system may also envelope a room in a building or be located in a vehicle, to control and restrict the radiative emission from the communication device and to direct such radiation to a further remote antenna and or signal distribution system connected to the transmission line.

Abstract: Methods and systems for monitoring semiconductor fabrication processes are provided. A system may include a stage configured to support a specimen and coupled to a measurement device. The measurement device may include an illumination system and a detection system. The illumination system and the detection system may be configured such that the system may be configured to determine multiple properties of the specimen. For example, the system may be configured to determine multiple properties of a specimen including, but not limited to, a thin film characteristic and an electrical property of a specimen. In this manner, a measurement device may perform multiple optical and/or non-optical metrology and/or inspection techniques.

Abstract: Techniques are described for accurately processing playback signals of time-based servo patterns recorded on a data storage medium. In particular, techniques are described for determining values for signal peaks within a playback signal of a time-based servo pattern by applying interpolation to data points in proximity to each of the signal peaks. At least three data points are identified in proximity to a desired peak to be detected within the playback signal. A value is calculated for the desired peak based on interpolation of the at least three data points. A playback signal of a time-based servo pattern may include a sequence of signal peaks. A time-based servo pattern may be detected based on lengths of time measured between consecutive peaks in the sequence of peaks. A position error signal (PES) may be generated based on the values calculated for each of the sequence of peaks.

Abstract: A conveyance system for a semiconductor wafer can be used without any change before and after a support plate is adhered to the wafer. Also, the finish accuracy of the wafer and the positioning accuracy between the wafer and the support plate can be relaxed, thus improving the manufacturing efficiency. The wafer is formed on its peripheral portion with a stepped portion, which is deeper than a finished thickness obtained by partial removal of the rear surface thereof and which can be eliminated by the partial removal of the wafer rear surface. The separation portion has a length which extends radially outward from a flat surface, and which is greater than a total sum of a maximum-minimum difference between the finish allowances of the diameters of the wafer and the support plate, and a maximum value of a positioning error between the wafer and the support plate generated upon adhesion thereof.

Abstract: A method and apparatus are provided for analyzing a user's communication activity to determine presence patterns at one or more communication devices. A user's presence at one or more communication devices is monitored over time to detect at least one pattern of behavior indicating that a user is likely to be present at a given communication device during a particular time interval. Once a presence pattern is detected, a call that is destined for the user during the associated time interval can be automatically routed to the user at the given communication device. As a transition between each presence pattern is reached, i.e., when the user changes locations or devices, the probability of the user being present on one device decreases while the probability of the user being present on another device increases.

Abstract: In a channel region between the source/drain diffusion layers, impurities of the same conductivity type as the well are doped in an area apart from the diffusion regions. By using as a mask the gate formed in advance, tilted ion implantation in opposite directions is performed to form the diffusion layers and heavily impurity doped region of the same conductivity type as the well in a self-alignment manner relative to the gate.

Abstract: A molten material can be heated, melted and directly solidified in a single vessel. Induction heating and melting of the molten material is achieved by magnetically coupling the field produced by current flow in a plurality of induction coils surrounding the vessel with either the molten material in the vessel, or a susceptor surrounding molten material in the vessel. Current flow is selectively removed from the plurality of induction coils, and a cooling medium surrounding the vessel, such as water flowing through hollow induction coils, solidifies the molten metal into a highly purified crystalline solid.

Abstract: A firing mechanism for a firing pin striker operated semiautomatic handgun that includes a sear, a sear block housing, and a pivot arm. The sear is attached to the pivot arm and includes two angled surfaces and an edge portion for controlling the firing pin. The edge portion abuttingly engages an extension of the firing pin adapted to be in planar movement with the edge portion of the sear. The pivot arm and sear move together in an arcuate path about the pin in response to trigger firing movement. Unlike prior art firing mechanisms, the sear does not move vertically along an axis perpendicular to the bore of the handgun. The arcuate movement of the pivot arm causes the edge portion of the sear to disengage from the firing pin. The angled surfaces of the sear allow the firing pin extension to pass over the sear discharging the firearm.

Abstract: A method and apparatus for connecting low pin count (LPC, hereinafter) bus and serial flash memory is provided for converting the interface between a LPC bus and a serial flash memory in personal computer systems. The method according to the present invention comprises following procedures. First, a LPC bus instruction is fetched and converted to a serial instruction according to the required format of serial flash memory. The serial instruction is outputted to a serial flash memory. Next, an output data is read from the serial flash memory and converted to the required format according to the LPC bus. Lastly, the output data is outputted to the LPC bus.