Abstract: A random access memory including an array of single transistor memory cells and a voltage source. The voltage source is configured to receive a boosted supply voltage and a reference voltage. The voltage source is configured to provide an output voltage out of the boosted supply voltage and based on the reference voltage.

Abstract: A method of removing spacers after forming a MOS transistor on a wafer. The MOS transistor comprises a gate disposed on the substrate, spacers disposed on the sidewalls of the gate and a source and a drain region in the substrate beside the spacers. The spacers are removed by performing a wet etching process in the dark such that during the spacer removal process, the source and the drain region in a MOS transistor can be prevented from damages.

Abstract: A flat panel display comprises the following components. A display module has a lower glass substrate for fabricating thin film transistors, an upper glass substrate for fabricating a color filter, and a displaying molecule layer inserted between the lower glass substrate and the upper glass substrate. The lower glass substrate is connected electrically to a control circuit board via a flexible printed circuit board for driving the thin film transistors. And a backlight unit is fabricated beneath the display module and has a lightguide, a lamp disposed aside the lightguide to emit lights into the lightguide in the edgelight form, and a plurality of optical films disposed on the lightguide for scattering the lights emitted from the lightguide uniformly. The backlight unit comprises a sensor board disposed beneath the lightguide for receiving inputting signals from a signal stylus above the flat panel display.

Abstract: A semiconductor device with a packaging circuit portion connected to a semiconductor chip therein. The semiconductor chip includes a plurality of pad electrodes, and the packaging circuit portion includes wiring connected to the pad electrodes on the semiconductor chip, mounting terminals, and a first signal path for receiving a signal output from the predetermined one of the pad electrodes and transmitting the signal to other one of the pad electrodes. The first signal path includes delay elements comparable to delays in a second signal path extending from the predetermined one of the mounting terminals to the other one of the mounting terminals through the semiconductor chip, and is disposed on a feedback path for phase comparison for synchronizing the phase of an output signal from the second signal path to the phase of an input signal to the second signal path.

Abstract: The present invention relates to a memory interlace-checking method and, in particular, to a test method that can effectively detect the weakening of memory. This test method is different from the conventional continuous address testing style. It is an interlacing address test method that comprises a main step and a data checking step. The main step provides main data to perform command actions on local addresses in memory. This will weaken other portions in the memory that are not trigged by commands because of the electromagnetic interference (EMI) induced by memory operations. Afterwards, in the data checking step, the yet to be triggered portion will be checked in a complementary way in order to accurately detect weakened memory.

Abstract: The invention provides apparatus and methods for a Virtual Private Network (VPN) in a network that offers a simple user interface for efficient utilization of network resources. The VPN is defined for a specified set of endpoints each of which is associated with a single “hose.” A hose provides access to the VPN through an access point which may be a node of the network, for example. The hose is a single interface to the VPN for communication to all other endpoints of the VPN. The VPN achieves network resource allocation efficiency by exploiting resource sharing possibilities via multiplexing routing paths between endpoints and dynamic resource allocation techniques that permit real time resource allocation resizing. When a VPN is established with a VPN service provider, the routing paths between the endpoints of the VPN is optimized for multiplexing opportunities so that resource allocations between nodes along routing paths within the IP network is reduced to a minimum.

Abstract: Data breakdown due to fluctuation of an operation power source is suppressed by suppressing a sub-threshold leakage current. A semiconductor integrated circuit includes a pair of power source wires, a plurality of static memory cells, a voltage control circuit for controlling an operation voltage applied from the power source wires to the static memory cells, a monitor circuit for monitoring a voltage of the power source wires and a mode control circuit for controlling a plurality of operation modes. The monitor circuit can detect a change of decrease of a potential difference between the pair of power source wires.

Abstract: Systems and methods for interchangeable hardware components on a wireless communication device are provided. When a handset is powered up after having a hardware component replaced, the handset recognizes the presence of a new component. The handset then queries the component to obtain profile information about the component. The handset next queries an update server over a wireless communication network and requests an optimized device driver that will allow the handset to utilize the complete functionality of the new component. The update server responds with the executable device driver itself and an instruction set for installing the device driver. Upon receipt, the handset installs the device driver and reconfigures or reboots to complete the installation and configuration process.

Abstract: A bulk bag comprises a side wall formed from woven polypropylene fabric and comprising a cylindrical configuration. Long, narrow, strips of polypropylene fabric is sewn to the side wall panels at spaced apart locations to define pockets which receive support members. Alternatively, the pockets may be formed by gathering the fabric of the side wall to define the pocket and securing the gathered material in place by sewing.

Abstract: A voice-enabled help desk service is disclosed. The service comprises an automatic speech recognition module for recognizing speech from a user, a spoken language understanding module for understanding the output from the automatic speech recognition module, a dialog management module for generating a response to speech from the user, a natural voices text-to-speech synthesis module for synthesizing speech to generate the response to the user, and a frequently asked questions module. The frequently asked questions module handles frequently asked questions from the user by changing voices and providing predetermined prompts to answer the frequently asked question.

Abstract: A DTMF generating device for automatically generating DTMF tones corresponding to a predefined phone number comprises a processor, a memory, and a speaker enveloped in a credit card sized casing. The memory has stored therein DTMF tone samples corresponding to the predefined phone number. When a user presses on a portion of the casing, the DTMF tone samples are played by the speaker.

Abstract: A loop-back extender card is plugged into a memory module socket on a personal computer (PC) motherboard. The extender card has a test socket that receives a memory module under test. An Advanced Memory Buffer (AMB) on the memory module fully buffers DRAM chips on the memory module. The AMB inputs from and outputs to the test socket differential northbound lanes (toward a processor) and southbound lanes (away from the processor). The extender card has northbound loopback traces that connect northbound lane outputs from the memory module back to northbound-lane inputs to the memory module. Southbound loopback traces connect southbound lane outputs from the memory module back to southbound-lane inputs to the memory module. The loop-back extender card allows the AMB to perform loopback testing without modifying the PC motherboard. Series/shunt resistors can be placed on the loopback traces, or serpentine traces can be used to increase loopback delays.

Abstract: Chip-packaging with bonding options having a plurality of package substrates. The chip-packaging includes first and second package substrates, a chip, and a lead. The chip having a plurality of bonding pads is mounted on the first package substrate. One of these bonding pads is connected to the first package substrate. Another bonding pad is connected to the second package substrate. The lead is connected to one bonding pad. The first and second package substrates have first and second voltages, respectfully. The first voltage and the second voltage are different, and each can be a GND voltage or a POWER voltage. With connection of these bonding pads with the lead or connection of these bonding pads with two package substrates, input ends or output ends in the chip could be connected to a GND voltage or a POWER voltage, or to one pin of the chip-packaging.

Abstract: A method for detecting transferase activity of a sample includes contacting the sample with a substrate and at least one of a phosphate group donor and a phosphate group acceptor. The substrate includes a reporter compound and amino acids. A peptidase is added that cleaves a non-phosphorylated substrate at a first rate and a phosphorylated substrate and a second rate. The output of the reporter compound is detected. In a preferred embodiment, the transferase activity detected is a kinase activity. In another preferred embodiment, the transferase activity detected is a phosphatase activity. Also provided is a method of screening for alterations in a transferase reaction. Kits and peptide substrate are also provided for carrying out at least one of the methods of the invention.

Abstract: Embodiments of the present invention relate to systems and methods for network element fault information processing. In an embodiment, a network element identifier and a network element fault information processing instruction are received. A query for network element fault information based at least in part on the network element identifier is sent. Network element fault information is received. The network element fault information is processed based at least in part on the received network element fault information. The processed network element fault information is output.

Abstract: A two-axis device is provided. The two-axis device includes a first substrate having a plurality of electrodes, a first connecting layer located on the first substrate, an actuating layer, a second connecting layer and a cover. The actuating layer is connected to the first substrate via the first connecting layer and includes a circular portion, an actuating portion, a first shaft and a second shaft. The second connecting layer is connected to the actuating layer and the cover is connected to the actuating layer via the second connecting layer. In addition, a vacuum concavity is formed by the first substrate, the first connecting layer, the actuating layer, the second connecting layer and the cover. The actuating portion and the first shaft are located in the vacuum concavity, and the second shaft extends outside of the vacuum concavity.

Abstract: It is aimed to detect, notify, and save an abnormal area in semiconductor memory for greatly improving reliability. An inside of semiconductor memories provided for a memory card comprises a user area, a substitution area, an area substitution information storage area, and a management area. An inside of semiconductor memories comprises a user area, a substitution area, and a management area. The user area is a data area a user can use. The substitution area is substituted when an error occurs in the user area. The area substitution information storage area stores area substitution area information. The management area stores substitution information. The information processing section performs substitution on two levels as follows. When detecting an operation indicating a symptom of failure in a semiconductor memory area, the information processing section performs area substitution during an idle state of the memory card.

Abstract: A circuit board includes multiple segments, with a first segment having plural signal layers and a second segment having plural signal layers. Signal paths provided by signal layers of the first segment exhibit higher speed signal transmission capability than signal paths provided by the signal layers of the second segment.