Patents Assigned to ABLIC INC.
  • Patent number: 12700859
    Abstract: A current limiter circuit limits a current in a path connecting an input terminal and an output terminal through a switch including a control port, the switch controlling the current to a predetermined value or less. The current limiter circuit includes a gate controller and a negative feedback circuit. The gate controller includes an input port which is connected to a connection point between a first path through which a first signal is transmitted and a second path through which a second signal is transmitted, and receiving the first signal and an output port supplying a control signal to the control port of the switch. The negative feedback circuit includes an input port coupled to a node via a capacitor if the capacitor is connected between thereof and the node provided between the switch and the output terminal and an output port connected to the input port.
    Type: Grant
    Filed: May 27, 2024
    Date of Patent: August 4, 2026
    Assignee: ABLIC Inc.
    Inventor: Tsutomu Tomioka
  • Patent number: 12699411
    Abstract: A reference current source 100 includes a reference voltage circuit 110, generating a reference voltage Vref; a voltage division circuit 130, dividing the reference voltage Vref and outputting a divided voltage Vdiv; and an output MOS transistor 140, supplying a reference current Iref in response to the divided voltage Vdiv being applied to a gate terminal 140G. The reference voltage circuit 110 includes a depletion type MOS transistor 111, and an enhancement type MOS transistor 112 having same conductivity type and impurity concentration as a channel 111c of the depletion type MOS transistor 111 and a different Fermi level from a gate electrode 111g of the depletion type MOS transistor 111. The voltage division circuit 130 outputs the divided voltage Vdiv within a voltage range which is 0V or above and lower than a cross point X to the gate terminal 140G of the output MOS transistor 140.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: August 4, 2026
    Assignee: ABLIC Inc.
    Inventor: Yasuhiro Kamijima
  • Publication number: 20260221476
    Abstract: Provided are an environment sensor and an environment power generation device capable of measuring generated power of a power generation element to follow a changing environment. The environment sensor includes a voltage control circuit and a current measurement circuit. The voltage control circuit includes a voltage control terminal configured to receive a generated current and a current output terminal configured to provide an output current, and is configured to receive the generated current at the voltage control terminal while controlling a voltage of a positive electrode terminal of the power generation element connected to the voltage control terminal to a first predetermined voltage lower than a generated voltage of the power generation element. The current measurement circuit includes a current measurement terminal configured to receive the output current and a signal output terminal configured to provide a measurement signal.
    Type: Application
    Filed: January 21, 2026
    Publication date: July 30, 2026
    Applicants: ABLIC Inc., Tokyo University of Science Foundation
    Inventors: Fumiyasu UTSUNOMIYA, Yusuke TAKEUCHI, Norihiro OKAZAKI, Isao SHITANDA, Takeru SAMORI, Momo CHIBA
  • Patent number: 12695395
    Abstract: A controller includes: first to third input terminals; connection terminals; an output terminal; a first rectifying element, connected between the first input terminal and the second input terminal with a direction from the second input terminal to the first input terminal as a forward direction; a second rectifying element, connected between a connection point between the first input terminal and the first rectifying element and the output terminal with a direction from the connection point to the output terminal as a forward direction; an FET circuit, including a first depletion type FET and at least one other FET; a resistor, connected to the second input terminal and the third input terminal; and a clamp circuit, clamping a voltage of the third input terminal to a predetermined voltage.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: July 28, 2026
    Assignee: ABLIC Inc.
    Inventor: Minoru Sudo
  • Patent number: 12689234
    Abstract: Provided is a sensor device being a signal processing device, including: a capacitor; a sensor unit configured to wirelessly transmit, in a case in which electric power of a predetermined amount or more is accumulated in the capacitor, a first signal (SG1) through use of the electric power accumulated in the capacitor; a reception unit configured to receive a radio wave transmitted from a power transmission device being an external device; and a transmission antenna functioning as a second transmission unit, the transmission antenna being configured to wirelessly transmit, in response to reception of the radio wave, a response signal (SG3) being a second signal generated based on the received radio wave without using the electric power accumulated in the capacitor.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: July 21, 2026
    Assignee: ABLIC Inc.
    Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Hisashi Nishikawa, Fumiya Nishimura, Yuichiro Hirai, Ami Tanaka
  • Publication number: 20260171827
    Abstract: A battery device includes a battery; a first predetermined state detection part detecting a first predetermined state regarding a first cell; a first logic circuit performing first control based on detection result of first predetermined state detection part; a second predetermined state detection part detecting a second predetermined state regarding a second cell; a charger connection detection part detecting presence or absence of connection between battery and a charger; and a second logic circuit performing second control based on detection result of second predetermined state detection part, detection result of charger connection detection part, and first notification from first logic circuit regarding first predetermined state.
    Type: Application
    Filed: December 11, 2025
    Publication date: June 18, 2026
    Applicant: ABLIC Inc.
    Inventors: Shinya FUKUCHI, Kazuaki SANO
  • Publication number: 20260171820
    Abstract: A charge/discharge control circuit includes: a UVLO detection circuit which is connected to a positive power input terminal and detects that voltage of the positive power input terminal is less than UVLO detection voltage; a load short circuit detection circuit which is connected to an overcurrent detection terminal and detects voltage of the overcurrent detection terminal; a discharge control part which performs control to turn off a discharge control FET in response to a load short circuit detection signal output from the load short circuit detection circuit; a UVLO mask part which masks a UVLO detection signal output from the UVLO detection circuit by a load short circuit detection signal output from the load short circuit detection circuit; and an internal circuit on/off control circuit which controls on/off of an internal circuit based on a signal output from the UVLO mask part.
    Type: Application
    Filed: December 2, 2025
    Publication date: June 18, 2026
    Applicant: ABLIC Inc.
    Inventor: Shinya FUKUCHI
  • Patent number: 12656295
    Abstract: A ribbon-type electrode and a ribbon-type sensor are capable of long-term sensing. The ribbon-type electrode includes an electrode section, which contains a first electrode and a second electrode. The first electrode which contains a thin plate-like structure containing a first type of metal having a higher ionization tendency than hydrogen and the second electrode are disposed to face each other with respect to a plane formed by a length direction and a width direction of the first electrode with an insulating section made of non-conductive fibers interposed therebetween.
    Type: Grant
    Filed: January 12, 2024
    Date of Patent: June 16, 2026
    Assignee: ABLIC Inc.
    Inventors: Takatsugu Ueki, Hitoshi Yoshida, Fumiyasu Utsunomiya, Kouichi Takahashi, Takayoshi Hishikawa
  • Patent number: 12651914
    Abstract: A voltage detection circuit, a charge control circuit, a charge and discharge control circuit, and a semiconductor device are provided. The voltage detection circuit includes: an input port; a plurality of transistors connected in series and including at least an input transistor including a gate connected to the input port, a source connected to a first power supply terminal, and a drain, and a first transistor including a drain connected to a second power supply terminal, a gate, and a source connected to the gate of the first transistor; and an output port configured to be one of connection points of the plurality of transistors.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: June 9, 2026
    Assignee: ABLIC Inc.
    Inventors: Shinya Fukuchi, Yasuhiro Miyamoto, Keiichi Murakawa
  • Patent number: 12625012
    Abstract: A temperature sensor device is capable of measuring minute temperature changes while being manufactured at low cost without needing a high performance IC tester. A temperature sensor device includes a temperature sensor circuit 2 and a temperature sensor 1. The temperature sensor 1 includes a PN junction element 15 which is a temperature sensing element, a variable current source which supplies different forward currents of at least two values to the PN junction element 15 and a constant voltage source 16 which outputs a constant voltage having the same temperature properties as a forward voltage of the PN junction element 15.
    Type: Grant
    Filed: October 30, 2023
    Date of Patent: May 12, 2026
    Assignee: ABLIC Inc.
    Inventors: Tsutomu Tomioka, Tadakatsu Kuroda, Makoto Mitani, Naohiro Hiraoka
  • Patent number: 12619272
    Abstract: The present invention provides a reference voltage generation device which includes a constant current circuit outputting a constant current in response to an input voltage; a voltage generation circuit connected in series to the constant current circuit, using the constant current as an input current, and generating an output voltage based on the input current; and a reference voltage output port outputting the output voltage. In the constant current circuit, multiple depletion type MOS transistors are connected in series, the gate widths are the same, and the sum of the gate lengths is the total gate length of the constant current circuit. In the voltage generation circuit, multiple enhancement type MOS transistors are connected in series, the gate widths are the same, and the sum of the gate lengths is the total gate length of the voltage generation circuit.
    Type: Grant
    Filed: March 26, 2024
    Date of Patent: May 5, 2026
    Assignee: ABLIC Inc.
    Inventor: Satoshi Suzuki
  • Publication number: 20260121426
    Abstract: A cell balancing circuit and a battery device are provided. The cell balancing circuit controls cell balancing between a first battery cell that generates a first cell voltage and a second battery cell which is connected in series with the first battery cell and generates a second cell voltage. The cell balancing circuit includes: a first voltage divider circuit that outputs a first voltage divider voltage as an average voltage of the first battery cell and the second battery cell; a first differential voltage-to-current converter that discharges from the first battery cell a first cell balancing current generated according to a voltage difference obtained by subtracting the second cell voltage from the first voltage divider voltage; and a second differential voltage-to-current converter that discharges from the second battery cell a second cell balancing current generated according to the voltage difference with polarity reversed.
    Type: Application
    Filed: October 13, 2025
    Publication date: April 30, 2026
    Applicant: ABLIC Inc.
    Inventor: Yasuhiro MIYAMOTO
  • Publication number: 20260121640
    Abstract: A semiconductor device (1) includes power terminals (VDD, GND), a voltage detection circuit (11), transistors (12, 13, 14), a depletion transistor (15), a control circuit (16), input ports (12a, 14a) connected to an output port (11b), input ports (11a, 16b) connected to the power terminal (VDD), a source end (12b), input ports (11c, 16c) connected to the power terminal (GND), source ends (14c, 15c), a gate end (15a), a source end (13b) connected to a drain end (12c), a gate end (13a) connected to a drain end (13c), drain ends (14b, 15b), and an input port (16a). Even in the case where a power supply voltage input to the voltage detection circuit (11) is equal to or lower than a minimum operating voltage of the voltage detection circuit (11), a signal received by the input port (16a) of the control circuit (16) matches a potential of the input terminal (GND).
    Type: Application
    Filed: October 8, 2025
    Publication date: April 30, 2026
    Applicant: ABLIC Inc.
    Inventors: Toshio NOMURA, Tomoki HIKICHI
  • Publication number: 20260092885
    Abstract: A monitor is provided, which is capable of continuously monitoring a monitoring target in a batteryless and maintenance free manner even with a small storage capacity. The monitor is a device using, as a sensor, a thermal battery including a thermoelectric power generation element which outputs a voltage according to a temperature difference between a temperature of an atmosphere covering the monitoring target and a temperature of a contact part with the monitoring target.
    Type: Application
    Filed: September 8, 2025
    Publication date: April 2, 2026
    Applicant: ABLIC Inc.
    Inventor: Minoru SUDO
  • Publication number: 20260095101
    Abstract: A boost circuit receives a storage detection signal from a power storage voltage detection circuit in response to a power storage voltage of a power storage element becoming equal to or higher than a predetermined voltage. The boost circuit includes: a first boost part, including a first buffer circuit pair having small leakage current, in which in the case where the storage detection signal is received, a first boost operation is performed by the first buffer circuit pair driven by power stored in the power storage element and a first boost voltage is output; and a second boost part, including a second buffer circuit pair having large leakage current, in which in the case where the first boost voltage is received, by power stored in the power storage element being supplied to the second buffer circuit pair, a second boost operation is performed and a second boost voltage is generated.
    Type: Application
    Filed: August 17, 2025
    Publication date: April 2, 2026
    Applicant: ABLIC Inc.
    Inventor: Minoru SUDO
  • Patent number: 12578746
    Abstract: A voltage regulator includes: an output transistor containing a source connected to an input port and a drain connected to an output port; voltage dividing resistors which are connected between a voltage adjustment port and a ground port, divide an adjustment voltage received at the voltage adjustment port, and output a feedback voltage; a reference voltage circuit which outputs a reference voltage; an error amplifier circuit which controls a gate voltage of the output transistor based on the reference voltage and the feedback voltage; and a disconnection protection circuit which includes a first MOS transistor containing a source connected to the output port and a gate connected to the voltage adjustment port, and detects a disconnection of a bonding wire of the voltage adjustment port.
    Type: Grant
    Filed: October 7, 2024
    Date of Patent: March 17, 2026
    Assignee: ABLIC Inc.
    Inventor: Kaoru Sakaguchi
  • Patent number: 12529715
    Abstract: A current detection circuit includes: an input port; an output port; a rectifying element; a capacitor; a first first conductivity type MOS transistor; and a voltage detection circuit. The input port is connected to an anode terminal of the rectifying element, the drain terminal of the first first conductivity type MOS transistor, and a voltage detection terminal of the voltage detection circuit. A cathode terminal of the rectifying element is connected to a first terminal of the capacitor and a gate terminal of the first first conductivity type MOS transistor. A second terminal of the capacitor and a source terminal of the first first conductivity type MOS transistor are connected to a first power source terminal. A detection result output port of the voltage detection circuit 105 is connected to the output port.
    Type: Grant
    Filed: March 7, 2024
    Date of Patent: January 20, 2026
    Assignee: ABLIC Inc.
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 12519487
    Abstract: A semiconductor device includes an input port, a pulse generation circuit, and a serial-parallel conversion circuit. The input port is connected to an input port of the pulse generation circuit and a data signal input port of the serial-parallel conversion circuit. A signal received at the input port is a start bit and a data signal. The pulse generation circuit includes a delay circuit. A clock signal output port of the pulse generation circuit is connected to a clock signal input port of the serial-parallel conversion circuit.
    Type: Grant
    Filed: February 28, 2024
    Date of Patent: January 6, 2026
    Assignee: ABLIC Inc.
    Inventor: Tadakatsu Kuroda
  • Patent number: 12499988
    Abstract: An ultrasonic probe includes a probe configured to receive an ultrasonic wave, a plurality of wireless communication devices, and processing circuitry configured to assign identification information to ultrasonic image data generated based on the ultrasonic wave, for identifying the ultrasonic image data; and cause each of the plurality of wireless communication devices to transmit in parallel the ultrasonic image data having the identification information assigned, to a terminal device.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: December 16, 2025
    Assignee: ABLIC INC.
    Inventors: Naoto Yoneda, Masaya Tamamura, Naoto Adachi, Hiroshi Kishi
  • Patent number: 12494707
    Abstract: A DC/DC converter is able to test an overcurrent detection circuit without damaging the circuit. The DC/DC converter includes: a high-side switch; an IV conversion element and a current detection transistor which are connected in parallel with the high-side switch; a low-side switch; an overcurrent detection circuit; and a control circuit which outputs a first signal from a first output port to the high-side switch, outputs a second signal from the second output port to the low-side switch, and outputs a third signal from a third output port to the current detection transistor. The DC/DC converter further includes a test port which controls the current detection transistor to be turned off in the case of testing the overcurrent detection circuit, and supplies a variable current to a connection point between the current detection transistor which is controlled to be turned off and the IV conversion element.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: December 9, 2025
    Assignee: ABLIC Inc.
    Inventor: Yoshiomi Shiina