Patents Assigned to Active-Semi, Inc.
  • Patent number: 10097027
    Abstract: A power bank device has an input connector, an output connector, a DC-to-DC switching converter, a plurality of battery cells coupled together in series, and novel light load detection circuitry. The power bank device is operable in a discharging mode in which the battery cells power the DC-to-DC converter, and the converter drives a regulated DC voltage onto the output connector. The detection circuitry detects whether a light load condition exists in which only a small amount of current is being output onto the output connector. If the condition is detected, then the converter is disabled so that current flow out of the output connector is stopped. In one example, the condition is detected by supplying a constant current onto the output connector and detecting whether the voltage on the output connector rises and stays above a predetermined voltage for a predetermined amount of time.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: October 9, 2018
    Assignee: Active-Semi, Inc.
    Inventor: Hong Mao
  • Patent number: 10090675
    Abstract: A power loss protection integrated circuit includes a VIN terminal, a VOUT terminal, an STR terminal, a switch circuit (eFuse), a control circuit, and a prebiasing circuit. In a normal mode, current flows from a power source, into VIN, through the eFuse, out of VOUT, and to the output node. A switching converter of which the control circuit is a part is disabled. If a switch over condition then occurs, the eFuse is turned off and the switching converter starts operating. The switching converter receives energy from STR and drives the output node. Switch over is facilitated by prebiasing. Prior to switch over, the prebiasing circuit prebiases a control loop node as a function of eFuse current flow prior to switch over. When the switching converter begins operating, the node is already prebiased for the proper amount of current to be supplied by the switching converter onto the output node.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: October 2, 2018
    Assignee: Active-Semi, Inc.
    Inventors: Thuc Huu Lam, Hue Khac Trinh, Hiroshi Watanabe
  • Patent number: 10024890
    Abstract: A system comprises an integrated circuit package, an inductor that is part of a power supply, and a printed circuit board (PCB) having a metal trace disposed directly below the inductor when viewed from a top-down perspective. The integrated circuit package includes a first terminal, a second terminal, and a novel inductor current detection and calibration circuit. The first terminal is coupled to a first end of the metal trace and the second terminal is coupled to a second end of the metal trace. During operation of the power supply, the novel circuit detects an OCP condition whereby an output current of the power supply exceeds an OCP level. The novel circuit detects the OCP condition in part by sensing a voltage across the metal trace. After calibration at room temperature, the novel circuit performs accurate OCP detection over a range of temperatures without using any temperature sensor near inductor.
    Type: Grant
    Filed: April 26, 2015
    Date of Patent: July 17, 2018
    Assignee: Active-Semi, Inc.
    Inventor: Narasimhan Trichy
  • Patent number: 10020723
    Abstract: A power loss protection integrated circuit includes a storage capacitor terminal (STR), an autonomous capacitor health check circuit, and a capacitor fault terminal (CF). The capacitor health check circuit autonomously performs periodic capacitor check operations. In a check operation, current is sinked from the STR terminal for a predetermined time and in a predetermined way. If during this time the voltage on the STR terminal STR drops below a predetermined voltage, then a digital signal CF is asserted onto the CF terminal. Immediately following each capacitor check, a charging voltage is driven onto the STR terminal to recharge the external capacitors coupled to the STR terminal. In one example, the integrated circuit further includes a current switch circuit (eFuse) and a buck/boost controller. The capacitor health check circuit is only enabled during normal mode operation of the integrated circuit, and the check circuit disables boost operation during capacitor checks.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: July 10, 2018
    Assignee: Active-Semi, Inc.
    Inventors: John H. Carpenter, Jr., Brett E. Smith
  • Patent number: 9946279
    Abstract: An integrated circuit includes a voltage set input terminal, a current source, a voltage clipping circuit, and a voltage regulator. The clipping circuit receives a voltage from the terminal and supplies a voltage onto a reference voltage input of the regulator. The magnitude of an output voltage VOUT output by the regulator is the voltage on reference voltage input multiplied by the voltage gain of the regulator. The user sets VOUT by attaching an external resistor to the terminal. Current from the current source flows out of the terminal, and through the external resistor, thereby setting the voltage on the terminal. If the voltage on the terminal is between V1 and V2, then VOUT is a fixed multiple of the voltage. If the voltage is less than V1, then VOUT is a predetermined VOUTMIN value. If the voltage is greater than V2, then VOUT is a predetermined VOUTMAX value.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 17, 2018
    Assignee: Active-Semi, Inc.
    Inventors: Khanh Q. Dinh, Tung V. Nguyen, Hiroshi Watanabe
  • Patent number: 9887628
    Abstract: A power loss protection integrated circuit includes a current switch circuit (eFuse), a VIN terminal, a VOUT terminal, a buck/boost controller, and a storage capacitor terminal STR. The controller is adapted to work: 1) as a boost to take a low voltage from the VOUT terminal and to output a larger charging voltage onto the STR terminal, or 2) as a buck to take a higher voltage from the STR terminal and to buck it down to a lower voltage required on the VOUT terminal. The current switch circuit outputs a digital undervoltage signal (UV) and a digital high current signal (HC). These signals are communicated on-chip to the controller. Asserting UV causes the converter to begin operating in the buck mode. Asserting HC prevents the converter from operating in the boost mode.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: February 6, 2018
    Assignee: Active-Semi, Inc.
    Inventors: John H. Carpenter, Jr., Hiroshi Watanabe, Brett E. Smith
  • Patent number: 9882485
    Abstract: Current metering for transitioning to low power operation in switching regulators is disclosed. In an exemplary embodiment, a method is provided that includes generating pulse width modulated charging cycles that enable current to flow to an inductor to adjust an output voltage, and detecting a skipped charging cycle. The method also includes determining whether a number of charging cycles are skipped over a time interval that begins when the skipped charging cycle is detected. The method also includes transitioning to a low power operating mode if it determined that the number of charging cycles have been skipped over the selected time interval. During the low power operating mode pulse frequency modulated charging cycles are generated that enable the current to flow to the inductor to generate the output voltage.
    Type: Grant
    Filed: December 31, 2016
    Date of Patent: January 30, 2018
    Assignee: Active-Semi, Inc.
    Inventors: Narasimhan Trichy, James Allen Kohout
  • Patent number: 9817458
    Abstract: An adaptive USB port controller is disclosed. In an exemplary embodiment, a system comprises a source, a power adapter, a USB port controller, a USB plug and cable, and a device. In one example, the device includes a rechargeable battery. After connecting the device to the USB port controller via the USB plug and cable, a reconfigurable module within the USB port controller sets a power mode by: (1) configuring an impedance network to present impedance modes that indicate available power modes, (2) detecting voltages on one or more of the USB conductors in response to each impedance mode, and (3) comparing the detected voltages to reference voltage levels to set one of multiple power modes. The reconfigurable module then controls the power adapter to transfer power according to the determined power mode.
    Type: Grant
    Filed: May 25, 2015
    Date of Patent: November 14, 2017
    Assignee: Active-Semi, Inc.
    Inventors: John H. Carpenter, Jr., Narasimhan Trichy, Sanjeeva Pindi
  • Patent number: 9806559
    Abstract: A reversible buck or boost converter is operable in a buck mode and in a boost mode. In the buck mode, the converter receives a supply voltage via an input terminal and generates a charging current that is supplied to a battery, thereby charging the battery. The supply voltage is also supplied through the converter to an output terminal. In a boost mode, the converter receives power form the battery and generates a supply current and voltage that is output onto the output terminal. The same single current sense resistor is used both to control the charging current in the buck mode and to control a constant current supplied to the output terminal in the boost mode. The output current is controlled to be constant, regardless of changes in the in the battery voltage and changes in the output voltage.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: October 31, 2017
    Assignee: Active-Semi, Inc.
    Inventors: Hong Mao, Wei-Chung Wu
  • Patent number: 9791482
    Abstract: A power loss protection integrated circuit includes a current switch circuit portion (eFuse) and an autonomous limit checking circuit. The limit checking circuit includes an input analog multiplexer, an ADC, a plurality of capture registers, a state machine, and a flag output terminal. For each capture register, the limit checking circuit further includes an associated lower limit register and an associated upper limit register. The state machine controls the multiplexer and the capture registers so the ADC digitizes voltages on various nodes to the monitored, and stores the results into corresponding capture registers. In integrated circuit has circuitry that allows both a high voltage as well as a high current to be monitored. The value in a capture register is compared to upper and lower limit values. If any capture value is determined to be outside the limits, then a digital flag signal is asserted onto the flag output terminal.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: October 17, 2017
    Assignee: Active-Semi, Inc.
    Inventors: John H. Carpenter, Jr., Brett E. Smith, Hiroshi Watanabe
  • Patent number: 9774341
    Abstract: A Dynamic Triggering and Sample Engine (DTSE) that detects a first trigger received on a trigger input terminal that triggers a series of analog-to-digital conversions to be completed by an analog-to-digital converter circuit. The DTSE then determines a first sequence configuration stored in a sequence configuration table that is associated with the first trigger, causes a first analog-to-digital conversion to be performed using the first sequence configuration; causes a first analog-to-digital conversion result value to be stored in a sequence result table; and outputs an interrupt to a processor indicating that the first analog-to-digital conversion result value is available in the sequence result table. The interrupt is output from the DTSE before all remaining analog-to-digital conversions in the series are completed. In response to receiving the interrupt, the processor reads the analog-to-digital result value from the sequence result table via a bus.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: September 26, 2017
    Assignee: Active-Semi, Inc.
    Inventor: Marc D. Sousa
  • Patent number: 9721742
    Abstract: A power loss protection integrated circuit includes a current switch circuit portion (eFuse) and an autonomous limit checking circuit. The limit checking circuit includes an input analog multiplexer, an ADC, a plurality of capture registers, a state machine, and a flag output terminal. For each capture register, the limit checking circuit further includes an associated lower limit register and an associated upper limit register. The state machine controls the multiplexer and the capture registers so the ADC digitizes voltages on various nodes to the monitored, and stores the results into corresponding capture registers. In integrated circuit has circuitry that allows both a high voltage as well as a high current to be monitored. The value in a capture register is compared to upper and lower limit values. If any capture value is determined to be outside the limits, then a digital flag signal is asserted onto the flag output terminal.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: August 1, 2017
    Assignee: Active-Semi, Inc.
    Inventors: John H. Carpenter, Jr., Brett E. Smith, Hiroshi Watanabe
  • Patent number: 9705402
    Abstract: A power loss protection integrated circuit includes a current switch circuit (eFuse), a VIN terminal, a VOUT terminal, a buck/boost controller, and a storage capacitor terminal STR. The controller is adapted to work: 1) as a boost to take a low voltage from the VOUT terminal and to output a larger charging voltage onto the STR terminal, or 2) as a buck to take a higher voltage from the STR terminal and to buck it down to a lower voltage required on the VOUT terminal. The current switch circuit outputs a digital undervoltage signal (UV) and a digital high current signal (HC). These signals are communicated on-chip to the controller. Asserting UV causes the converter to begin operating in the buck mode. Asserting HC prevents the converter from operating in the boost mode.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: July 11, 2017
    Assignee: Active-Semi, Inc.
    Inventors: John H. Carpenter, Jr., Brett E. Smith, Hiroshi Watanabe
  • Patent number: 9692246
    Abstract: A power bank device has an input connector, an output connector, a DC-to-DC switching converter, a plurality of battery cells coupled together in series, and novel light load detection circuitry. The power bank device is operable in a discharging mode in which the battery cells power the DC-to-DC converter, and the converter drives a regulated DC voltage onto the output connector. The detection circuitry detects whether a light load condition exists in which only a small amount of current is being output onto the output connector. If the condition is detected, then the converter is disabled so that current flow out of the output connector is stopped. In one example, the condition is detected by supplying a constant current onto the output connector and detecting whether the voltage on the output connector rises and stays above a predetermined voltage for a predetermined amount of time.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: June 27, 2017
    Assignee: Active-Semi, Inc.
    Inventor: Hong Mao
  • Patent number: 9680309
    Abstract: Apparatus and methods are provided to automatically detect and control a load switch for a wireless power receiver. In one novel aspect, a method is provided to adaptively control the load switch based on the output condition of a rectified output according to a predefined criteria. In one embodiment of the invention, the methods to adaptively control the load switch comprises a first stage that turns on the load switch quickly; a second stage that stops turning on the load switch and holds the load switch at its current value; a third stage that slowly pulls down the load switch; and a fourth stage that quickly turns off the load switch. In another embodiment, an integrated circuit for a wireless power pick up unit is provided to control the load switch adaptively based on a rectified output feedback and a predefined criteria.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: June 13, 2017
    Assignee: Active-Semi, Inc.
    Inventor: James A. Kohout
  • Patent number: 9664661
    Abstract: An integrated circuit that senses ambient gas concentrations includes a microcontroller, gas sensors, heating resistors and an analog-to-digital converter. A first gas sensor measures a first attribute of a gas concentration, and a second gas sensor measures a second attribute of the gas concentration. The first attribute varies with the gas concentration differently than does the second attribute. The microcontroller controls the duty cycles of signals driven through the heating resistors to adjust the temperatures of the resistors, which are thermally coupled to the gas sensors. A first heating resistor increases the temperature of the first gas sensor to a first target temperature, and a second heating resistor increases the temperature of the second gas sensor to a second target temperature. The analog-to-digital converter converts the attributes measured by the first and second gas sensors into digital values. The microcontroller then uses the digital values to compute the gas concentration.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: May 30, 2017
    Assignee: Active-Semi, Inc.
    Inventors: Steven Huynh, XuCheng Wang
  • Patent number: 9633162
    Abstract: An integrated circuit (IC) and fabrication method thereof is provided that include the steps of specifying a plurality of required tile modules suitable for a particular end application, each of the modular tiles being configured to perform a predetermined function and constructed to have approximately the same length and width dimensions. The modular tiles are used to form the IC in a standard IC fabrication process. In many implementations, physical layout of the IC does not include the step of routing. Capabilities also include configuring the modular tiles to have programmable performance parameters and configuring the modular tiles to cooperate usefully with one another based on a programmable parameter.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: April 25, 2017
    Assignee: Active-Semi, Inc.
    Inventors: Steven Huynh, David Kunst
  • Patent number: 9577527
    Abstract: Current metering for transitioning to low power operation in switching regulators is disclosed. In an exemplary embodiment, a method is provided that includes generating pulse width modulated charging cycles that enable current to flow to an inductor to adjust an output voltage, and detecting a skipped charging cycle. The method also includes determining whether a number of charging cycles are skipped over a time interval that begins when the skipped charging cycle is detected. The method also includes transitioning to a low power operating mode if it determined that the number of charging cycles have been skipped over the selected time interval. During the low power operating mode pulse frequency modulated charging cycles are generated that enable the current to flow to the inductor to generate the output voltage.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: February 21, 2017
    Assignee: Active-Semi, Inc.
    Inventors: Narasimhan Trichy, James Allen Kohout
  • Patent number: 9544960
    Abstract: An LED lamp includes a rectifier, an integrated circuit and a string of series-connected LEDs. The lamp receives an incoming AC signal such that a rectified version of the signal is present across the LED string. The integrated circuit includes a plurality of power switches. Each power switch is coupled so that it can separately and selectably short out a corresponding one of several groups of LEDs in the string. As the voltage across the string increases the integrated circuit controls the power switches such that the number of LEDs through which current flows increases, whereas as the voltage across the string decreases the integrated circuit controls the power switches such that the number of LEDs through which current flows decreases. LED string current flow is controlled and regulated to provide superior efficiency, reliability, anti-flicker, regulation against line voltage variations, power factor correction, and lamp over-voltage, over-current, and over-temperature protection.
    Type: Grant
    Filed: July 31, 2010
    Date of Patent: January 10, 2017
    Assignee: Active-Semi, Inc.
    Inventor: Steven Huynh
  • Patent number: 9514262
    Abstract: A programmable analog tile integrated circuit is configured over a standardized bus by communicating tile configuration information from a first integrated circuit tile, through a second integrated circuit tile, to a third integrated circuit tile. Each of the three integrated circuit tiles is part of an integrated circuit. The standardized bus is formed when the tiles are placed adjacent one another. Data bus and control signal conductors of the adjacent tiles line up and interconnect such that each signal conductor is electrically connected to every tile. Tile configuration information may be written to a selected register identified by an address in any selected one of the tiles using the data bus and control lines, regardless of the relative physical locations of the tile sending and the tile receiving the information. Thus, tile configuration information may pass from one tile to another tile, through any number of intermediate tiles.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: December 6, 2016
    Assignee: Active-Semi, Inc.
    Inventors: Steven Huynh, Matthew A. Grant, Gary M. Hurtz, David J. Kunst, Trey A. Roessig